1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-only 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (c) 2013-2014 Linaro Ltd. 4*4882a593Smuzhiyun * Copyright (c) 2013-2014 Hisilicon Limited. 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun/dts-v1/; 8*4882a593Smuzhiyun#include "hisi-x5hd2.dtsi" 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun/ { 11*4882a593Smuzhiyun model = "Hisilicon HIX5HD2 Development Board"; 12*4882a593Smuzhiyun compatible = "hisilicon,hix5hd2"; 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun chosen { 15*4882a593Smuzhiyun stdout-path = "serial0:115200n8"; 16*4882a593Smuzhiyun }; 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun cpus { 19*4882a593Smuzhiyun #address-cells = <1>; 20*4882a593Smuzhiyun #size-cells = <0>; 21*4882a593Smuzhiyun enable-method = "hisilicon,hix5hd2-smp"; 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun cpu@0 { 24*4882a593Smuzhiyun compatible = "arm,cortex-a9"; 25*4882a593Smuzhiyun device_type = "cpu"; 26*4882a593Smuzhiyun reg = <0>; 27*4882a593Smuzhiyun next-level-cache = <&l2>; 28*4882a593Smuzhiyun }; 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun cpu@1 { 31*4882a593Smuzhiyun compatible = "arm,cortex-a9"; 32*4882a593Smuzhiyun device_type = "cpu"; 33*4882a593Smuzhiyun reg = <1>; 34*4882a593Smuzhiyun next-level-cache = <&l2>; 35*4882a593Smuzhiyun }; 36*4882a593Smuzhiyun }; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun memory { 39*4882a593Smuzhiyun device_type = "memory"; 40*4882a593Smuzhiyun reg = <0x00000000 0x80000000>; 41*4882a593Smuzhiyun }; 42*4882a593Smuzhiyun}; 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun&timer0 { 45*4882a593Smuzhiyun status = "okay"; 46*4882a593Smuzhiyun}; 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun&uart0 { 49*4882a593Smuzhiyun status = "okay"; 50*4882a593Smuzhiyun}; 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun&gmac0 { 53*4882a593Smuzhiyun #address-cells = <1>; 54*4882a593Smuzhiyun #size-cells = <0>; 55*4882a593Smuzhiyun phy-handle = <&phy2>; 56*4882a593Smuzhiyun phy-mode = "mii"; 57*4882a593Smuzhiyun /* Placeholder, overwritten by bootloader */ 58*4882a593Smuzhiyun mac-address = [00 00 00 00 00 00]; 59*4882a593Smuzhiyun status = "okay"; 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun phy2: ethernet-phy@2 { 62*4882a593Smuzhiyun reg = <2>; 63*4882a593Smuzhiyun }; 64*4882a593Smuzhiyun}; 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun&gmac1 { 67*4882a593Smuzhiyun #address-cells = <1>; 68*4882a593Smuzhiyun #size-cells = <0>; 69*4882a593Smuzhiyun phy-handle = <&phy1>; 70*4882a593Smuzhiyun phy-mode = "rgmii"; 71*4882a593Smuzhiyun /* Placeholder, overwritten by bootloader */ 72*4882a593Smuzhiyun mac-address = [00 00 00 00 00 00]; 73*4882a593Smuzhiyun status = "okay"; 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun phy1: ethernet-phy@1 { 76*4882a593Smuzhiyun reg = <1>; 77*4882a593Smuzhiyun }; 78*4882a593Smuzhiyun}; 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun&ahci { 81*4882a593Smuzhiyun phys = <&sata_phy>; 82*4882a593Smuzhiyun phy-names = "sata-phy"; 83*4882a593Smuzhiyun}; 84