1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Device Tree file for Wiliboard WBD-222 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun/dts-v1/; 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun#include "gemini.dtsi" 9*4882a593Smuzhiyun#include <dt-bindings/input/input.h> 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun/ { 12*4882a593Smuzhiyun model = "Wiliboard WBD-222"; 13*4882a593Smuzhiyun compatible = "wiliboard,wbd222", "cortina,gemini"; 14*4882a593Smuzhiyun #address-cells = <1>; 15*4882a593Smuzhiyun #size-cells = <1>; 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun memory@0 { /* 128 MB */ 18*4882a593Smuzhiyun device_type = "memory"; 19*4882a593Smuzhiyun reg = <0x00000000 0x8000000>; 20*4882a593Smuzhiyun }; 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun chosen { 23*4882a593Smuzhiyun bootargs = "console=ttyS0,115200n8"; 24*4882a593Smuzhiyun stdout-path = &uart0; 25*4882a593Smuzhiyun }; 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun gpio_keys { 28*4882a593Smuzhiyun compatible = "gpio-keys"; 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun button-setup { 31*4882a593Smuzhiyun debounce-interval = <100>; 32*4882a593Smuzhiyun wakeup-source; 33*4882a593Smuzhiyun linux,code = <KEY_SETUP>; 34*4882a593Smuzhiyun label = "reset"; 35*4882a593Smuzhiyun /* Conflict with ICE */ 36*4882a593Smuzhiyun gpios = <&gpio0 5 GPIO_ACTIVE_LOW>; 37*4882a593Smuzhiyun }; 38*4882a593Smuzhiyun }; 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun leds { 41*4882a593Smuzhiyun compatible = "gpio-leds"; 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun led-red-l3 { 44*4882a593Smuzhiyun label = "wbd111:red:L3"; 45*4882a593Smuzhiyun /* Conflict with TVC and extended parallel flash */ 46*4882a593Smuzhiyun gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>; 47*4882a593Smuzhiyun default-state = "off"; 48*4882a593Smuzhiyun }; 49*4882a593Smuzhiyun led-green-l4 { 50*4882a593Smuzhiyun label = "wbd111:green:L4"; 51*4882a593Smuzhiyun /* Conflict with TVC and extended parallel flash */ 52*4882a593Smuzhiyun gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>; 53*4882a593Smuzhiyun default-state = "off"; 54*4882a593Smuzhiyun }; 55*4882a593Smuzhiyun led-red-l4 { 56*4882a593Smuzhiyun label = "wbd111:red:L4"; 57*4882a593Smuzhiyun /* Conflict with TVC and extended parallel flash */ 58*4882a593Smuzhiyun gpios = <&gpio0 3 GPIO_ACTIVE_HIGH>; 59*4882a593Smuzhiyun default-state = "off"; 60*4882a593Smuzhiyun }; 61*4882a593Smuzhiyun led-green-l3 { 62*4882a593Smuzhiyun label = "wbd111:green:L3"; 63*4882a593Smuzhiyun /* Conflict with TVC and extended parallel flash */ 64*4882a593Smuzhiyun gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>; 65*4882a593Smuzhiyun default-state = "on"; 66*4882a593Smuzhiyun linux,default-trigger = "heartbeat"; 67*4882a593Smuzhiyun }; 68*4882a593Smuzhiyun }; 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun mdio0: mdio { 71*4882a593Smuzhiyun compatible = "virtual,mdio-gpio"; 72*4882a593Smuzhiyun gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */ 73*4882a593Smuzhiyun <&gpio0 21 GPIO_ACTIVE_HIGH>; /* MDIO */ 74*4882a593Smuzhiyun #address-cells = <1>; 75*4882a593Smuzhiyun #size-cells = <0>; 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun phy0: ethernet-phy@1 { 78*4882a593Smuzhiyun reg = <1>; 79*4882a593Smuzhiyun device_type = "ethernet-phy"; 80*4882a593Smuzhiyun }; 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun phy1: ethernet-phy@3 { 83*4882a593Smuzhiyun reg = <3>; 84*4882a593Smuzhiyun device_type = "ethernet-phy"; 85*4882a593Smuzhiyun }; 86*4882a593Smuzhiyun }; 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun soc { 89*4882a593Smuzhiyun flash@30000000 { 90*4882a593Smuzhiyun status = "okay"; 91*4882a593Smuzhiyun /* 8MB of flash */ 92*4882a593Smuzhiyun reg = <0x30000000 0x00800000>; 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun partition@0 { 95*4882a593Smuzhiyun label = "RedBoot"; 96*4882a593Smuzhiyun reg = <0x00000000 0x00020000>; 97*4882a593Smuzhiyun read-only; 98*4882a593Smuzhiyun }; 99*4882a593Smuzhiyun partition@20000 { 100*4882a593Smuzhiyun label = "kernel"; 101*4882a593Smuzhiyun reg = <0x00020000 0x00100000>; 102*4882a593Smuzhiyun }; 103*4882a593Smuzhiyun partition@120000 { 104*4882a593Smuzhiyun label = "rootfs"; 105*4882a593Smuzhiyun reg = <0x00120000 0x006a0000>; 106*4882a593Smuzhiyun }; 107*4882a593Smuzhiyun partition@7c0000 { 108*4882a593Smuzhiyun label = "VCTL"; 109*4882a593Smuzhiyun reg = <0x007c0000 0x00010000>; 110*4882a593Smuzhiyun read-only; 111*4882a593Smuzhiyun }; 112*4882a593Smuzhiyun partition@7d0000 { 113*4882a593Smuzhiyun label = "cfg"; 114*4882a593Smuzhiyun reg = <0x007d0000 0x00010000>; 115*4882a593Smuzhiyun read-only; 116*4882a593Smuzhiyun }; 117*4882a593Smuzhiyun partition@7e0000 { 118*4882a593Smuzhiyun label = "FIS"; 119*4882a593Smuzhiyun reg = <0x007e0000 0x00010000>; 120*4882a593Smuzhiyun read-only; 121*4882a593Smuzhiyun }; 122*4882a593Smuzhiyun }; 123*4882a593Smuzhiyun 124*4882a593Smuzhiyun syscon: syscon@40000000 { 125*4882a593Smuzhiyun pinctrl { 126*4882a593Smuzhiyun /* 127*4882a593Smuzhiyun * gpio0agrp cover line 0-4 128*4882a593Smuzhiyun * gpio0bgrp cover line 5 129*4882a593Smuzhiyun */ 130*4882a593Smuzhiyun gpio0_default_pins: pinctrl-gpio0 { 131*4882a593Smuzhiyun mux { 132*4882a593Smuzhiyun function = "gpio0"; 133*4882a593Smuzhiyun groups = "gpio0agrp", 134*4882a593Smuzhiyun "gpio0bgrp"; 135*4882a593Smuzhiyun }; 136*4882a593Smuzhiyun }; 137*4882a593Smuzhiyun pinctrl-gmii { 138*4882a593Smuzhiyun /* This platform use both the ethernet ports */ 139*4882a593Smuzhiyun mux { 140*4882a593Smuzhiyun function = "gmii"; 141*4882a593Smuzhiyun groups = "gmii_gmac0_grp", "gmii_gmac1_grp"; 142*4882a593Smuzhiyun }; 143*4882a593Smuzhiyun }; 144*4882a593Smuzhiyun }; 145*4882a593Smuzhiyun }; 146*4882a593Smuzhiyun 147*4882a593Smuzhiyun gpio0: gpio@4d000000 { 148*4882a593Smuzhiyun pinctrl-names = "default"; 149*4882a593Smuzhiyun pinctrl-0 = <&gpio0_default_pins>; 150*4882a593Smuzhiyun }; 151*4882a593Smuzhiyun 152*4882a593Smuzhiyun pci@50000000 { 153*4882a593Smuzhiyun status = "okay"; 154*4882a593Smuzhiyun interrupt-map-mask = <0xf800 0 0 7>; 155*4882a593Smuzhiyun interrupt-map = 156*4882a593Smuzhiyun <0x4800 0 0 1 &pci_intc 0>, /* Slot 9 */ 157*4882a593Smuzhiyun <0x4800 0 0 2 &pci_intc 1>, 158*4882a593Smuzhiyun <0x4800 0 0 3 &pci_intc 2>, 159*4882a593Smuzhiyun <0x4800 0 0 4 &pci_intc 3>, 160*4882a593Smuzhiyun <0x5000 0 0 1 &pci_intc 1>, /* Slot 10 */ 161*4882a593Smuzhiyun <0x5000 0 0 2 &pci_intc 2>, 162*4882a593Smuzhiyun <0x5000 0 0 3 &pci_intc 3>, 163*4882a593Smuzhiyun <0x5000 0 0 4 &pci_intc 0>, 164*4882a593Smuzhiyun <0x5800 0 0 1 &pci_intc 2>, /* Slot 11 */ 165*4882a593Smuzhiyun <0x5800 0 0 2 &pci_intc 3>, 166*4882a593Smuzhiyun <0x5800 0 0 3 &pci_intc 0>, 167*4882a593Smuzhiyun <0x5800 0 0 4 &pci_intc 1>, 168*4882a593Smuzhiyun <0x6000 0 0 1 &pci_intc 3>, /* Slot 12 */ 169*4882a593Smuzhiyun <0x6000 0 0 2 &pci_intc 0>, 170*4882a593Smuzhiyun <0x6000 0 0 3 &pci_intc 1>, 171*4882a593Smuzhiyun <0x6000 0 0 4 &pci_intc 2>; 172*4882a593Smuzhiyun }; 173*4882a593Smuzhiyun 174*4882a593Smuzhiyun ethernet@60000000 { 175*4882a593Smuzhiyun status = "okay"; 176*4882a593Smuzhiyun 177*4882a593Smuzhiyun ethernet-port@0 { 178*4882a593Smuzhiyun phy-mode = "rgmii"; 179*4882a593Smuzhiyun phy-handle = <&phy0>; 180*4882a593Smuzhiyun }; 181*4882a593Smuzhiyun ethernet-port@1 { 182*4882a593Smuzhiyun phy-mode = "rgmii"; 183*4882a593Smuzhiyun phy-handle = <&phy1>; 184*4882a593Smuzhiyun }; 185*4882a593Smuzhiyun }; 186*4882a593Smuzhiyun 187*4882a593Smuzhiyun usb@68000000 { 188*4882a593Smuzhiyun status = "okay"; 189*4882a593Smuzhiyun }; 190*4882a593Smuzhiyun 191*4882a593Smuzhiyun usb@69000000 { 192*4882a593Smuzhiyun status = "okay"; 193*4882a593Smuzhiyun }; 194*4882a593Smuzhiyun }; 195*4882a593Smuzhiyun}; 196