1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Device Tree file for the Storm Semiconductor SL93512R_BRD 4*4882a593Smuzhiyun * Gemini reference design, also initially called 5*4882a593Smuzhiyun * "Gemini324 EV-Board" before Storm acquired Storlink Semiconductor. 6*4882a593Smuzhiyun * The series were later acquired by Cortina Systems. 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun/dts-v1/; 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun#include "gemini.dtsi" 12*4882a593Smuzhiyun#include <dt-bindings/input/input.h> 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun/ { 15*4882a593Smuzhiyun model = "Storlink Semiconductor Gemini324 EV-Board / Storm Semiconductor SL93512R_BRD"; 16*4882a593Smuzhiyun compatible = "storlink,gemini324", "storm,sl93512r", "cortina,gemini"; 17*4882a593Smuzhiyun #address-cells = <1>; 18*4882a593Smuzhiyun #size-cells = <1>; 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun memory@0 { 21*4882a593Smuzhiyun /* 64 MB Samsung K4H511638B */ 22*4882a593Smuzhiyun device_type = "memory"; 23*4882a593Smuzhiyun reg = <0x00000000 0x4000000>; 24*4882a593Smuzhiyun }; 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun chosen { 27*4882a593Smuzhiyun bootargs = "console=ttyS0,19200n8 root=/dev/mtdblock3 rw rootfstype=squashfs,jffs2 rootwait"; 28*4882a593Smuzhiyun stdout-path = &uart0; 29*4882a593Smuzhiyun }; 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun gpio_keys { 32*4882a593Smuzhiyun compatible = "gpio-keys"; 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun button-wps { 35*4882a593Smuzhiyun debounce-interval = <50>; 36*4882a593Smuzhiyun wakeup-source; 37*4882a593Smuzhiyun linux,code = <KEY_WPS_BUTTON>; 38*4882a593Smuzhiyun label = "WPS"; 39*4882a593Smuzhiyun /* Conflicts with TVC and extended flash */ 40*4882a593Smuzhiyun gpios = <&gpio0 0 GPIO_ACTIVE_LOW>; 41*4882a593Smuzhiyun }; 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun button-setup { 44*4882a593Smuzhiyun debounce-interval = <50>; 45*4882a593Smuzhiyun wakeup-source; 46*4882a593Smuzhiyun linux,code = <KEY_SETUP>; 47*4882a593Smuzhiyun label = "factory reset"; 48*4882a593Smuzhiyun /* Conflict with NAND flash */ 49*4882a593Smuzhiyun gpios = <&gpio0 18 GPIO_ACTIVE_LOW>; 50*4882a593Smuzhiyun }; 51*4882a593Smuzhiyun }; 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun leds { 54*4882a593Smuzhiyun compatible = "gpio-leds"; 55*4882a593Smuzhiyun led-green-harddisk { 56*4882a593Smuzhiyun label = "sq201:green:harddisk"; 57*4882a593Smuzhiyun /* Conflict with LCD (no problem) */ 58*4882a593Smuzhiyun gpios = <&gpio0 16 GPIO_ACTIVE_LOW>; 59*4882a593Smuzhiyun default-state = "off"; 60*4882a593Smuzhiyun linux,default-trigger = "disk-activity"; 61*4882a593Smuzhiyun }; 62*4882a593Smuzhiyun led-green-wireless { 63*4882a593Smuzhiyun label = "sq201:green:wireless"; 64*4882a593Smuzhiyun /* Conflict with NAND flash CE0 (no problem) */ 65*4882a593Smuzhiyun gpios = <&gpio0 17 GPIO_ACTIVE_LOW>; 66*4882a593Smuzhiyun default-state = "on"; 67*4882a593Smuzhiyun linux,default-trigger = "heartbeat"; 68*4882a593Smuzhiyun }; 69*4882a593Smuzhiyun }; 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun mdio0: mdio { 72*4882a593Smuzhiyun compatible = "virtual,mdio-gpio"; 73*4882a593Smuzhiyun /* Uses MDC and MDIO */ 74*4882a593Smuzhiyun gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */ 75*4882a593Smuzhiyun <&gpio0 21 GPIO_ACTIVE_HIGH>; /* MDIO */ 76*4882a593Smuzhiyun #address-cells = <1>; 77*4882a593Smuzhiyun #size-cells = <0>; 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun /* This is a Marvell 88E1111 ethernet transciever */ 80*4882a593Smuzhiyun phy0: ethernet-phy@1 { 81*4882a593Smuzhiyun reg = <1>; 82*4882a593Smuzhiyun }; 83*4882a593Smuzhiyun }; 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun spi { 86*4882a593Smuzhiyun compatible = "spi-gpio"; 87*4882a593Smuzhiyun #address-cells = <1>; 88*4882a593Smuzhiyun #size-cells = <0>; 89*4882a593Smuzhiyun /* Check pin collisions */ 90*4882a593Smuzhiyun gpio-sck = <&gpio1 28 GPIO_ACTIVE_HIGH>; 91*4882a593Smuzhiyun gpio-miso = <&gpio1 30 GPIO_ACTIVE_HIGH>; 92*4882a593Smuzhiyun gpio-mosi = <&gpio1 29 GPIO_ACTIVE_HIGH>; 93*4882a593Smuzhiyun cs-gpios = <&gpio1 31 GPIO_ACTIVE_HIGH>; 94*4882a593Smuzhiyun num-chipselects = <1>; 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun switch@0 { 97*4882a593Smuzhiyun compatible = "vitesse,vsc7385"; 98*4882a593Smuzhiyun reg = <0>; 99*4882a593Smuzhiyun /* Specified for 2.5 MHz or below */ 100*4882a593Smuzhiyun spi-max-frequency = <2500000>; 101*4882a593Smuzhiyun gpio-controller; 102*4882a593Smuzhiyun #gpio-cells = <2>; 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun ports { 105*4882a593Smuzhiyun #address-cells = <1>; 106*4882a593Smuzhiyun #size-cells = <0>; 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun port@0 { 109*4882a593Smuzhiyun reg = <0>; 110*4882a593Smuzhiyun label = "lan1"; 111*4882a593Smuzhiyun }; 112*4882a593Smuzhiyun port@1 { 113*4882a593Smuzhiyun reg = <1>; 114*4882a593Smuzhiyun label = "lan2"; 115*4882a593Smuzhiyun }; 116*4882a593Smuzhiyun port@2 { 117*4882a593Smuzhiyun reg = <2>; 118*4882a593Smuzhiyun label = "lan3"; 119*4882a593Smuzhiyun }; 120*4882a593Smuzhiyun port@3 { 121*4882a593Smuzhiyun reg = <3>; 122*4882a593Smuzhiyun label = "lan4"; 123*4882a593Smuzhiyun }; 124*4882a593Smuzhiyun vsc: port@6 { 125*4882a593Smuzhiyun reg = <6>; 126*4882a593Smuzhiyun label = "cpu"; 127*4882a593Smuzhiyun ethernet = <&gmac1>; 128*4882a593Smuzhiyun phy-mode = "rgmii"; 129*4882a593Smuzhiyun fixed-link { 130*4882a593Smuzhiyun speed = <1000>; 131*4882a593Smuzhiyun full-duplex; 132*4882a593Smuzhiyun pause; 133*4882a593Smuzhiyun }; 134*4882a593Smuzhiyun }; 135*4882a593Smuzhiyun }; 136*4882a593Smuzhiyun }; 137*4882a593Smuzhiyun }; 138*4882a593Smuzhiyun 139*4882a593Smuzhiyun 140*4882a593Smuzhiyun soc { 141*4882a593Smuzhiyun flash@30000000 { 142*4882a593Smuzhiyun status = "okay"; 143*4882a593Smuzhiyun /* 16MB of flash */ 144*4882a593Smuzhiyun reg = <0x30000000 0x01000000>; 145*4882a593Smuzhiyun 146*4882a593Smuzhiyun partitions { 147*4882a593Smuzhiyun compatible = "redboot-fis"; 148*4882a593Smuzhiyun /* Eraseblock at 0xfe0000 */ 149*4882a593Smuzhiyun fis-index-block = <0x1fc>; 150*4882a593Smuzhiyun }; 151*4882a593Smuzhiyun }; 152*4882a593Smuzhiyun 153*4882a593Smuzhiyun syscon: syscon@40000000 { 154*4882a593Smuzhiyun pinctrl { 155*4882a593Smuzhiyun /* 156*4882a593Smuzhiyun * gpio0agrp cover line 0, used by WPS button 157*4882a593Smuzhiyun * gpio0fgrp cover line 16 used by HD LED 158*4882a593Smuzhiyun * gpio0ggrp cover line 17, 18 used by wireless LAN LED and 159*4882a593Smuzhiyun * reset button OR USB ID select on 17 and USB VBUS select 160*4882a593Smuzhiyun * on 18. (Confusing.) 161*4882a593Smuzhiyun * gpio0igrp cover line 21, 22 used by MDIO for Marvell PHY 162*4882a593Smuzhiyun */ 163*4882a593Smuzhiyun gpio0_default_pins: pinctrl-gpio0 { 164*4882a593Smuzhiyun mux { 165*4882a593Smuzhiyun function = "gpio0"; 166*4882a593Smuzhiyun groups = "gpio0agrp", 167*4882a593Smuzhiyun "gpio0fgrp", 168*4882a593Smuzhiyun "gpio0ggrp", 169*4882a593Smuzhiyun "gpio0igrp"; 170*4882a593Smuzhiyun }; 171*4882a593Smuzhiyun }; 172*4882a593Smuzhiyun /* 173*4882a593Smuzhiyun * gpio1dgrp cover lines used by SPI for 174*4882a593Smuzhiyun * the Vitesse chip (28-31) 175*4882a593Smuzhiyun */ 176*4882a593Smuzhiyun gpio1_default_pins: pinctrl-gpio1 { 177*4882a593Smuzhiyun mux { 178*4882a593Smuzhiyun function = "gpio1"; 179*4882a593Smuzhiyun groups = "gpio1dgrp"; 180*4882a593Smuzhiyun }; 181*4882a593Smuzhiyun }; 182*4882a593Smuzhiyun pinctrl-gmii { 183*4882a593Smuzhiyun mux { 184*4882a593Smuzhiyun function = "gmii"; 185*4882a593Smuzhiyun groups = "gmii_gmac0_grp", "gmii_gmac1_grp"; 186*4882a593Smuzhiyun }; 187*4882a593Smuzhiyun /* Control pad skew comes from sl_switch.c in the vendor code */ 188*4882a593Smuzhiyun conf0 { 189*4882a593Smuzhiyun pins = "P10 GMAC1 TXC"; 190*4882a593Smuzhiyun skew-delay = <5>; 191*4882a593Smuzhiyun }; 192*4882a593Smuzhiyun conf1 { 193*4882a593Smuzhiyun pins = "V11 GMAC1 TXEN"; 194*4882a593Smuzhiyun skew-delay = <7>; 195*4882a593Smuzhiyun }; 196*4882a593Smuzhiyun conf2 { 197*4882a593Smuzhiyun pins = "T11 GMAC1 RXC"; 198*4882a593Smuzhiyun skew-delay = <8>; 199*4882a593Smuzhiyun }; 200*4882a593Smuzhiyun conf3 { 201*4882a593Smuzhiyun pins = "U11 GMAC1 RXDV"; 202*4882a593Smuzhiyun skew-delay = <7>; 203*4882a593Smuzhiyun }; 204*4882a593Smuzhiyun conf4 { 205*4882a593Smuzhiyun pins = "V7 GMAC0 TXC"; 206*4882a593Smuzhiyun skew-delay = <10>; 207*4882a593Smuzhiyun }; 208*4882a593Smuzhiyun conf5 { 209*4882a593Smuzhiyun pins = "P8 GMAC0 TXEN"; 210*4882a593Smuzhiyun skew-delay = <7>; /* 5 at another place? */ 211*4882a593Smuzhiyun }; 212*4882a593Smuzhiyun conf6 { 213*4882a593Smuzhiyun pins = "T8 GMAC0 RXC"; 214*4882a593Smuzhiyun skew-delay = <15>; 215*4882a593Smuzhiyun }; 216*4882a593Smuzhiyun conf7 { 217*4882a593Smuzhiyun pins = "R8 GMAC0 RXDV"; 218*4882a593Smuzhiyun skew-delay = <0>; 219*4882a593Smuzhiyun }; 220*4882a593Smuzhiyun conf8 { 221*4882a593Smuzhiyun /* The data lines all have default skew */ 222*4882a593Smuzhiyun pins = "U8 GMAC0 RXD0", "V8 GMAC0 RXD1", 223*4882a593Smuzhiyun "P9 GMAC0 RXD2", "R9 GMAC0 RXD3", 224*4882a593Smuzhiyun "R11 GMAC1 RXD0", "P11 GMAC1 RXD1", 225*4882a593Smuzhiyun "V12 GMAC1 RXD2", "U12 GMAC1 RXD3", 226*4882a593Smuzhiyun "R10 GMAC1 TXD0", "T10 GMAC1 TXD1", 227*4882a593Smuzhiyun "U10 GMAC1 TXD2", "V10 GMAC1 TXD3"; 228*4882a593Smuzhiyun skew-delay = <7>; 229*4882a593Smuzhiyun }; 230*4882a593Smuzhiyun /* Appears in sl351x_gmac.c in the vendor code */ 231*4882a593Smuzhiyun conf9 { 232*4882a593Smuzhiyun pins = "U7 GMAC0 TXD0", "T7 GMAC0 TXD1", 233*4882a593Smuzhiyun "R7 GMAC0 TXD2", "P7 GMAC0 TXD3"; 234*4882a593Smuzhiyun skew-delay = <5>; 235*4882a593Smuzhiyun }; 236*4882a593Smuzhiyun }; 237*4882a593Smuzhiyun }; 238*4882a593Smuzhiyun }; 239*4882a593Smuzhiyun 240*4882a593Smuzhiyun /* Both interfaces brought out on SATA connectors */ 241*4882a593Smuzhiyun sata: sata@46000000 { 242*4882a593Smuzhiyun cortina,gemini-ata-muxmode = <0>; 243*4882a593Smuzhiyun cortina,gemini-enable-sata-bridge; 244*4882a593Smuzhiyun status = "okay"; 245*4882a593Smuzhiyun }; 246*4882a593Smuzhiyun 247*4882a593Smuzhiyun gpio0: gpio@4d000000 { 248*4882a593Smuzhiyun pinctrl-names = "default"; 249*4882a593Smuzhiyun pinctrl-0 = <&gpio0_default_pins>; 250*4882a593Smuzhiyun }; 251*4882a593Smuzhiyun 252*4882a593Smuzhiyun gpio1: gpio@4e000000 { 253*4882a593Smuzhiyun pinctrl-names = "default"; 254*4882a593Smuzhiyun pinctrl-0 = <&gpio1_default_pins>; 255*4882a593Smuzhiyun }; 256*4882a593Smuzhiyun 257*4882a593Smuzhiyun pci@50000000 { 258*4882a593Smuzhiyun status = "okay"; 259*4882a593Smuzhiyun interrupt-map-mask = <0xf800 0 0 7>; 260*4882a593Smuzhiyun interrupt-map = 261*4882a593Smuzhiyun <0x4800 0 0 1 &pci_intc 0>, /* Slot 9 */ 262*4882a593Smuzhiyun <0x4800 0 0 2 &pci_intc 1>, 263*4882a593Smuzhiyun <0x4800 0 0 3 &pci_intc 2>, 264*4882a593Smuzhiyun <0x4800 0 0 4 &pci_intc 3>, 265*4882a593Smuzhiyun <0x5000 0 0 1 &pci_intc 1>, /* Slot 10 */ 266*4882a593Smuzhiyun <0x5000 0 0 2 &pci_intc 2>, 267*4882a593Smuzhiyun <0x5000 0 0 3 &pci_intc 3>, 268*4882a593Smuzhiyun <0x5000 0 0 4 &pci_intc 0>, 269*4882a593Smuzhiyun <0x5800 0 0 1 &pci_intc 2>, /* Slot 11 */ 270*4882a593Smuzhiyun <0x5800 0 0 2 &pci_intc 3>, 271*4882a593Smuzhiyun <0x5800 0 0 3 &pci_intc 0>, 272*4882a593Smuzhiyun <0x5800 0 0 4 &pci_intc 1>, 273*4882a593Smuzhiyun <0x6000 0 0 1 &pci_intc 3>, /* Slot 12 */ 274*4882a593Smuzhiyun <0x6000 0 0 2 &pci_intc 0>, 275*4882a593Smuzhiyun <0x6000 0 0 3 &pci_intc 1>, 276*4882a593Smuzhiyun <0x6000 0 0 4 &pci_intc 2>; 277*4882a593Smuzhiyun }; 278*4882a593Smuzhiyun 279*4882a593Smuzhiyun ethernet@60000000 { 280*4882a593Smuzhiyun status = "okay"; 281*4882a593Smuzhiyun 282*4882a593Smuzhiyun ethernet-port@0 { 283*4882a593Smuzhiyun phy-mode = "rgmii"; 284*4882a593Smuzhiyun phy-handle = <&phy0>; 285*4882a593Smuzhiyun }; 286*4882a593Smuzhiyun ethernet-port@1 { 287*4882a593Smuzhiyun phy-mode = "rgmii"; 288*4882a593Smuzhiyun fixed-link { 289*4882a593Smuzhiyun speed = <1000>; 290*4882a593Smuzhiyun full-duplex; 291*4882a593Smuzhiyun pause; 292*4882a593Smuzhiyun }; 293*4882a593Smuzhiyun }; 294*4882a593Smuzhiyun }; 295*4882a593Smuzhiyun 296*4882a593Smuzhiyun ide@63000000 { 297*4882a593Smuzhiyun status = "okay"; 298*4882a593Smuzhiyun }; 299*4882a593Smuzhiyun 300*4882a593Smuzhiyun ide@63400000 { 301*4882a593Smuzhiyun status = "okay"; 302*4882a593Smuzhiyun }; 303*4882a593Smuzhiyun 304*4882a593Smuzhiyun usb@68000000 { 305*4882a593Smuzhiyun status = "okay"; 306*4882a593Smuzhiyun }; 307*4882a593Smuzhiyun 308*4882a593Smuzhiyun usb@69000000 { 309*4882a593Smuzhiyun status = "okay"; 310*4882a593Smuzhiyun }; 311*4882a593Smuzhiyun }; 312*4882a593Smuzhiyun}; 313