1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Device Tree file for D-Link DNS-313 1-Bay Network Storage Enclosure 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun/dts-v1/; 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun#include "gemini.dtsi" 9*4882a593Smuzhiyun#include <dt-bindings/input/input.h> 10*4882a593Smuzhiyun#include <dt-bindings/thermal/thermal.h> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun/ { 13*4882a593Smuzhiyun model = "D-Link DNS-313 1-Bay Network Storage Enclosure"; 14*4882a593Smuzhiyun compatible = "dlink,dns-313", "cortina,gemini"; 15*4882a593Smuzhiyun #address-cells = <1>; 16*4882a593Smuzhiyun #size-cells = <1>; 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun memory@0 { 19*4882a593Smuzhiyun /* 64 MB SDRAM in a Nanya NT5DS32M16BS-6K package */ 20*4882a593Smuzhiyun device_type = "memory"; 21*4882a593Smuzhiyun reg = <0x00000000 0x4000000>; 22*4882a593Smuzhiyun }; 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun aliases { 25*4882a593Smuzhiyun mdio-gpio0 = &mdio0; 26*4882a593Smuzhiyun }; 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun chosen { 29*4882a593Smuzhiyun bootargs = "console=ttyS0,19200n8 root=/dev/sda4 rw rootwait"; 30*4882a593Smuzhiyun stdout-path = "uart0:19200n8"; 31*4882a593Smuzhiyun }; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun gpio_keys { 34*4882a593Smuzhiyun compatible = "gpio-keys"; 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun button-esc { 37*4882a593Smuzhiyun debounce-interval = <100>; 38*4882a593Smuzhiyun wakeup-source; 39*4882a593Smuzhiyun linux,code = <KEY_ESC>; 40*4882a593Smuzhiyun label = "reset"; 41*4882a593Smuzhiyun gpios = <&gpio1 31 GPIO_ACTIVE_LOW>; 42*4882a593Smuzhiyun }; 43*4882a593Smuzhiyun }; 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun leds { 46*4882a593Smuzhiyun compatible = "gpio-leds"; 47*4882a593Smuzhiyun led-power { 48*4882a593Smuzhiyun label = "dns313:blue:power"; 49*4882a593Smuzhiyun gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>; 50*4882a593Smuzhiyun default-state = "on"; 51*4882a593Smuzhiyun linux,default-trigger = "heartbeat"; 52*4882a593Smuzhiyun }; 53*4882a593Smuzhiyun led-disk-blue { 54*4882a593Smuzhiyun label = "dns313:blue:disk"; 55*4882a593Smuzhiyun gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>; 56*4882a593Smuzhiyun default-state = "off"; 57*4882a593Smuzhiyun }; 58*4882a593Smuzhiyun led-disk-green { 59*4882a593Smuzhiyun label = "dns313:green:disk"; 60*4882a593Smuzhiyun gpios = <&gpio0 3 GPIO_ACTIVE_HIGH>; 61*4882a593Smuzhiyun default-state = "off"; 62*4882a593Smuzhiyun linux,default-trigger = "disk-read"; 63*4882a593Smuzhiyun }; 64*4882a593Smuzhiyun led-disk-red { 65*4882a593Smuzhiyun label = "dns313:red:disk"; 66*4882a593Smuzhiyun gpios = <&gpio0 4 GPIO_ACTIVE_HIGH>; 67*4882a593Smuzhiyun default-state = "off"; 68*4882a593Smuzhiyun linux,default-trigger = "disk-write"; 69*4882a593Smuzhiyun }; 70*4882a593Smuzhiyun }; 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun /* 73*4882a593Smuzhiyun * This is a ADDA AD0405GB-G73 fan @3000 and 6000 RPM. 74*4882a593Smuzhiyun */ 75*4882a593Smuzhiyun fan0: gpio-fan { 76*4882a593Smuzhiyun compatible = "gpio-fan"; 77*4882a593Smuzhiyun gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>, 78*4882a593Smuzhiyun <&gpio0 12 GPIO_ACTIVE_HIGH>; 79*4882a593Smuzhiyun gpio-fan,speed-map = <0 0>, <3000 1>, <6000 2>; 80*4882a593Smuzhiyun #cooling-cells = <2>; 81*4882a593Smuzhiyun }; 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun /* Global Mixed-Mode Technology G751 mounted on GPIO I2C */ 85*4882a593Smuzhiyun gpio-i2c { 86*4882a593Smuzhiyun compatible = "i2c-gpio"; 87*4882a593Smuzhiyun sda-gpios = <&gpio0 15 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>; 88*4882a593Smuzhiyun scl-gpios = <&gpio0 16 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>; 89*4882a593Smuzhiyun #address-cells = <1>; 90*4882a593Smuzhiyun #size-cells = <0>; 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun g751: temperature-sensor@48 { 93*4882a593Smuzhiyun compatible = "gmt,g751"; 94*4882a593Smuzhiyun reg = <0x48>; 95*4882a593Smuzhiyun #thermal-sensor-cells = <0>; 96*4882a593Smuzhiyun }; 97*4882a593Smuzhiyun }; 98*4882a593Smuzhiyun 99*4882a593Smuzhiyun thermal-zones { 100*4882a593Smuzhiyun chassis-thermal { 101*4882a593Smuzhiyun /* Poll every 20 seconds */ 102*4882a593Smuzhiyun polling-delay = <20000>; 103*4882a593Smuzhiyun /* Poll every 2nd second when cooling */ 104*4882a593Smuzhiyun polling-delay-passive = <2000>; 105*4882a593Smuzhiyun 106*4882a593Smuzhiyun thermal-sensors = <&g751>; 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun /* Tripping points from the fan.script in the rootfs */ 109*4882a593Smuzhiyun trips { 110*4882a593Smuzhiyun chassis_alert0: chassis-alert0 { 111*4882a593Smuzhiyun /* At 43 degrees turn on low speed */ 112*4882a593Smuzhiyun temperature = <43000>; 113*4882a593Smuzhiyun hysteresis = <3000>; 114*4882a593Smuzhiyun type = "active"; 115*4882a593Smuzhiyun }; 116*4882a593Smuzhiyun chassis_alert1: chassis-alert1 { 117*4882a593Smuzhiyun /* At 47 degrees turn on high speed */ 118*4882a593Smuzhiyun temperature = <47000>; 119*4882a593Smuzhiyun hysteresis = <3000>; 120*4882a593Smuzhiyun type = "active"; 121*4882a593Smuzhiyun }; 122*4882a593Smuzhiyun chassis_crit: chassis-crit { 123*4882a593Smuzhiyun /* Just shut down at 60 degrees */ 124*4882a593Smuzhiyun temperature = <60000>; 125*4882a593Smuzhiyun hysteresis = <2000>; 126*4882a593Smuzhiyun type = "critical"; 127*4882a593Smuzhiyun }; 128*4882a593Smuzhiyun }; 129*4882a593Smuzhiyun 130*4882a593Smuzhiyun cooling-maps { 131*4882a593Smuzhiyun map0 { 132*4882a593Smuzhiyun trip = <&chassis_alert0>; 133*4882a593Smuzhiyun cooling-device = <&fan0 1 1>; 134*4882a593Smuzhiyun }; 135*4882a593Smuzhiyun map1 { 136*4882a593Smuzhiyun trip = <&chassis_alert1>; 137*4882a593Smuzhiyun cooling-device = <&fan0 2 2>; 138*4882a593Smuzhiyun }; 139*4882a593Smuzhiyun }; 140*4882a593Smuzhiyun }; 141*4882a593Smuzhiyun }; 142*4882a593Smuzhiyun 143*4882a593Smuzhiyun mdio0: mdio { 144*4882a593Smuzhiyun compatible = "virtual,mdio-gpio"; 145*4882a593Smuzhiyun /* Uses MDC and MDIO */ 146*4882a593Smuzhiyun gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */ 147*4882a593Smuzhiyun <&gpio0 21 GPIO_ACTIVE_HIGH>; /* MDIO */ 148*4882a593Smuzhiyun #address-cells = <1>; 149*4882a593Smuzhiyun #size-cells = <0>; 150*4882a593Smuzhiyun 151*4882a593Smuzhiyun /* This is a Realtek RTL8211B Gigabit ethernet transceiver */ 152*4882a593Smuzhiyun phy0: ethernet-phy@1 { 153*4882a593Smuzhiyun reg = <1>; 154*4882a593Smuzhiyun device_type = "ethernet-phy"; 155*4882a593Smuzhiyun }; 156*4882a593Smuzhiyun }; 157*4882a593Smuzhiyun 158*4882a593Smuzhiyun soc { 159*4882a593Smuzhiyun flash@30000000 { 160*4882a593Smuzhiyun /* 161*4882a593Smuzhiyun * This is a Eon EN29LV400AB 512 KiB flash with 162*4882a593Smuzhiyun * three partitions. 163*4882a593Smuzhiyun */ 164*4882a593Smuzhiyun compatible = "cortina,gemini-flash", "jedec-flash"; 165*4882a593Smuzhiyun status = "okay"; 166*4882a593Smuzhiyun reg = <0x30000000 0x00080000>; 167*4882a593Smuzhiyun 168*4882a593Smuzhiyun /* 169*4882a593Smuzhiyun * This "RedBoot" is the Storlink derivative. 170*4882a593Smuzhiyun */ 171*4882a593Smuzhiyun partition@0 { 172*4882a593Smuzhiyun label = "RedBoot"; 173*4882a593Smuzhiyun reg = <0x00000000 0x00040000>; 174*4882a593Smuzhiyun read-only; 175*4882a593Smuzhiyun }; 176*4882a593Smuzhiyun partition@40000 { 177*4882a593Smuzhiyun label = "MTD1"; 178*4882a593Smuzhiyun reg = <0x00040000 0x00020000>; 179*4882a593Smuzhiyun read-only; 180*4882a593Smuzhiyun }; 181*4882a593Smuzhiyun partition@60000 { 182*4882a593Smuzhiyun label = "MTD2"; 183*4882a593Smuzhiyun reg = <0x00060000 0x00020000>; 184*4882a593Smuzhiyun read-only; 185*4882a593Smuzhiyun }; 186*4882a593Smuzhiyun }; 187*4882a593Smuzhiyun 188*4882a593Smuzhiyun syscon: syscon@40000000 { 189*4882a593Smuzhiyun pinctrl { 190*4882a593Smuzhiyun /* 191*4882a593Smuzhiyun */ 192*4882a593Smuzhiyun gpio0_default_pins: pinctrl-gpio0 { 193*4882a593Smuzhiyun mux { 194*4882a593Smuzhiyun function = "gpio0"; 195*4882a593Smuzhiyun groups = 196*4882a593Smuzhiyun /* Used by LEDs conflicts ICE */ 197*4882a593Smuzhiyun "gpio0bgrp", 198*4882a593Smuzhiyun /* Used by ? conflicts ICE */ 199*4882a593Smuzhiyun "gpio0cgrp", 200*4882a593Smuzhiyun /* 201*4882a593Smuzhiyun * Used by fan & G751, conflicts LPC, 202*4882a593Smuzhiyun * UART modem lines, SSP 203*4882a593Smuzhiyun */ 204*4882a593Smuzhiyun "gpio0egrp", 205*4882a593Smuzhiyun /* Used by G751 */ 206*4882a593Smuzhiyun "gpio0fgrp", 207*4882a593Smuzhiyun /* Used by MDIO */ 208*4882a593Smuzhiyun "gpio0igrp"; 209*4882a593Smuzhiyun }; 210*4882a593Smuzhiyun }; 211*4882a593Smuzhiyun gpio1_default_pins: pinctrl-gpio1 { 212*4882a593Smuzhiyun mux { 213*4882a593Smuzhiyun function = "gpio1"; 214*4882a593Smuzhiyun /* Used by "reset" button */ 215*4882a593Smuzhiyun groups = "gpio1dgrp"; 216*4882a593Smuzhiyun }; 217*4882a593Smuzhiyun }; 218*4882a593Smuzhiyun pinctrl-gmii { 219*4882a593Smuzhiyun mux { 220*4882a593Smuzhiyun function = "gmii"; 221*4882a593Smuzhiyun groups = "gmii_gmac0_grp"; 222*4882a593Smuzhiyun }; 223*4882a593Smuzhiyun /* 224*4882a593Smuzhiyun * In the vendor Linux tree, these values are set for the C3 225*4882a593Smuzhiyun * version of the SL3512 ASIC with the comment "benson suggest" 226*4882a593Smuzhiyun */ 227*4882a593Smuzhiyun conf0 { 228*4882a593Smuzhiyun pins = "R8 GMAC0 RXDV", "U11 GMAC1 RXDV"; 229*4882a593Smuzhiyun skew-delay = <0>; 230*4882a593Smuzhiyun }; 231*4882a593Smuzhiyun conf1 { 232*4882a593Smuzhiyun pins = "T8 GMAC0 RXC"; 233*4882a593Smuzhiyun skew-delay = <10>; 234*4882a593Smuzhiyun }; 235*4882a593Smuzhiyun conf2 { 236*4882a593Smuzhiyun pins = "T11 GMAC1 RXC"; 237*4882a593Smuzhiyun skew-delay = <15>; 238*4882a593Smuzhiyun }; 239*4882a593Smuzhiyun conf3 { 240*4882a593Smuzhiyun pins = "P8 GMAC0 TXEN", "V11 GMAC1 TXEN"; 241*4882a593Smuzhiyun skew-delay = <7>; 242*4882a593Smuzhiyun }; 243*4882a593Smuzhiyun conf4 { 244*4882a593Smuzhiyun pins = "V7 GMAC0 TXC", "P10 GMAC1 TXC"; 245*4882a593Smuzhiyun skew-delay = <10>; 246*4882a593Smuzhiyun }; 247*4882a593Smuzhiyun conf5 { 248*4882a593Smuzhiyun /* The data lines all have default skew */ 249*4882a593Smuzhiyun pins = "U8 GMAC0 RXD0", "V8 GMAC0 RXD1", 250*4882a593Smuzhiyun "P9 GMAC0 RXD2", "R9 GMAC0 RXD3", 251*4882a593Smuzhiyun "R11 GMAC1 RXD0", "P11 GMAC1 RXD1", 252*4882a593Smuzhiyun "V12 GMAC1 RXD2", "U12 GMAC1 RXD3", 253*4882a593Smuzhiyun "R10 GMAC1 TXD0", "T10 GMAC1 TXD1", 254*4882a593Smuzhiyun "U10 GMAC1 TXD2", "V10 GMAC1 TXD3"; 255*4882a593Smuzhiyun skew-delay = <7>; 256*4882a593Smuzhiyun }; 257*4882a593Smuzhiyun conf6 { 258*4882a593Smuzhiyun pins = "U7 GMAC0 TXD0", "T7 GMAC0 TXD1", 259*4882a593Smuzhiyun "R7 GMAC0 TXD2", "P7 GMAC0 TXD3"; 260*4882a593Smuzhiyun skew-delay = <5>; 261*4882a593Smuzhiyun }; 262*4882a593Smuzhiyun /* Set up drive strength on GMAC0 to 16 mA */ 263*4882a593Smuzhiyun conf7 { 264*4882a593Smuzhiyun groups = "gmii_gmac0_grp"; 265*4882a593Smuzhiyun drive-strength = <16>; 266*4882a593Smuzhiyun }; 267*4882a593Smuzhiyun }; 268*4882a593Smuzhiyun }; 269*4882a593Smuzhiyun }; 270*4882a593Smuzhiyun 271*4882a593Smuzhiyun sata: sata@46000000 { 272*4882a593Smuzhiyun /* The ROM uses this muxmode */ 273*4882a593Smuzhiyun cortina,gemini-ata-muxmode = <0>; 274*4882a593Smuzhiyun cortina,gemini-enable-sata-bridge; 275*4882a593Smuzhiyun status = "okay"; 276*4882a593Smuzhiyun }; 277*4882a593Smuzhiyun 278*4882a593Smuzhiyun gpio0: gpio@4d000000 { 279*4882a593Smuzhiyun pinctrl-names = "default"; 280*4882a593Smuzhiyun pinctrl-0 = <&gpio0_default_pins>; 281*4882a593Smuzhiyun }; 282*4882a593Smuzhiyun 283*4882a593Smuzhiyun gpio1: gpio@4e000000 { 284*4882a593Smuzhiyun pinctrl-names = "default"; 285*4882a593Smuzhiyun pinctrl-0 = <&gpio1_default_pins>; 286*4882a593Smuzhiyun }; 287*4882a593Smuzhiyun 288*4882a593Smuzhiyun ethernet@60000000 { 289*4882a593Smuzhiyun status = "okay"; 290*4882a593Smuzhiyun 291*4882a593Smuzhiyun ethernet-port@0 { 292*4882a593Smuzhiyun phy-mode = "rgmii"; 293*4882a593Smuzhiyun phy-handle = <&phy0>; 294*4882a593Smuzhiyun }; 295*4882a593Smuzhiyun ethernet-port@1 { 296*4882a593Smuzhiyun /* Not used in this platform */ 297*4882a593Smuzhiyun }; 298*4882a593Smuzhiyun }; 299*4882a593Smuzhiyun 300*4882a593Smuzhiyun ide@63000000 { 301*4882a593Smuzhiyun status = "okay"; 302*4882a593Smuzhiyun }; 303*4882a593Smuzhiyun }; 304*4882a593Smuzhiyun}; 305