1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Samsung Exynos5800 SoC device tree source 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (c) 2014 Samsung Electronics Co., Ltd. 6*4882a593Smuzhiyun * http://www.samsung.com 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun * Samsung Exynos5800 SoC device nodes are listed in this file. 9*4882a593Smuzhiyun * Exynos5800 based board files can include this file and provide 10*4882a593Smuzhiyun * values for board specfic bindings. 11*4882a593Smuzhiyun */ 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun#include "exynos5420.dtsi" 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun/ { 16*4882a593Smuzhiyun compatible = "samsung,exynos5800", "samsung,exynos5"; 17*4882a593Smuzhiyun}; 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun&clock { 20*4882a593Smuzhiyun compatible = "samsung,exynos5800-clock", "syscon"; 21*4882a593Smuzhiyun}; 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun&cluster_a15_opp_table { 24*4882a593Smuzhiyun opp-2000000000 { 25*4882a593Smuzhiyun opp-hz = /bits/ 64 <2000000000>; 26*4882a593Smuzhiyun opp-microvolt = <1312500 1312500 1500000>; 27*4882a593Smuzhiyun clock-latency-ns = <140000>; 28*4882a593Smuzhiyun }; 29*4882a593Smuzhiyun opp-1900000000 { 30*4882a593Smuzhiyun opp-hz = /bits/ 64 <1900000000>; 31*4882a593Smuzhiyun opp-microvolt = <1262500 1262500 1500000>; 32*4882a593Smuzhiyun clock-latency-ns = <140000>; 33*4882a593Smuzhiyun }; 34*4882a593Smuzhiyun opp-1800000000 { 35*4882a593Smuzhiyun opp-hz = /bits/ 64 <1800000000>; 36*4882a593Smuzhiyun opp-microvolt = <1237500 1237500 1500000>; 37*4882a593Smuzhiyun clock-latency-ns = <140000>; 38*4882a593Smuzhiyun }; 39*4882a593Smuzhiyun opp-1700000000 { 40*4882a593Smuzhiyun opp-microvolt = <1250000 1250000 1500000>; 41*4882a593Smuzhiyun }; 42*4882a593Smuzhiyun opp-1600000000 { 43*4882a593Smuzhiyun opp-microvolt = <1250000 1250000 1500000>; 44*4882a593Smuzhiyun }; 45*4882a593Smuzhiyun opp-1500000000 { 46*4882a593Smuzhiyun opp-microvolt = <1100000 1100000 1500000>; 47*4882a593Smuzhiyun }; 48*4882a593Smuzhiyun opp-1400000000 { 49*4882a593Smuzhiyun opp-microvolt = <1100000 1100000 1500000>; 50*4882a593Smuzhiyun }; 51*4882a593Smuzhiyun opp-1300000000 { 52*4882a593Smuzhiyun opp-microvolt = <1100000 1100000 1500000>; 53*4882a593Smuzhiyun }; 54*4882a593Smuzhiyun opp-1200000000 { 55*4882a593Smuzhiyun opp-microvolt = <1000000 1000000 1500000>; 56*4882a593Smuzhiyun }; 57*4882a593Smuzhiyun opp-1100000000 { 58*4882a593Smuzhiyun opp-microvolt = <1000000 1000000 1500000>; 59*4882a593Smuzhiyun }; 60*4882a593Smuzhiyun opp-1000000000 { 61*4882a593Smuzhiyun opp-microvolt = <1000000 1000000 1500000>; 62*4882a593Smuzhiyun }; 63*4882a593Smuzhiyun opp-900000000 { 64*4882a593Smuzhiyun opp-microvolt = <1000000 1000000 1500000>; 65*4882a593Smuzhiyun }; 66*4882a593Smuzhiyun opp-800000000 { 67*4882a593Smuzhiyun opp-microvolt = <900000 900000 1500000>; 68*4882a593Smuzhiyun }; 69*4882a593Smuzhiyun opp-700000000 { 70*4882a593Smuzhiyun opp-microvolt = <900000 900000 1500000>; 71*4882a593Smuzhiyun }; 72*4882a593Smuzhiyun opp-600000000 { 73*4882a593Smuzhiyun opp-hz = /bits/ 64 <600000000>; 74*4882a593Smuzhiyun opp-microvolt = <900000 900000 1500000>; 75*4882a593Smuzhiyun clock-latency-ns = <140000>; 76*4882a593Smuzhiyun }; 77*4882a593Smuzhiyun opp-500000000 { 78*4882a593Smuzhiyun opp-hz = /bits/ 64 <500000000>; 79*4882a593Smuzhiyun opp-microvolt = <900000 900000 1500000>; 80*4882a593Smuzhiyun clock-latency-ns = <140000>; 81*4882a593Smuzhiyun }; 82*4882a593Smuzhiyun opp-400000000 { 83*4882a593Smuzhiyun opp-hz = /bits/ 64 <400000000>; 84*4882a593Smuzhiyun opp-microvolt = <900000 900000 1500000>; 85*4882a593Smuzhiyun clock-latency-ns = <140000>; 86*4882a593Smuzhiyun }; 87*4882a593Smuzhiyun opp-300000000 { 88*4882a593Smuzhiyun opp-hz = /bits/ 64 <300000000>; 89*4882a593Smuzhiyun opp-microvolt = <900000 900000 1500000>; 90*4882a593Smuzhiyun clock-latency-ns = <140000>; 91*4882a593Smuzhiyun }; 92*4882a593Smuzhiyun opp-200000000 { 93*4882a593Smuzhiyun opp-hz = /bits/ 64 <200000000>; 94*4882a593Smuzhiyun opp-microvolt = <900000 900000 1500000>; 95*4882a593Smuzhiyun clock-latency-ns = <140000>; 96*4882a593Smuzhiyun }; 97*4882a593Smuzhiyun}; 98*4882a593Smuzhiyun 99*4882a593Smuzhiyun&cluster_a7_opp_table { 100*4882a593Smuzhiyun opp-1400000000 { 101*4882a593Smuzhiyun opp-hz = /bits/ 64 <1400000000>; 102*4882a593Smuzhiyun opp-microvolt = <1275000>; 103*4882a593Smuzhiyun clock-latency-ns = <140000>; 104*4882a593Smuzhiyun }; 105*4882a593Smuzhiyun opp-1300000000 { 106*4882a593Smuzhiyun opp-microvolt = <1250000>; 107*4882a593Smuzhiyun }; 108*4882a593Smuzhiyun opp-1200000000 { 109*4882a593Smuzhiyun opp-microvolt = <1250000>; 110*4882a593Smuzhiyun }; 111*4882a593Smuzhiyun opp-1100000000 { 112*4882a593Smuzhiyun opp-microvolt = <1250000>; 113*4882a593Smuzhiyun }; 114*4882a593Smuzhiyun opp-1000000000 { 115*4882a593Smuzhiyun opp-microvolt = <1100000>; 116*4882a593Smuzhiyun }; 117*4882a593Smuzhiyun opp-900000000 { 118*4882a593Smuzhiyun opp-microvolt = <1100000>; 119*4882a593Smuzhiyun }; 120*4882a593Smuzhiyun opp-800000000 { 121*4882a593Smuzhiyun opp-microvolt = <1100000>; 122*4882a593Smuzhiyun }; 123*4882a593Smuzhiyun opp-700000000 { 124*4882a593Smuzhiyun opp-microvolt = <1000000>; 125*4882a593Smuzhiyun }; 126*4882a593Smuzhiyun opp-600000000 { 127*4882a593Smuzhiyun opp-microvolt = <1000000>; 128*4882a593Smuzhiyun }; 129*4882a593Smuzhiyun opp-500000000 { 130*4882a593Smuzhiyun opp-hz = /bits/ 64 <500000000>; 131*4882a593Smuzhiyun opp-microvolt = <1000000>; 132*4882a593Smuzhiyun clock-latency-ns = <140000>; 133*4882a593Smuzhiyun }; 134*4882a593Smuzhiyun opp-400000000 { 135*4882a593Smuzhiyun opp-hz = /bits/ 64 <400000000>; 136*4882a593Smuzhiyun opp-microvolt = <1000000>; 137*4882a593Smuzhiyun clock-latency-ns = <140000>; 138*4882a593Smuzhiyun }; 139*4882a593Smuzhiyun opp-300000000 { 140*4882a593Smuzhiyun opp-hz = /bits/ 64 <300000000>; 141*4882a593Smuzhiyun opp-microvolt = <900000>; 142*4882a593Smuzhiyun clock-latency-ns = <140000>; 143*4882a593Smuzhiyun }; 144*4882a593Smuzhiyun opp-200000000 { 145*4882a593Smuzhiyun opp-hz = /bits/ 64 <200000000>; 146*4882a593Smuzhiyun opp-microvolt = <900000>; 147*4882a593Smuzhiyun clock-latency-ns = <140000>; 148*4882a593Smuzhiyun }; 149*4882a593Smuzhiyun}; 150*4882a593Smuzhiyun 151*4882a593Smuzhiyun&mfc { 152*4882a593Smuzhiyun compatible = "samsung,mfc-v8"; 153*4882a593Smuzhiyun}; 154*4882a593Smuzhiyun 155*4882a593Smuzhiyun&soc { 156*4882a593Smuzhiyun cam_pd: power-domain@10045100 { 157*4882a593Smuzhiyun compatible = "samsung,exynos4210-pd"; 158*4882a593Smuzhiyun reg = <0x10045100 0x20>; 159*4882a593Smuzhiyun #power-domain-cells = <0>; 160*4882a593Smuzhiyun label = "CAM"; 161*4882a593Smuzhiyun }; 162*4882a593Smuzhiyun}; 163