1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Hardkernel Odroid XU4 board device tree source 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (c) 2015 Krzysztof Kozlowski 6*4882a593Smuzhiyun * Copyright (c) 2014 Collabora Ltd. 7*4882a593Smuzhiyun * Copyright (c) 2013-2015 Samsung Electronics Co., Ltd. 8*4882a593Smuzhiyun * http://www.samsung.com 9*4882a593Smuzhiyun */ 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun/dts-v1/; 12*4882a593Smuzhiyun#include <dt-bindings/sound/samsung-i2s.h> 13*4882a593Smuzhiyun#include "exynos5422-odroidxu3-common.dtsi" 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun/ { 16*4882a593Smuzhiyun model = "Hardkernel Odroid XU4"; 17*4882a593Smuzhiyun compatible = "hardkernel,odroid-xu4", "samsung,exynos5800", \ 18*4882a593Smuzhiyun "samsung,exynos5"; 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun pwmleds { 21*4882a593Smuzhiyun compatible = "pwm-leds"; 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun blueled { 24*4882a593Smuzhiyun label = "blue:heartbeat"; 25*4882a593Smuzhiyun pwms = <&pwm 2 2000000 0>; 26*4882a593Smuzhiyun pwm-names = "pwm2"; 27*4882a593Smuzhiyun max-brightness = <255>; 28*4882a593Smuzhiyun linux,default-trigger = "heartbeat"; 29*4882a593Smuzhiyun }; 30*4882a593Smuzhiyun }; 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun sound: sound { 33*4882a593Smuzhiyun compatible = "samsung,odroid-xu3-audio"; 34*4882a593Smuzhiyun model = "Odroid-XU4"; 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun samsung,audio-routing = "I2S Playback", "Mixer DAI TX"; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun cpu { 39*4882a593Smuzhiyun sound-dai = <&i2s0 0>, <&i2s0 1>; 40*4882a593Smuzhiyun }; 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun codec { 43*4882a593Smuzhiyun sound-dai = <&hdmi>; 44*4882a593Smuzhiyun }; 45*4882a593Smuzhiyun }; 46*4882a593Smuzhiyun}; 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun&i2s0 { 49*4882a593Smuzhiyun status = "okay"; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun assigned-clocks = <&clock CLK_MOUT_EPLL>, 52*4882a593Smuzhiyun <&clock CLK_MOUT_MAU_EPLL>, 53*4882a593Smuzhiyun <&clock CLK_MOUT_USER_MAU_EPLL>, 54*4882a593Smuzhiyun <&clock_audss EXYNOS_MOUT_AUDSS>, 55*4882a593Smuzhiyun <&clock_audss EXYNOS_MOUT_I2S>, 56*4882a593Smuzhiyun <&i2s0 CLK_I2S_RCLK_SRC>, 57*4882a593Smuzhiyun <&clock_audss EXYNOS_DOUT_SRP>, 58*4882a593Smuzhiyun <&clock_audss EXYNOS_DOUT_AUD_BUS>, 59*4882a593Smuzhiyun <&clock_audss EXYNOS_DOUT_I2S>; 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun assigned-clock-parents = <&clock CLK_FOUT_EPLL>, 62*4882a593Smuzhiyun <&clock CLK_MOUT_EPLL>, 63*4882a593Smuzhiyun <&clock CLK_MOUT_MAU_EPLL>, 64*4882a593Smuzhiyun <&clock CLK_MAU_EPLL>, 65*4882a593Smuzhiyun <&clock_audss EXYNOS_MOUT_AUDSS>, 66*4882a593Smuzhiyun <&clock_audss EXYNOS_SCLK_I2S>; 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun assigned-clock-rates = <0>, 69*4882a593Smuzhiyun <0>, 70*4882a593Smuzhiyun <0>, 71*4882a593Smuzhiyun <0>, 72*4882a593Smuzhiyun <0>, 73*4882a593Smuzhiyun <0>, 74*4882a593Smuzhiyun <196608001>, 75*4882a593Smuzhiyun <(196608002 / 2)>, 76*4882a593Smuzhiyun <196608000>; 77*4882a593Smuzhiyun}; 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun&pwm { 80*4882a593Smuzhiyun /* 81*4882a593Smuzhiyun * PWM 0 -- fan 82*4882a593Smuzhiyun * PWM 2 -- Blue LED 83*4882a593Smuzhiyun */ 84*4882a593Smuzhiyun pinctrl-0 = <&pwm0_out &pwm2_out>; 85*4882a593Smuzhiyun pinctrl-names = "default"; 86*4882a593Smuzhiyun samsung,pwm-outputs = <0>, <2>; 87*4882a593Smuzhiyun status = "okay"; 88*4882a593Smuzhiyun}; 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun&usbdrd_dwc3_1 { 91*4882a593Smuzhiyun dr_mode = "host"; 92*4882a593Smuzhiyun}; 93