1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Samsung's Exynos5420 based Arndale Octa board device tree source 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (c) 2013 Samsung Electronics Co., Ltd. 6*4882a593Smuzhiyun * http://www.samsung.com 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun/dts-v1/; 10*4882a593Smuzhiyun#include "exynos5420.dtsi" 11*4882a593Smuzhiyun#include "exynos5420-cpus.dtsi" 12*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h> 13*4882a593Smuzhiyun#include <dt-bindings/interrupt-controller/irq.h> 14*4882a593Smuzhiyun#include <dt-bindings/input/input.h> 15*4882a593Smuzhiyun#include <dt-bindings/clock/samsung,s2mps11.h> 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun/ { 18*4882a593Smuzhiyun model = "Insignal Arndale Octa evaluation board based on Exynos5420"; 19*4882a593Smuzhiyun compatible = "insignal,arndale-octa", "samsung,exynos5420", "samsung,exynos5"; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun memory@20000000 { 22*4882a593Smuzhiyun device_type = "memory"; 23*4882a593Smuzhiyun reg = <0x20000000 0x80000000>; 24*4882a593Smuzhiyun }; 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun chosen { 27*4882a593Smuzhiyun stdout-path = "serial3:115200n8"; 28*4882a593Smuzhiyun }; 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun firmware@2073000 { 31*4882a593Smuzhiyun compatible = "samsung,secure-firmware"; 32*4882a593Smuzhiyun reg = <0x02073000 0x1000>; 33*4882a593Smuzhiyun }; 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun fixed-rate-clocks { 36*4882a593Smuzhiyun oscclk { 37*4882a593Smuzhiyun compatible = "samsung,exynos5420-oscclk"; 38*4882a593Smuzhiyun clock-frequency = <24000000>; 39*4882a593Smuzhiyun }; 40*4882a593Smuzhiyun }; 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun gpio_keys { 43*4882a593Smuzhiyun compatible = "gpio-keys"; 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun wakeup { 46*4882a593Smuzhiyun label = "SW-TACT1"; 47*4882a593Smuzhiyun gpios = <&gpx2 7 GPIO_ACTIVE_LOW>; 48*4882a593Smuzhiyun linux,code = <KEY_WAKEUP>; 49*4882a593Smuzhiyun wakeup-source; 50*4882a593Smuzhiyun }; 51*4882a593Smuzhiyun }; 52*4882a593Smuzhiyun}; 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun&adc { 55*4882a593Smuzhiyun vdd-supply = <&ldo4_reg>; 56*4882a593Smuzhiyun status = "okay"; 57*4882a593Smuzhiyun}; 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun&cci { 60*4882a593Smuzhiyun status = "disabled"; 61*4882a593Smuzhiyun}; 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun&cpu0 { 64*4882a593Smuzhiyun cpu-supply = <&buck2_reg>; 65*4882a593Smuzhiyun}; 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun&cpu4 { 68*4882a593Smuzhiyun cpu-supply = <&buck6_reg>; 69*4882a593Smuzhiyun}; 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun&cpu0_thermal { 72*4882a593Smuzhiyun trips { 73*4882a593Smuzhiyun cpu0_alert0: cpu-alert-0 { 74*4882a593Smuzhiyun temperature = <60000>; /* millicelsius */ 75*4882a593Smuzhiyun hysteresis = <5000>; /* millicelsius */ 76*4882a593Smuzhiyun type = "passive"; 77*4882a593Smuzhiyun }; 78*4882a593Smuzhiyun cpu0_alert1: cpu-alert-1 { 79*4882a593Smuzhiyun temperature = <80000>; /* millicelsius */ 80*4882a593Smuzhiyun hysteresis = <10000>; /* millicelsius */ 81*4882a593Smuzhiyun type = "passive"; 82*4882a593Smuzhiyun }; 83*4882a593Smuzhiyun cpu0_alert2: cpu-alert-2 { 84*4882a593Smuzhiyun temperature = <110000>; /* millicelsius */ 85*4882a593Smuzhiyun hysteresis = <10000>; /* millicelsius */ 86*4882a593Smuzhiyun type = "passive"; 87*4882a593Smuzhiyun }; 88*4882a593Smuzhiyun cpu0_crit0: cpu-crit-0 { 89*4882a593Smuzhiyun temperature = <120000>; /* millicelsius */ 90*4882a593Smuzhiyun hysteresis = <0>; /* millicelsius */ 91*4882a593Smuzhiyun type = "critical"; 92*4882a593Smuzhiyun }; 93*4882a593Smuzhiyun }; 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun cooling-maps { 96*4882a593Smuzhiyun /* 97*4882a593Smuzhiyun * Reduce the CPU speed by 2 steps, down to: 1600 MHz 98*4882a593Smuzhiyun * and 1100 MHz. 99*4882a593Smuzhiyun */ 100*4882a593Smuzhiyun map0 { 101*4882a593Smuzhiyun trip = <&cpu0_alert0>; 102*4882a593Smuzhiyun cooling-device = <&cpu0 0 2>, 103*4882a593Smuzhiyun <&cpu1 0 2>, 104*4882a593Smuzhiyun <&cpu2 0 2>, 105*4882a593Smuzhiyun <&cpu3 0 2>, 106*4882a593Smuzhiyun <&cpu4 0 2>, 107*4882a593Smuzhiyun <&cpu5 0 2>, 108*4882a593Smuzhiyun <&cpu6 0 2>, 109*4882a593Smuzhiyun <&cpu7 0 2>; 110*4882a593Smuzhiyun }; 111*4882a593Smuzhiyun 112*4882a593Smuzhiyun /* 113*4882a593Smuzhiyun * Reduce the CPU speed down to 1200 MHz big (6 steps) 114*4882a593Smuzhiyun * and 800 MHz LITTLE (5 steps). 115*4882a593Smuzhiyun */ 116*4882a593Smuzhiyun map1 { 117*4882a593Smuzhiyun trip = <&cpu0_alert1>; 118*4882a593Smuzhiyun cooling-device = <&cpu0 3 6>, 119*4882a593Smuzhiyun <&cpu1 3 6>, 120*4882a593Smuzhiyun <&cpu2 3 6>, 121*4882a593Smuzhiyun <&cpu3 3 6>, 122*4882a593Smuzhiyun <&cpu4 3 5>, 123*4882a593Smuzhiyun <&cpu5 3 5>, 124*4882a593Smuzhiyun <&cpu6 3 5>, 125*4882a593Smuzhiyun <&cpu7 3 5>; 126*4882a593Smuzhiyun }; 127*4882a593Smuzhiyun 128*4882a593Smuzhiyun /* 129*4882a593Smuzhiyun * Reduce the CPU speed as much as possible, down to 700 MHz 130*4882a593Smuzhiyun * big (11 steps) and 600 MHz LITTLE (7 steps). 131*4882a593Smuzhiyun */ 132*4882a593Smuzhiyun map2 { 133*4882a593Smuzhiyun trip = <&cpu0_alert2>; 134*4882a593Smuzhiyun cooling-device = <&cpu0 6 11>, 135*4882a593Smuzhiyun <&cpu1 6 11>, 136*4882a593Smuzhiyun <&cpu2 6 11>, 137*4882a593Smuzhiyun <&cpu3 6 11>, 138*4882a593Smuzhiyun <&cpu4 5 7>, 139*4882a593Smuzhiyun <&cpu5 5 7>, 140*4882a593Smuzhiyun <&cpu6 5 7>, 141*4882a593Smuzhiyun <&cpu7 5 7>; 142*4882a593Smuzhiyun }; 143*4882a593Smuzhiyun }; 144*4882a593Smuzhiyun}; 145*4882a593Smuzhiyun 146*4882a593Smuzhiyun&cpu1_thermal { 147*4882a593Smuzhiyun trips { 148*4882a593Smuzhiyun cpu1_alert0: cpu-alert-0 { 149*4882a593Smuzhiyun temperature = <60000>; /* millicelsius */ 150*4882a593Smuzhiyun hysteresis = <5000>; /* millicelsius */ 151*4882a593Smuzhiyun type = "passive"; 152*4882a593Smuzhiyun }; 153*4882a593Smuzhiyun cpu1_alert1: cpu-alert-1 { 154*4882a593Smuzhiyun temperature = <80000>; /* millicelsius */ 155*4882a593Smuzhiyun hysteresis = <10000>; /* millicelsius */ 156*4882a593Smuzhiyun type = "passive"; 157*4882a593Smuzhiyun }; 158*4882a593Smuzhiyun cpu1_alert2: cpu-alert-2 { 159*4882a593Smuzhiyun temperature = <110000>; /* millicelsius */ 160*4882a593Smuzhiyun hysteresis = <10000>; /* millicelsius */ 161*4882a593Smuzhiyun type = "passive"; 162*4882a593Smuzhiyun }; 163*4882a593Smuzhiyun cpu1_crit0: cpu-crit-0 { 164*4882a593Smuzhiyun temperature = <120000>; /* millicelsius */ 165*4882a593Smuzhiyun hysteresis = <0>; /* millicelsius */ 166*4882a593Smuzhiyun type = "critical"; 167*4882a593Smuzhiyun }; 168*4882a593Smuzhiyun }; 169*4882a593Smuzhiyun 170*4882a593Smuzhiyun cooling-maps { 171*4882a593Smuzhiyun map0 { 172*4882a593Smuzhiyun trip = <&cpu1_alert0>; 173*4882a593Smuzhiyun cooling-device = <&cpu0 0 2>, 174*4882a593Smuzhiyun <&cpu1 0 2>, 175*4882a593Smuzhiyun <&cpu2 0 2>, 176*4882a593Smuzhiyun <&cpu3 0 2>, 177*4882a593Smuzhiyun <&cpu4 0 2>, 178*4882a593Smuzhiyun <&cpu5 0 2>, 179*4882a593Smuzhiyun <&cpu6 0 2>, 180*4882a593Smuzhiyun <&cpu7 0 2>; 181*4882a593Smuzhiyun }; 182*4882a593Smuzhiyun 183*4882a593Smuzhiyun map1 { 184*4882a593Smuzhiyun trip = <&cpu1_alert1>; 185*4882a593Smuzhiyun cooling-device = <&cpu0 3 6>, 186*4882a593Smuzhiyun <&cpu1 3 6>, 187*4882a593Smuzhiyun <&cpu2 3 6>, 188*4882a593Smuzhiyun <&cpu3 3 6>, 189*4882a593Smuzhiyun <&cpu4 3 5>, 190*4882a593Smuzhiyun <&cpu5 3 5>, 191*4882a593Smuzhiyun <&cpu6 3 5>, 192*4882a593Smuzhiyun <&cpu7 3 5>; 193*4882a593Smuzhiyun }; 194*4882a593Smuzhiyun 195*4882a593Smuzhiyun map2 { 196*4882a593Smuzhiyun trip = <&cpu1_alert2>; 197*4882a593Smuzhiyun cooling-device = <&cpu0 6 11>, 198*4882a593Smuzhiyun <&cpu1 6 11>, 199*4882a593Smuzhiyun <&cpu2 6 11>, 200*4882a593Smuzhiyun <&cpu3 6 11>, 201*4882a593Smuzhiyun <&cpu4 5 7>, 202*4882a593Smuzhiyun <&cpu5 5 7>, 203*4882a593Smuzhiyun <&cpu6 5 7>, 204*4882a593Smuzhiyun <&cpu7 5 7>; 205*4882a593Smuzhiyun }; 206*4882a593Smuzhiyun }; 207*4882a593Smuzhiyun}; 208*4882a593Smuzhiyun 209*4882a593Smuzhiyun&cpu2_thermal { 210*4882a593Smuzhiyun trips { 211*4882a593Smuzhiyun cpu2_alert0: cpu-alert-0 { 212*4882a593Smuzhiyun temperature = <60000>; /* millicelsius */ 213*4882a593Smuzhiyun hysteresis = <5000>; /* millicelsius */ 214*4882a593Smuzhiyun type = "passive"; 215*4882a593Smuzhiyun }; 216*4882a593Smuzhiyun cpu2_alert1: cpu-alert-1 { 217*4882a593Smuzhiyun temperature = <80000>; /* millicelsius */ 218*4882a593Smuzhiyun hysteresis = <10000>; /* millicelsius */ 219*4882a593Smuzhiyun type = "passive"; 220*4882a593Smuzhiyun }; 221*4882a593Smuzhiyun cpu2_alert2: cpu-alert-2 { 222*4882a593Smuzhiyun temperature = <110000>; /* millicelsius */ 223*4882a593Smuzhiyun hysteresis = <10000>; /* millicelsius */ 224*4882a593Smuzhiyun type = "passive"; 225*4882a593Smuzhiyun }; 226*4882a593Smuzhiyun cpu2_crit0: cpu-crit-0 { 227*4882a593Smuzhiyun temperature = <120000>; /* millicelsius */ 228*4882a593Smuzhiyun hysteresis = <0>; /* millicelsius */ 229*4882a593Smuzhiyun type = "critical"; 230*4882a593Smuzhiyun }; 231*4882a593Smuzhiyun }; 232*4882a593Smuzhiyun 233*4882a593Smuzhiyun cooling-maps { 234*4882a593Smuzhiyun map0 { 235*4882a593Smuzhiyun trip = <&cpu2_alert0>; 236*4882a593Smuzhiyun cooling-device = <&cpu0 0 2>, 237*4882a593Smuzhiyun <&cpu1 0 2>, 238*4882a593Smuzhiyun <&cpu2 0 2>, 239*4882a593Smuzhiyun <&cpu3 0 2>, 240*4882a593Smuzhiyun <&cpu4 0 2>, 241*4882a593Smuzhiyun <&cpu5 0 2>, 242*4882a593Smuzhiyun <&cpu6 0 2>, 243*4882a593Smuzhiyun <&cpu7 0 2>; 244*4882a593Smuzhiyun }; 245*4882a593Smuzhiyun 246*4882a593Smuzhiyun map1 { 247*4882a593Smuzhiyun trip = <&cpu2_alert1>; 248*4882a593Smuzhiyun cooling-device = <&cpu0 3 6>, 249*4882a593Smuzhiyun <&cpu1 3 6>, 250*4882a593Smuzhiyun <&cpu2 3 6>, 251*4882a593Smuzhiyun <&cpu3 3 6>, 252*4882a593Smuzhiyun <&cpu4 3 5>, 253*4882a593Smuzhiyun <&cpu5 3 5>, 254*4882a593Smuzhiyun <&cpu6 3 5>, 255*4882a593Smuzhiyun <&cpu7 3 5>; 256*4882a593Smuzhiyun }; 257*4882a593Smuzhiyun 258*4882a593Smuzhiyun map2 { 259*4882a593Smuzhiyun trip = <&cpu2_alert2>; 260*4882a593Smuzhiyun cooling-device = <&cpu0 6 11>, 261*4882a593Smuzhiyun <&cpu1 6 11>, 262*4882a593Smuzhiyun <&cpu2 6 11>, 263*4882a593Smuzhiyun <&cpu3 6 11>, 264*4882a593Smuzhiyun <&cpu4 6 7>, 265*4882a593Smuzhiyun <&cpu5 6 7>, 266*4882a593Smuzhiyun <&cpu6 6 7>, 267*4882a593Smuzhiyun <&cpu7 6 7>; 268*4882a593Smuzhiyun }; 269*4882a593Smuzhiyun }; 270*4882a593Smuzhiyun}; 271*4882a593Smuzhiyun 272*4882a593Smuzhiyun&cpu3_thermal { 273*4882a593Smuzhiyun trips { 274*4882a593Smuzhiyun cpu3_alert0: cpu-alert-0 { 275*4882a593Smuzhiyun temperature = <60000>; /* millicelsius */ 276*4882a593Smuzhiyun hysteresis = <5000>; /* millicelsius */ 277*4882a593Smuzhiyun type = "passive"; 278*4882a593Smuzhiyun }; 279*4882a593Smuzhiyun cpu3_alert1: cpu-alert-1 { 280*4882a593Smuzhiyun temperature = <80000>; /* millicelsius */ 281*4882a593Smuzhiyun hysteresis = <10000>; /* millicelsius */ 282*4882a593Smuzhiyun type = "passive"; 283*4882a593Smuzhiyun }; 284*4882a593Smuzhiyun cpu3_alert2: cpu-alert-2 { 285*4882a593Smuzhiyun temperature = <110000>; /* millicelsius */ 286*4882a593Smuzhiyun hysteresis = <10000>; /* millicelsius */ 287*4882a593Smuzhiyun type = "passive"; 288*4882a593Smuzhiyun }; 289*4882a593Smuzhiyun cpu3_crit0: cpu-crit-0 { 290*4882a593Smuzhiyun temperature = <120000>; /* millicelsius */ 291*4882a593Smuzhiyun hysteresis = <0>; /* millicelsius */ 292*4882a593Smuzhiyun type = "critical"; 293*4882a593Smuzhiyun }; 294*4882a593Smuzhiyun }; 295*4882a593Smuzhiyun 296*4882a593Smuzhiyun cooling-maps { 297*4882a593Smuzhiyun map0 { 298*4882a593Smuzhiyun trip = <&cpu3_alert0>; 299*4882a593Smuzhiyun cooling-device = <&cpu0 0 2>, 300*4882a593Smuzhiyun <&cpu1 0 2>, 301*4882a593Smuzhiyun <&cpu2 0 2>, 302*4882a593Smuzhiyun <&cpu3 0 2>, 303*4882a593Smuzhiyun <&cpu4 0 2>, 304*4882a593Smuzhiyun <&cpu5 0 2>, 305*4882a593Smuzhiyun <&cpu6 0 2>, 306*4882a593Smuzhiyun <&cpu7 0 2>; 307*4882a593Smuzhiyun }; 308*4882a593Smuzhiyun 309*4882a593Smuzhiyun map1 { 310*4882a593Smuzhiyun trip = <&cpu3_alert1>; 311*4882a593Smuzhiyun cooling-device = <&cpu0 3 6>, 312*4882a593Smuzhiyun <&cpu1 3 6>, 313*4882a593Smuzhiyun <&cpu2 3 6>, 314*4882a593Smuzhiyun <&cpu3 3 6>, 315*4882a593Smuzhiyun <&cpu4 3 5>, 316*4882a593Smuzhiyun <&cpu5 3 5>, 317*4882a593Smuzhiyun <&cpu6 3 5>, 318*4882a593Smuzhiyun <&cpu7 3 5>; 319*4882a593Smuzhiyun }; 320*4882a593Smuzhiyun 321*4882a593Smuzhiyun map2 { 322*4882a593Smuzhiyun trip = <&cpu3_alert2>; 323*4882a593Smuzhiyun cooling-device = <&cpu0 6 11>, 324*4882a593Smuzhiyun <&cpu1 6 11>, 325*4882a593Smuzhiyun <&cpu2 6 11>, 326*4882a593Smuzhiyun <&cpu3 6 11>, 327*4882a593Smuzhiyun <&cpu4 5 7>, 328*4882a593Smuzhiyun <&cpu5 5 7>, 329*4882a593Smuzhiyun <&cpu6 5 7>, 330*4882a593Smuzhiyun <&cpu7 5 7>; 331*4882a593Smuzhiyun }; 332*4882a593Smuzhiyun }; 333*4882a593Smuzhiyun}; 334*4882a593Smuzhiyun 335*4882a593Smuzhiyun&hdmi { 336*4882a593Smuzhiyun hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>; 337*4882a593Smuzhiyun vdd_osc-supply = <&ldo7_reg>; 338*4882a593Smuzhiyun vdd_pll-supply = <&ldo6_reg>; 339*4882a593Smuzhiyun vdd-supply = <&ldo6_reg>; 340*4882a593Smuzhiyun ddc = <&i2c_2>; 341*4882a593Smuzhiyun status = "okay"; 342*4882a593Smuzhiyun}; 343*4882a593Smuzhiyun 344*4882a593Smuzhiyun&hsi2c_4 { 345*4882a593Smuzhiyun status = "okay"; 346*4882a593Smuzhiyun 347*4882a593Smuzhiyun s2mps11_pmic@66 { 348*4882a593Smuzhiyun compatible = "samsung,s2mps11-pmic"; 349*4882a593Smuzhiyun reg = <0x66>; 350*4882a593Smuzhiyun 351*4882a593Smuzhiyun interrupt-parent = <&gpx3>; 352*4882a593Smuzhiyun interrupts = <2 IRQ_TYPE_LEVEL_LOW>; 353*4882a593Smuzhiyun pinctrl-names = "default"; 354*4882a593Smuzhiyun pinctrl-0 = <&s2mps11_irq>; 355*4882a593Smuzhiyun 356*4882a593Smuzhiyun s2mps11_osc: clocks { 357*4882a593Smuzhiyun compatible = "samsung,s2mps11-clk"; 358*4882a593Smuzhiyun #clock-cells = <1>; 359*4882a593Smuzhiyun clock-output-names = "s2mps11_ap", 360*4882a593Smuzhiyun "s2mps11_cp", "s2mps11_bt"; 361*4882a593Smuzhiyun }; 362*4882a593Smuzhiyun 363*4882a593Smuzhiyun regulators { 364*4882a593Smuzhiyun ldo1_reg: LDO1 { 365*4882a593Smuzhiyun regulator-name = "PVDD_ALIVE_1V0"; 366*4882a593Smuzhiyun regulator-min-microvolt = <1000000>; 367*4882a593Smuzhiyun regulator-max-microvolt = <1000000>; 368*4882a593Smuzhiyun regulator-always-on; 369*4882a593Smuzhiyun }; 370*4882a593Smuzhiyun 371*4882a593Smuzhiyun ldo2_reg: LDO2 { 372*4882a593Smuzhiyun regulator-name = "PVDD_APIO_1V8"; 373*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 374*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 375*4882a593Smuzhiyun regulator-always-on; 376*4882a593Smuzhiyun }; 377*4882a593Smuzhiyun 378*4882a593Smuzhiyun ldo3_reg: LDO3 { 379*4882a593Smuzhiyun regulator-name = "PVDD_APIO_MMCON_1V8"; 380*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 381*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 382*4882a593Smuzhiyun /* 383*4882a593Smuzhiyun * Must be always on, even though there is 384*4882a593Smuzhiyun * a consumer (mmc_0). Otherwise the board 385*4882a593Smuzhiyun * does not reboot with vendor U-Boot 386*4882a593Smuzhiyun * (Linaro for Arndale Octa, v2012.07). 387*4882a593Smuzhiyun */ 388*4882a593Smuzhiyun regulator-always-on; 389*4882a593Smuzhiyun 390*4882a593Smuzhiyun regulator-state-mem { 391*4882a593Smuzhiyun regulator-off-in-suspend; 392*4882a593Smuzhiyun }; 393*4882a593Smuzhiyun }; 394*4882a593Smuzhiyun 395*4882a593Smuzhiyun ldo4_reg: LDO4 { 396*4882a593Smuzhiyun regulator-name = "PVDD_ADC_1V8"; 397*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 398*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 399*4882a593Smuzhiyun }; 400*4882a593Smuzhiyun 401*4882a593Smuzhiyun ldo5_reg: LDO5 { 402*4882a593Smuzhiyun regulator-name = "PVDD_PLL_1V8"; 403*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 404*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 405*4882a593Smuzhiyun regulator-always-on; 406*4882a593Smuzhiyun }; 407*4882a593Smuzhiyun 408*4882a593Smuzhiyun ldo6_reg: LDO6 { 409*4882a593Smuzhiyun regulator-name = "PVDD_ANAIP_1V0"; 410*4882a593Smuzhiyun regulator-min-microvolt = <1000000>; 411*4882a593Smuzhiyun regulator-max-microvolt = <1000000>; 412*4882a593Smuzhiyun }; 413*4882a593Smuzhiyun 414*4882a593Smuzhiyun ldo7_reg: LDO7 { 415*4882a593Smuzhiyun regulator-name = "PVDD_ANAIP_1V8"; 416*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 417*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 418*4882a593Smuzhiyun 419*4882a593Smuzhiyun regulator-state-mem { 420*4882a593Smuzhiyun regulator-off-in-suspend; 421*4882a593Smuzhiyun }; 422*4882a593Smuzhiyun }; 423*4882a593Smuzhiyun 424*4882a593Smuzhiyun ldo8_reg: LDO8 { 425*4882a593Smuzhiyun regulator-name = "PVDD_ABB_1V8"; 426*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 427*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 428*4882a593Smuzhiyun regulator-always-on; 429*4882a593Smuzhiyun }; 430*4882a593Smuzhiyun 431*4882a593Smuzhiyun ldo9_reg: LDO9 { 432*4882a593Smuzhiyun regulator-name = "PVDD_USB_3V3"; 433*4882a593Smuzhiyun regulator-min-microvolt = <3000000>; 434*4882a593Smuzhiyun regulator-max-microvolt = <3000000>; 435*4882a593Smuzhiyun regulator-always-on; 436*4882a593Smuzhiyun }; 437*4882a593Smuzhiyun 438*4882a593Smuzhiyun ldo10_reg: LDO10 { 439*4882a593Smuzhiyun regulator-name = "PVDD_PRE_1V8"; 440*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 441*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 442*4882a593Smuzhiyun regulator-always-on; 443*4882a593Smuzhiyun }; 444*4882a593Smuzhiyun 445*4882a593Smuzhiyun ldo11_reg: LDO11 { 446*4882a593Smuzhiyun regulator-name = "PVDD_USB_1V0"; 447*4882a593Smuzhiyun regulator-min-microvolt = <1000000>; 448*4882a593Smuzhiyun regulator-max-microvolt = <1000000>; 449*4882a593Smuzhiyun regulator-always-on; 450*4882a593Smuzhiyun }; 451*4882a593Smuzhiyun 452*4882a593Smuzhiyun ldo12_reg: LDO12 { 453*4882a593Smuzhiyun regulator-name = "PVDD_HSIC_1V8"; 454*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 455*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 456*4882a593Smuzhiyun }; 457*4882a593Smuzhiyun 458*4882a593Smuzhiyun ldo13_reg: LDO13 { 459*4882a593Smuzhiyun regulator-name = "PVDD_APIO_MMCOFF_2V8"; 460*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 461*4882a593Smuzhiyun regulator-max-microvolt = <2800000>; 462*4882a593Smuzhiyun 463*4882a593Smuzhiyun regulator-state-mem { 464*4882a593Smuzhiyun regulator-off-in-suspend; 465*4882a593Smuzhiyun }; 466*4882a593Smuzhiyun }; 467*4882a593Smuzhiyun 468*4882a593Smuzhiyun ldo14_reg: LDO14 { 469*4882a593Smuzhiyun /* Unused */ 470*4882a593Smuzhiyun regulator-name = "PVDD_LDO14"; 471*4882a593Smuzhiyun regulator-min-microvolt = <800000>; 472*4882a593Smuzhiyun regulator-max-microvolt = <3950000>; 473*4882a593Smuzhiyun }; 474*4882a593Smuzhiyun 475*4882a593Smuzhiyun ldo15_reg: LDO15 { 476*4882a593Smuzhiyun regulator-name = "PVDD_PERI_2V8"; 477*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 478*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 479*4882a593Smuzhiyun 480*4882a593Smuzhiyun regulator-state-mem { 481*4882a593Smuzhiyun regulator-on-in-suspend; 482*4882a593Smuzhiyun }; 483*4882a593Smuzhiyun }; 484*4882a593Smuzhiyun 485*4882a593Smuzhiyun ldo16_reg: LDO16 { 486*4882a593Smuzhiyun regulator-name = "PVDD_PERI_3V3"; 487*4882a593Smuzhiyun regulator-min-microvolt = <2200000>; 488*4882a593Smuzhiyun regulator-max-microvolt = <2200000>; 489*4882a593Smuzhiyun 490*4882a593Smuzhiyun regulator-state-mem { 491*4882a593Smuzhiyun regulator-on-in-suspend; 492*4882a593Smuzhiyun }; 493*4882a593Smuzhiyun }; 494*4882a593Smuzhiyun 495*4882a593Smuzhiyun ldo17_reg: LDO17 { 496*4882a593Smuzhiyun /* Unused */ 497*4882a593Smuzhiyun regulator-name = "PVDD_LDO17"; 498*4882a593Smuzhiyun regulator-min-microvolt = <800000>; 499*4882a593Smuzhiyun regulator-max-microvolt = <3950000>; 500*4882a593Smuzhiyun }; 501*4882a593Smuzhiyun 502*4882a593Smuzhiyun ldo18_reg: LDO18 { 503*4882a593Smuzhiyun regulator-name = "PVDD_EMMC_1V8"; 504*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 505*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 506*4882a593Smuzhiyun /* 507*4882a593Smuzhiyun * Must stay in "off" mode during shutdown for 508*4882a593Smuzhiyun * proper eMMC reset. The "off" mode is in 509*4882a593Smuzhiyun * fact controlled by LDO18EN. The eMMC does 510*4882a593Smuzhiyun * not have reset pin connected so the reset 511*4882a593Smuzhiyun * will be triggered by falling edge of 512*4882a593Smuzhiyun * LDO18EN. 513*4882a593Smuzhiyun */ 514*4882a593Smuzhiyun 515*4882a593Smuzhiyun regulator-state-mem { 516*4882a593Smuzhiyun regulator-off-in-suspend; 517*4882a593Smuzhiyun }; 518*4882a593Smuzhiyun }; 519*4882a593Smuzhiyun 520*4882a593Smuzhiyun ldo19_reg: LDO19 { 521*4882a593Smuzhiyun regulator-name = "PVDD_TFLASH_2V8"; 522*4882a593Smuzhiyun regulator-min-microvolt = <2800000>; 523*4882a593Smuzhiyun regulator-max-microvolt = <2800000>; 524*4882a593Smuzhiyun 525*4882a593Smuzhiyun regulator-state-mem { 526*4882a593Smuzhiyun regulator-off-in-suspend; 527*4882a593Smuzhiyun }; 528*4882a593Smuzhiyun }; 529*4882a593Smuzhiyun 530*4882a593Smuzhiyun ldo20_reg: LDO20 { 531*4882a593Smuzhiyun regulator-name = "PVDD_BTWIFI_1V8"; 532*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 533*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 534*4882a593Smuzhiyun }; 535*4882a593Smuzhiyun 536*4882a593Smuzhiyun ldo21_reg: LDO21 { 537*4882a593Smuzhiyun regulator-name = "PVDD_CAM1IO_1V8"; 538*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 539*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 540*4882a593Smuzhiyun }; 541*4882a593Smuzhiyun 542*4882a593Smuzhiyun ldo22_reg: LDO22 { 543*4882a593Smuzhiyun /* Unused */ 544*4882a593Smuzhiyun regulator-name = "PVDD_LDO22"; 545*4882a593Smuzhiyun regulator-min-microvolt = <800000>; 546*4882a593Smuzhiyun regulator-max-microvolt = <2375000>; 547*4882a593Smuzhiyun }; 548*4882a593Smuzhiyun 549*4882a593Smuzhiyun ldo23_reg: LDO23 { 550*4882a593Smuzhiyun regulator-name = "PVDD_MIFS_1V1"; 551*4882a593Smuzhiyun regulator-min-microvolt = <800000>; 552*4882a593Smuzhiyun regulator-max-microvolt = <1100000>; 553*4882a593Smuzhiyun regulator-always-on; 554*4882a593Smuzhiyun 555*4882a593Smuzhiyun regulator-state-mem { 556*4882a593Smuzhiyun regulator-on-in-suspend; 557*4882a593Smuzhiyun }; 558*4882a593Smuzhiyun }; 559*4882a593Smuzhiyun 560*4882a593Smuzhiyun ldo24_reg: LDO24 { 561*4882a593Smuzhiyun regulator-name = "PVDD_CAM1_AVDD_2V8"; 562*4882a593Smuzhiyun regulator-min-microvolt = <2800000>; 563*4882a593Smuzhiyun regulator-max-microvolt = <2800000>; 564*4882a593Smuzhiyun 565*4882a593Smuzhiyun regulator-state-mem { 566*4882a593Smuzhiyun regulator-on-in-suspend; 567*4882a593Smuzhiyun }; 568*4882a593Smuzhiyun }; 569*4882a593Smuzhiyun 570*4882a593Smuzhiyun ldo25_reg: LDO25 { 571*4882a593Smuzhiyun /* Unused */ 572*4882a593Smuzhiyun regulator-name = "PVDD_LDO25"; 573*4882a593Smuzhiyun regulator-min-microvolt = <800000>; 574*4882a593Smuzhiyun regulator-max-microvolt = <3950000>; 575*4882a593Smuzhiyun }; 576*4882a593Smuzhiyun 577*4882a593Smuzhiyun ldo26_reg: LDO26 { 578*4882a593Smuzhiyun regulator-name = "PVDD_CAM0_AF_2V8"; 579*4882a593Smuzhiyun regulator-min-microvolt = <3000000>; 580*4882a593Smuzhiyun regulator-max-microvolt = <3000000>; 581*4882a593Smuzhiyun }; 582*4882a593Smuzhiyun 583*4882a593Smuzhiyun ldo27_reg: LDO27 { 584*4882a593Smuzhiyun regulator-name = "PVDD_G3DS_1V0"; 585*4882a593Smuzhiyun regulator-min-microvolt = <800000>; 586*4882a593Smuzhiyun regulator-max-microvolt = <1100000>; 587*4882a593Smuzhiyun regulator-always-on; 588*4882a593Smuzhiyun 589*4882a593Smuzhiyun regulator-state-mem { 590*4882a593Smuzhiyun regulator-on-in-suspend; 591*4882a593Smuzhiyun }; 592*4882a593Smuzhiyun }; 593*4882a593Smuzhiyun 594*4882a593Smuzhiyun ldo28_reg: LDO28 { 595*4882a593Smuzhiyun regulator-name = "PVDD_TSP_3V3"; 596*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 597*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 598*4882a593Smuzhiyun }; 599*4882a593Smuzhiyun 600*4882a593Smuzhiyun ldo29_reg: LDO29 { 601*4882a593Smuzhiyun regulator-name = "PVDD_AUDIO_1V8"; 602*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 603*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 604*4882a593Smuzhiyun }; 605*4882a593Smuzhiyun 606*4882a593Smuzhiyun ldo30_reg: LDO30 { 607*4882a593Smuzhiyun /* Unused */ 608*4882a593Smuzhiyun regulator-name = "PVDD_LDO30"; 609*4882a593Smuzhiyun regulator-min-microvolt = <800000>; 610*4882a593Smuzhiyun regulator-max-microvolt = <3950000>; 611*4882a593Smuzhiyun }; 612*4882a593Smuzhiyun 613*4882a593Smuzhiyun ldo31_reg: LDO31 { 614*4882a593Smuzhiyun regulator-name = "PVDD_PERI_1V8"; 615*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 616*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 617*4882a593Smuzhiyun }; 618*4882a593Smuzhiyun 619*4882a593Smuzhiyun ldo32_reg: LDO32 { 620*4882a593Smuzhiyun regulator-name = "PVDD_LCD_1V8"; 621*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 622*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 623*4882a593Smuzhiyun }; 624*4882a593Smuzhiyun 625*4882a593Smuzhiyun ldo33_reg: LDO33 { 626*4882a593Smuzhiyun regulator-name = "PVDD_CAM0IO_1V8"; 627*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 628*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 629*4882a593Smuzhiyun }; 630*4882a593Smuzhiyun 631*4882a593Smuzhiyun ldo34_reg: LDO34 { 632*4882a593Smuzhiyun /* Unused */ 633*4882a593Smuzhiyun regulator-name = "PVDD_LDO34"; 634*4882a593Smuzhiyun regulator-min-microvolt = <800000>; 635*4882a593Smuzhiyun regulator-max-microvolt = <3950000>; 636*4882a593Smuzhiyun }; 637*4882a593Smuzhiyun 638*4882a593Smuzhiyun ldo35_reg: LDO35 { 639*4882a593Smuzhiyun regulator-name = "PVDD_CAM0_DVDD_1V2"; 640*4882a593Smuzhiyun regulator-min-microvolt = <1200000>; 641*4882a593Smuzhiyun regulator-max-microvolt = <1200000>; 642*4882a593Smuzhiyun }; 643*4882a593Smuzhiyun 644*4882a593Smuzhiyun ldo36_reg: LDO36 { 645*4882a593Smuzhiyun /* Unused */ 646*4882a593Smuzhiyun regulator-name = "PVDD_LDO36"; 647*4882a593Smuzhiyun regulator-min-microvolt = <800000>; 648*4882a593Smuzhiyun regulator-max-microvolt = <3950000>; 649*4882a593Smuzhiyun }; 650*4882a593Smuzhiyun 651*4882a593Smuzhiyun ldo37_reg: LDO37 { 652*4882a593Smuzhiyun /* Unused */ 653*4882a593Smuzhiyun regulator-name = "PVDD_LDO37"; 654*4882a593Smuzhiyun regulator-min-microvolt = <800000>; 655*4882a593Smuzhiyun regulator-max-microvolt = <3950000>; 656*4882a593Smuzhiyun }; 657*4882a593Smuzhiyun 658*4882a593Smuzhiyun ldo38_reg: LDO38 { 659*4882a593Smuzhiyun regulator-name = "PVDD_CAM0_AVDD_2V8"; 660*4882a593Smuzhiyun regulator-min-microvolt = <2800000>; 661*4882a593Smuzhiyun regulator-max-microvolt = <2800000>; 662*4882a593Smuzhiyun }; 663*4882a593Smuzhiyun 664*4882a593Smuzhiyun buck1_reg: BUCK1 { 665*4882a593Smuzhiyun regulator-name = "PVDD_MIF_1V1"; 666*4882a593Smuzhiyun regulator-min-microvolt = <800000>; 667*4882a593Smuzhiyun regulator-max-microvolt = <1300000>; 668*4882a593Smuzhiyun regulator-always-on; 669*4882a593Smuzhiyun 670*4882a593Smuzhiyun regulator-state-mem { 671*4882a593Smuzhiyun regulator-off-in-suspend; 672*4882a593Smuzhiyun }; 673*4882a593Smuzhiyun }; 674*4882a593Smuzhiyun 675*4882a593Smuzhiyun buck2_reg: BUCK2 { 676*4882a593Smuzhiyun regulator-name = "PVDD_ARM_1V0"; 677*4882a593Smuzhiyun regulator-min-microvolt = <800000>; 678*4882a593Smuzhiyun regulator-max-microvolt = <1500000>; 679*4882a593Smuzhiyun regulator-always-on; 680*4882a593Smuzhiyun 681*4882a593Smuzhiyun regulator-state-mem { 682*4882a593Smuzhiyun regulator-off-in-suspend; 683*4882a593Smuzhiyun }; 684*4882a593Smuzhiyun }; 685*4882a593Smuzhiyun 686*4882a593Smuzhiyun buck3_reg: BUCK3 { 687*4882a593Smuzhiyun regulator-name = "PVDD_INT_1V0"; 688*4882a593Smuzhiyun regulator-min-microvolt = <800000>; 689*4882a593Smuzhiyun regulator-max-microvolt = <1400000>; 690*4882a593Smuzhiyun regulator-always-on; 691*4882a593Smuzhiyun 692*4882a593Smuzhiyun regulator-state-mem { 693*4882a593Smuzhiyun regulator-off-in-suspend; 694*4882a593Smuzhiyun }; 695*4882a593Smuzhiyun }; 696*4882a593Smuzhiyun 697*4882a593Smuzhiyun buck4_reg: BUCK4 { 698*4882a593Smuzhiyun regulator-name = "PVDD_G3D_1V0"; 699*4882a593Smuzhiyun regulator-min-microvolt = <800000>; 700*4882a593Smuzhiyun regulator-max-microvolt = <1400000>; 701*4882a593Smuzhiyun regulator-always-on; 702*4882a593Smuzhiyun 703*4882a593Smuzhiyun regulator-state-mem { 704*4882a593Smuzhiyun regulator-off-in-suspend; 705*4882a593Smuzhiyun }; 706*4882a593Smuzhiyun }; 707*4882a593Smuzhiyun 708*4882a593Smuzhiyun buck5_reg: BUCK5 { 709*4882a593Smuzhiyun regulator-name = "PVDD_LPDDR3_1V2"; 710*4882a593Smuzhiyun regulator-min-microvolt = <800000>; 711*4882a593Smuzhiyun regulator-max-microvolt = <1400000>; 712*4882a593Smuzhiyun regulator-always-on; 713*4882a593Smuzhiyun }; 714*4882a593Smuzhiyun 715*4882a593Smuzhiyun buck6_reg: BUCK6 { 716*4882a593Smuzhiyun regulator-name = "PVDD_KFC_1V0"; 717*4882a593Smuzhiyun regulator-min-microvolt = <800000>; 718*4882a593Smuzhiyun regulator-max-microvolt = <1500000>; 719*4882a593Smuzhiyun regulator-always-on; 720*4882a593Smuzhiyun 721*4882a593Smuzhiyun regulator-state-mem { 722*4882a593Smuzhiyun regulator-off-in-suspend; 723*4882a593Smuzhiyun }; 724*4882a593Smuzhiyun }; 725*4882a593Smuzhiyun 726*4882a593Smuzhiyun buck7_reg: BUCK7 { 727*4882a593Smuzhiyun regulator-name = "VIN_LLDO_1V4"; 728*4882a593Smuzhiyun regulator-min-microvolt = <1200000>; 729*4882a593Smuzhiyun regulator-max-microvolt = <1500000>; 730*4882a593Smuzhiyun regulator-always-on; 731*4882a593Smuzhiyun }; 732*4882a593Smuzhiyun 733*4882a593Smuzhiyun buck8_reg: BUCK8 { 734*4882a593Smuzhiyun regulator-name = "VIN_MLDO_2V0"; 735*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 736*4882a593Smuzhiyun regulator-max-microvolt = <2100000>; 737*4882a593Smuzhiyun regulator-always-on; 738*4882a593Smuzhiyun }; 739*4882a593Smuzhiyun 740*4882a593Smuzhiyun buck9_reg: BUCK9 { 741*4882a593Smuzhiyun regulator-name = "VIN_HLDO_3V5"; 742*4882a593Smuzhiyun regulator-min-microvolt = <3000000>; 743*4882a593Smuzhiyun regulator-max-microvolt = <3500000>; 744*4882a593Smuzhiyun regulator-always-on; 745*4882a593Smuzhiyun }; 746*4882a593Smuzhiyun 747*4882a593Smuzhiyun buck10_reg: BUCK10 { 748*4882a593Smuzhiyun regulator-name = "PVDD_EMMCF_2V8"; 749*4882a593Smuzhiyun regulator-min-microvolt = <2800000>; 750*4882a593Smuzhiyun regulator-max-microvolt = <2800000>; 751*4882a593Smuzhiyun /* 752*4882a593Smuzhiyun * Must stay in "off" mode during shutdown for 753*4882a593Smuzhiyun * proper eMMC reset. The "off" mode is in 754*4882a593Smuzhiyun * fact controlled by BUCK10EN. The eMMC does 755*4882a593Smuzhiyun * not have reset pin connected so the reset 756*4882a593Smuzhiyun * will be triggered by falling edge of 757*4882a593Smuzhiyun * BUCK10EN. 758*4882a593Smuzhiyun */ 759*4882a593Smuzhiyun 760*4882a593Smuzhiyun regulator-state-mem { 761*4882a593Smuzhiyun regulator-off-in-suspend; 762*4882a593Smuzhiyun }; 763*4882a593Smuzhiyun }; 764*4882a593Smuzhiyun }; 765*4882a593Smuzhiyun }; 766*4882a593Smuzhiyun}; 767*4882a593Smuzhiyun 768*4882a593Smuzhiyun&i2c_2 { 769*4882a593Smuzhiyun status = "okay"; 770*4882a593Smuzhiyun}; 771*4882a593Smuzhiyun 772*4882a593Smuzhiyun&mixer { 773*4882a593Smuzhiyun status = "okay"; 774*4882a593Smuzhiyun}; 775*4882a593Smuzhiyun 776*4882a593Smuzhiyun&mmc_0 { 777*4882a593Smuzhiyun status = "okay"; 778*4882a593Smuzhiyun non-removable; 779*4882a593Smuzhiyun card-detect-delay = <200>; 780*4882a593Smuzhiyun samsung,dw-mshc-ciu-div = <3>; 781*4882a593Smuzhiyun samsung,dw-mshc-sdr-timing = <0 4>; 782*4882a593Smuzhiyun samsung,dw-mshc-ddr-timing = <0 2>; 783*4882a593Smuzhiyun pinctrl-names = "default"; 784*4882a593Smuzhiyun pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8>; 785*4882a593Smuzhiyun vmmc-supply = <&ldo18_reg>; 786*4882a593Smuzhiyun vqmmc-supply = <&ldo3_reg>; 787*4882a593Smuzhiyun bus-width = <8>; 788*4882a593Smuzhiyun cap-mmc-highspeed; 789*4882a593Smuzhiyun mmc-hs200-1_8v; 790*4882a593Smuzhiyun}; 791*4882a593Smuzhiyun 792*4882a593Smuzhiyun&mmc_2 { 793*4882a593Smuzhiyun status = "okay"; 794*4882a593Smuzhiyun card-detect-delay = <200>; 795*4882a593Smuzhiyun samsung,dw-mshc-ciu-div = <3>; 796*4882a593Smuzhiyun samsung,dw-mshc-sdr-timing = <0 4>; 797*4882a593Smuzhiyun samsung,dw-mshc-ddr-timing = <0 2>; 798*4882a593Smuzhiyun pinctrl-names = "default"; 799*4882a593Smuzhiyun pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4>; 800*4882a593Smuzhiyun vmmc-supply = <&ldo19_reg>; 801*4882a593Smuzhiyun vqmmc-supply = <&ldo13_reg>; 802*4882a593Smuzhiyun bus-width = <4>; 803*4882a593Smuzhiyun cap-sd-highspeed; 804*4882a593Smuzhiyun sd-uhs-sdr50; 805*4882a593Smuzhiyun sd-uhs-sdr104; 806*4882a593Smuzhiyun sd-uhs-ddr50; 807*4882a593Smuzhiyun}; 808*4882a593Smuzhiyun 809*4882a593Smuzhiyun&pinctrl_0 { 810*4882a593Smuzhiyun s2mps11_irq: s2mps11-irq { 811*4882a593Smuzhiyun samsung,pins = "gpx3-2"; 812*4882a593Smuzhiyun samsung,pin-function = <EXYNOS_PIN_FUNC_F>; 813*4882a593Smuzhiyun samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 814*4882a593Smuzhiyun samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; 815*4882a593Smuzhiyun }; 816*4882a593Smuzhiyun}; 817*4882a593Smuzhiyun 818*4882a593Smuzhiyun&rtc { 819*4882a593Smuzhiyun status = "okay"; 820*4882a593Smuzhiyun clocks = <&clock CLK_RTC>, <&s2mps11_osc S2MPS11_CLK_AP>; 821*4882a593Smuzhiyun clock-names = "rtc", "rtc_src"; 822*4882a593Smuzhiyun}; 823*4882a593Smuzhiyun 824*4882a593Smuzhiyun&usbdrd_dwc3_1 { 825*4882a593Smuzhiyun dr_mode = "host"; 826*4882a593Smuzhiyun}; 827