xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/exynos5410-smdk5410.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Samsung SMDK5410 board device tree source
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (c) 2013 Samsung Electronics Co., Ltd.
6*4882a593Smuzhiyun *		http://www.samsung.com
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun/dts-v1/;
10*4882a593Smuzhiyun#include "exynos5410.dtsi"
11*4882a593Smuzhiyun#include <dt-bindings/interrupt-controller/irq.h>
12*4882a593Smuzhiyun/ {
13*4882a593Smuzhiyun	model = "Samsung SMDK5410 board based on Exynos5410";
14*4882a593Smuzhiyun	compatible = "samsung,smdk5410", "samsung,exynos5410", "samsung,exynos5";
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun	memory@40000000 {
17*4882a593Smuzhiyun		device_type = "memory";
18*4882a593Smuzhiyun		reg = <0x40000000 0x80000000>;
19*4882a593Smuzhiyun	};
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun	chosen {
22*4882a593Smuzhiyun		stdout-path = "serial2:115200n8";
23*4882a593Smuzhiyun	};
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun	fin_pll: xxti {
26*4882a593Smuzhiyun		compatible = "fixed-clock";
27*4882a593Smuzhiyun		clock-frequency = <24000000>;
28*4882a593Smuzhiyun		clock-output-names = "fin_pll";
29*4882a593Smuzhiyun		#clock-cells = <0>;
30*4882a593Smuzhiyun	};
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun	pmic_ap_clk: pmic-ap-clk {
33*4882a593Smuzhiyun		/* Workaround for missing PMIC and its clock */
34*4882a593Smuzhiyun		compatible = "fixed-clock";
35*4882a593Smuzhiyun		#clock-cells = <0>;
36*4882a593Smuzhiyun		clock-frequency = <32768>;
37*4882a593Smuzhiyun	};
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun	firmware@2037000 {
40*4882a593Smuzhiyun		compatible = "samsung,secure-firmware";
41*4882a593Smuzhiyun		reg = <0x02037000 0x1000>;
42*4882a593Smuzhiyun	};
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun};
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun&mmc_0 {
47*4882a593Smuzhiyun	status = "okay";
48*4882a593Smuzhiyun	cap-mmc-highspeed;
49*4882a593Smuzhiyun	broken-cd;
50*4882a593Smuzhiyun	card-detect-delay = <200>;
51*4882a593Smuzhiyun	samsung,dw-mshc-ciu-div = <3>;
52*4882a593Smuzhiyun	samsung,dw-mshc-sdr-timing = <2 3>;
53*4882a593Smuzhiyun	samsung,dw-mshc-ddr-timing = <1 2>;
54*4882a593Smuzhiyun	bus-width = <8>;
55*4882a593Smuzhiyun};
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun&mmc_2 {
58*4882a593Smuzhiyun	status = "okay";
59*4882a593Smuzhiyun	cap-sd-highspeed;
60*4882a593Smuzhiyun	card-detect-delay = <200>;
61*4882a593Smuzhiyun	samsung,dw-mshc-ciu-div = <3>;
62*4882a593Smuzhiyun	samsung,dw-mshc-sdr-timing = <2 3>;
63*4882a593Smuzhiyun	samsung,dw-mshc-ddr-timing = <1 2>;
64*4882a593Smuzhiyun	bus-width = <4>;
65*4882a593Smuzhiyun	disable-wp;
66*4882a593Smuzhiyun};
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun&pinctrl_0 {
69*4882a593Smuzhiyun	srom_ctl: srom-ctl {
70*4882a593Smuzhiyun		samsung,pins = "gpy0-3", "gpy0-4", "gpy0-5",
71*4882a593Smuzhiyun			       "gpy1-0", "gpy1-1", "gpy1-2", "gpy1-3";
72*4882a593Smuzhiyun		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
73*4882a593Smuzhiyun		samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
74*4882a593Smuzhiyun	};
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun	srom_ebi: srom-ebi {
77*4882a593Smuzhiyun		samsung,pins = "gpy3-0", "gpy3-1", "gpy3-2", "gpy3-3",
78*4882a593Smuzhiyun			       "gpy3-4", "gpy3-5", "gpy3-6", "gpy3-7",
79*4882a593Smuzhiyun			       "gpy5-0", "gpy5-1", "gpy5-2", "gpy5-3",
80*4882a593Smuzhiyun			       "gpy5-4", "gpy5-5", "gpy5-6", "gpy5-7",
81*4882a593Smuzhiyun			       "gpy6-0", "gpy6-1", "gpy6-2", "gpy6-3",
82*4882a593Smuzhiyun			       "gpy6-4", "gpy6-5", "gpy6-6", "gpy6-7";
83*4882a593Smuzhiyun		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
84*4882a593Smuzhiyun		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
85*4882a593Smuzhiyun		samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
86*4882a593Smuzhiyun	};
87*4882a593Smuzhiyun};
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun&rtc {
90*4882a593Smuzhiyun	clocks = <&clock CLK_RTC>, <&pmic_ap_clk>;
91*4882a593Smuzhiyun	clock-names = "rtc", "rtc_src";
92*4882a593Smuzhiyun};
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun&sromc {
95*4882a593Smuzhiyun	pinctrl-names = "default";
96*4882a593Smuzhiyun	pinctrl-0 = <&srom_ctl>, <&srom_ebi>;
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun	ethernet@3,0 {
99*4882a593Smuzhiyun		compatible = "smsc,lan9115";
100*4882a593Smuzhiyun		reg = <3 0 0x10000>;
101*4882a593Smuzhiyun		phy-mode = "mii";
102*4882a593Smuzhiyun		interrupt-parent = <&gpx0>;
103*4882a593Smuzhiyun		interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
104*4882a593Smuzhiyun		reg-io-width = <2>;
105*4882a593Smuzhiyun		smsc,irq-push-pull;
106*4882a593Smuzhiyun		smsc,force-internal-phy;
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun		samsung,srom-page-mode;
109*4882a593Smuzhiyun		samsung,srom-timing = <9 12 1 9 1 1>;
110*4882a593Smuzhiyun	};
111*4882a593Smuzhiyun};
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun&serial_0 {
114*4882a593Smuzhiyun	status = "okay";
115*4882a593Smuzhiyun};
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun&serial_1 {
118*4882a593Smuzhiyun	status = "okay";
119*4882a593Smuzhiyun};
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun&serial_2 {
122*4882a593Smuzhiyun	status = "okay";
123*4882a593Smuzhiyun};
124