1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Samsung's Exynos4210 based Universal C210 board device tree source 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd. 6*4882a593Smuzhiyun * http://www.samsung.com 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun * Device tree source file for Samsung's Universal C210 board which is based on 9*4882a593Smuzhiyun * Samsung's Exynos4210 rev0 SoC. 10*4882a593Smuzhiyun */ 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun/dts-v1/; 13*4882a593Smuzhiyun#include "exynos4210.dtsi" 14*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h> 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun/ { 17*4882a593Smuzhiyun model = "Samsung Universal C210 based on Exynos4210 rev0"; 18*4882a593Smuzhiyun compatible = "samsung,universal_c210", "samsung,exynos4210", "samsung,exynos4"; 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun memory@40000000 { 21*4882a593Smuzhiyun device_type = "memory"; 22*4882a593Smuzhiyun reg = <0x40000000 0x10000000 23*4882a593Smuzhiyun 0x50000000 0x10000000>; 24*4882a593Smuzhiyun }; 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun chosen { 27*4882a593Smuzhiyun bootargs = "root=/dev/mmcblk0p5 rw rootwait earlyprintk panic=5 maxcpus=1"; 28*4882a593Smuzhiyun stdout-path = "serial2:115200n8"; 29*4882a593Smuzhiyun }; 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun fixed-rate-clocks { 33*4882a593Smuzhiyun xxti { 34*4882a593Smuzhiyun compatible = "samsung,clock-xxti"; 35*4882a593Smuzhiyun clock-frequency = <0>; 36*4882a593Smuzhiyun }; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun xusbxti { 39*4882a593Smuzhiyun compatible = "samsung,clock-xusbxti"; 40*4882a593Smuzhiyun clock-frequency = <24000000>; 41*4882a593Smuzhiyun }; 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun pmic_ap_clk: pmic-ap-clk { 44*4882a593Smuzhiyun /* Workaround for missing clock on PMIC */ 45*4882a593Smuzhiyun compatible = "fixed-clock"; 46*4882a593Smuzhiyun #clock-cells = <0>; 47*4882a593Smuzhiyun clock-frequency = <32768>; 48*4882a593Smuzhiyun }; 49*4882a593Smuzhiyun }; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun vemmc_reg: voltage-regulator { 52*4882a593Smuzhiyun compatible = "regulator-fixed"; 53*4882a593Smuzhiyun regulator-name = "VMEM_VDD_2_8V"; 54*4882a593Smuzhiyun regulator-min-microvolt = <2800000>; 55*4882a593Smuzhiyun regulator-max-microvolt = <2800000>; 56*4882a593Smuzhiyun gpio = <&gpe1 3 GPIO_ACTIVE_HIGH>; 57*4882a593Smuzhiyun enable-active-high; 58*4882a593Smuzhiyun }; 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun wlan_pwrseq: sdhci3-pwrseq { 61*4882a593Smuzhiyun compatible = "mmc-pwrseq-simple"; 62*4882a593Smuzhiyun reset-gpios = <&gpe3 1 GPIO_ACTIVE_LOW>; 63*4882a593Smuzhiyun }; 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun gpio-keys { 66*4882a593Smuzhiyun compatible = "gpio-keys"; 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun vol-up-key { 69*4882a593Smuzhiyun gpios = <&gpx2 0 GPIO_ACTIVE_LOW>; 70*4882a593Smuzhiyun linux,code = <115>; 71*4882a593Smuzhiyun label = "volume up"; 72*4882a593Smuzhiyun debounce-interval = <1>; 73*4882a593Smuzhiyun }; 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun vol-down-key { 76*4882a593Smuzhiyun gpios = <&gpx2 1 GPIO_ACTIVE_LOW>; 77*4882a593Smuzhiyun linux,code = <114>; 78*4882a593Smuzhiyun label = "volume down"; 79*4882a593Smuzhiyun debounce-interval = <1>; 80*4882a593Smuzhiyun }; 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun config-key { 83*4882a593Smuzhiyun gpios = <&gpx2 2 GPIO_ACTIVE_LOW>; 84*4882a593Smuzhiyun linux,code = <171>; 85*4882a593Smuzhiyun label = "config"; 86*4882a593Smuzhiyun debounce-interval = <1>; 87*4882a593Smuzhiyun wakeup-source; 88*4882a593Smuzhiyun }; 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun camera-key { 91*4882a593Smuzhiyun gpios = <&gpx2 3 GPIO_ACTIVE_LOW>; 92*4882a593Smuzhiyun linux,code = <212>; 93*4882a593Smuzhiyun label = "camera"; 94*4882a593Smuzhiyun debounce-interval = <1>; 95*4882a593Smuzhiyun }; 96*4882a593Smuzhiyun 97*4882a593Smuzhiyun power-key { 98*4882a593Smuzhiyun gpios = <&gpx2 7 GPIO_ACTIVE_LOW>; 99*4882a593Smuzhiyun linux,code = <116>; 100*4882a593Smuzhiyun label = "power"; 101*4882a593Smuzhiyun debounce-interval = <1>; 102*4882a593Smuzhiyun wakeup-source; 103*4882a593Smuzhiyun }; 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun ok-key { 106*4882a593Smuzhiyun gpios = <&gpx3 5 GPIO_ACTIVE_LOW>; 107*4882a593Smuzhiyun linux,code = <352>; 108*4882a593Smuzhiyun label = "ok"; 109*4882a593Smuzhiyun debounce-interval = <1>; 110*4882a593Smuzhiyun }; 111*4882a593Smuzhiyun }; 112*4882a593Smuzhiyun 113*4882a593Smuzhiyun tsp_reg: voltage-regulator { 114*4882a593Smuzhiyun compatible = "regulator-fixed"; 115*4882a593Smuzhiyun regulator-name = "TSP_2_8V"; 116*4882a593Smuzhiyun regulator-min-microvolt = <2800000>; 117*4882a593Smuzhiyun regulator-max-microvolt = <2800000>; 118*4882a593Smuzhiyun gpio = <&gpe2 3 GPIO_ACTIVE_HIGH>; 119*4882a593Smuzhiyun enable-active-high; 120*4882a593Smuzhiyun }; 121*4882a593Smuzhiyun 122*4882a593Smuzhiyun spi-3 { 123*4882a593Smuzhiyun compatible = "spi-gpio"; 124*4882a593Smuzhiyun #address-cells = <1>; 125*4882a593Smuzhiyun #size-cells = <0>; 126*4882a593Smuzhiyun 127*4882a593Smuzhiyun sck-gpios = <&gpy3 1 GPIO_ACTIVE_HIGH>; 128*4882a593Smuzhiyun mosi-gpios = <&gpy3 3 GPIO_ACTIVE_HIGH>; 129*4882a593Smuzhiyun num-chipselects = <1>; 130*4882a593Smuzhiyun cs-gpios = <&gpy4 3 GPIO_ACTIVE_LOW>; 131*4882a593Smuzhiyun 132*4882a593Smuzhiyun lcd@0 { 133*4882a593Smuzhiyun compatible = "samsung,ld9040"; 134*4882a593Smuzhiyun reg = <0>; 135*4882a593Smuzhiyun vdd3-supply = <&ldo7_reg>; 136*4882a593Smuzhiyun vci-supply = <&ldo17_reg>; 137*4882a593Smuzhiyun reset-gpios = <&gpy4 5 GPIO_ACTIVE_HIGH>; 138*4882a593Smuzhiyun spi-max-frequency = <1200000>; 139*4882a593Smuzhiyun power-on-delay = <10>; 140*4882a593Smuzhiyun reset-delay = <10>; 141*4882a593Smuzhiyun panel-width-mm = <90>; 142*4882a593Smuzhiyun panel-height-mm = <154>; 143*4882a593Smuzhiyun display-timings { 144*4882a593Smuzhiyun timing { 145*4882a593Smuzhiyun clock-frequency = <23492370>; 146*4882a593Smuzhiyun hactive = <480>; 147*4882a593Smuzhiyun vactive = <800>; 148*4882a593Smuzhiyun hback-porch = <16>; 149*4882a593Smuzhiyun hfront-porch = <16>; 150*4882a593Smuzhiyun vback-porch = <2>; 151*4882a593Smuzhiyun vfront-porch = <28>; 152*4882a593Smuzhiyun hsync-len = <2>; 153*4882a593Smuzhiyun vsync-len = <1>; 154*4882a593Smuzhiyun hsync-active = <0>; 155*4882a593Smuzhiyun vsync-active = <0>; 156*4882a593Smuzhiyun de-active = <0>; 157*4882a593Smuzhiyun pixelclk-active = <0>; 158*4882a593Smuzhiyun }; 159*4882a593Smuzhiyun }; 160*4882a593Smuzhiyun port { 161*4882a593Smuzhiyun lcd_ep: endpoint { 162*4882a593Smuzhiyun remote-endpoint = <&fimd_dpi_ep>; 163*4882a593Smuzhiyun }; 164*4882a593Smuzhiyun }; 165*4882a593Smuzhiyun }; 166*4882a593Smuzhiyun }; 167*4882a593Smuzhiyun 168*4882a593Smuzhiyun hdmi_en: voltage-regulator-hdmi-5v { 169*4882a593Smuzhiyun compatible = "regulator-fixed"; 170*4882a593Smuzhiyun regulator-name = "HDMI_5V"; 171*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 172*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 173*4882a593Smuzhiyun gpio = <&gpe0 1 GPIO_ACTIVE_HIGH>; 174*4882a593Smuzhiyun enable-active-high; 175*4882a593Smuzhiyun }; 176*4882a593Smuzhiyun 177*4882a593Smuzhiyun hdmi_ddc: i2c-ddc { 178*4882a593Smuzhiyun compatible = "i2c-gpio"; 179*4882a593Smuzhiyun sda-gpios = <&gpe4 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 180*4882a593Smuzhiyun scl-gpios = <&gpe4 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 181*4882a593Smuzhiyun i2c-gpio,delay-us = <100>; 182*4882a593Smuzhiyun #address-cells = <1>; 183*4882a593Smuzhiyun #size-cells = <0>; 184*4882a593Smuzhiyun 185*4882a593Smuzhiyun pinctrl-0 = <&i2c_ddc_bus>; 186*4882a593Smuzhiyun pinctrl-names = "default"; 187*4882a593Smuzhiyun status = "okay"; 188*4882a593Smuzhiyun }; 189*4882a593Smuzhiyun}; 190*4882a593Smuzhiyun 191*4882a593Smuzhiyun&camera { 192*4882a593Smuzhiyun status = "okay"; 193*4882a593Smuzhiyun 194*4882a593Smuzhiyun pinctrl-names = "default"; 195*4882a593Smuzhiyun pinctrl-0 = <>; 196*4882a593Smuzhiyun}; 197*4882a593Smuzhiyun 198*4882a593Smuzhiyun&cpu0 { 199*4882a593Smuzhiyun cpu0-supply = <&vdd_arm_reg>; 200*4882a593Smuzhiyun}; 201*4882a593Smuzhiyun 202*4882a593Smuzhiyun&cpu_thermal { 203*4882a593Smuzhiyun cooling-maps { 204*4882a593Smuzhiyun map0 { 205*4882a593Smuzhiyun /* Corresponds to 800MHz */ 206*4882a593Smuzhiyun cooling-device = <&cpu0 2 2>; 207*4882a593Smuzhiyun }; 208*4882a593Smuzhiyun map1 { 209*4882a593Smuzhiyun /* Corresponds to 200MHz */ 210*4882a593Smuzhiyun cooling-device = <&cpu0 4 4>; 211*4882a593Smuzhiyun }; 212*4882a593Smuzhiyun }; 213*4882a593Smuzhiyun}; 214*4882a593Smuzhiyun 215*4882a593Smuzhiyun&ehci { 216*4882a593Smuzhiyun status = "okay"; 217*4882a593Smuzhiyun phys = <&exynos_usbphy 1>; 218*4882a593Smuzhiyun phy-names = "host"; 219*4882a593Smuzhiyun}; 220*4882a593Smuzhiyun 221*4882a593Smuzhiyun&exynos_usbphy { 222*4882a593Smuzhiyun status = "okay"; 223*4882a593Smuzhiyun vbus-supply = <&safeout1_reg>; 224*4882a593Smuzhiyun}; 225*4882a593Smuzhiyun 226*4882a593Smuzhiyun&fimc_0 { 227*4882a593Smuzhiyun status = "okay"; 228*4882a593Smuzhiyun assigned-clocks = <&clock CLK_MOUT_FIMC0>, 229*4882a593Smuzhiyun <&clock CLK_SCLK_FIMC0>; 230*4882a593Smuzhiyun assigned-clock-parents = <&clock CLK_SCLK_MPLL>; 231*4882a593Smuzhiyun assigned-clock-rates = <0>, <160000000>; 232*4882a593Smuzhiyun}; 233*4882a593Smuzhiyun 234*4882a593Smuzhiyun&fimc_1 { 235*4882a593Smuzhiyun status = "okay"; 236*4882a593Smuzhiyun assigned-clocks = <&clock CLK_MOUT_FIMC1>, 237*4882a593Smuzhiyun <&clock CLK_SCLK_FIMC1>; 238*4882a593Smuzhiyun assigned-clock-parents = <&clock CLK_SCLK_MPLL>; 239*4882a593Smuzhiyun assigned-clock-rates = <0>, <160000000>; 240*4882a593Smuzhiyun}; 241*4882a593Smuzhiyun 242*4882a593Smuzhiyun&fimc_2 { 243*4882a593Smuzhiyun status = "okay"; 244*4882a593Smuzhiyun assigned-clocks = <&clock CLK_MOUT_FIMC2>, 245*4882a593Smuzhiyun <&clock CLK_SCLK_FIMC2>; 246*4882a593Smuzhiyun assigned-clock-parents = <&clock CLK_SCLK_MPLL>; 247*4882a593Smuzhiyun assigned-clock-rates = <0>, <160000000>; 248*4882a593Smuzhiyun}; 249*4882a593Smuzhiyun 250*4882a593Smuzhiyun&fimc_3 { 251*4882a593Smuzhiyun status = "okay"; 252*4882a593Smuzhiyun assigned-clocks = <&clock CLK_MOUT_FIMC3>, 253*4882a593Smuzhiyun <&clock CLK_SCLK_FIMC3>; 254*4882a593Smuzhiyun assigned-clock-parents = <&clock CLK_SCLK_MPLL>; 255*4882a593Smuzhiyun assigned-clock-rates = <0>, <160000000>; 256*4882a593Smuzhiyun}; 257*4882a593Smuzhiyun 258*4882a593Smuzhiyun&fimd { 259*4882a593Smuzhiyun pinctrl-0 = <&lcd_clk>, <&lcd_data24>; 260*4882a593Smuzhiyun pinctrl-names = "default"; 261*4882a593Smuzhiyun status = "okay"; 262*4882a593Smuzhiyun samsung,invert-vden; 263*4882a593Smuzhiyun samsung,invert-vclk; 264*4882a593Smuzhiyun #address-cells = <1>; 265*4882a593Smuzhiyun #size-cells = <0>; 266*4882a593Smuzhiyun port@3 { 267*4882a593Smuzhiyun reg = <3>; 268*4882a593Smuzhiyun fimd_dpi_ep: endpoint { 269*4882a593Smuzhiyun remote-endpoint = <&lcd_ep>; 270*4882a593Smuzhiyun }; 271*4882a593Smuzhiyun }; 272*4882a593Smuzhiyun}; 273*4882a593Smuzhiyun 274*4882a593Smuzhiyun&gpu { 275*4882a593Smuzhiyun mali-supply = <&buck2_reg>; 276*4882a593Smuzhiyun status = "okay"; 277*4882a593Smuzhiyun}; 278*4882a593Smuzhiyun 279*4882a593Smuzhiyun&hdmi { 280*4882a593Smuzhiyun hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>; 281*4882a593Smuzhiyun pinctrl-names = "default"; 282*4882a593Smuzhiyun pinctrl-0 = <&hdmi_hpd>; 283*4882a593Smuzhiyun hdmi-en-supply = <&hdmi_en>; 284*4882a593Smuzhiyun vdd-supply = <&ldo3_reg>; 285*4882a593Smuzhiyun vdd_osc-supply = <&ldo4_reg>; 286*4882a593Smuzhiyun vdd_pll-supply = <&ldo3_reg>; 287*4882a593Smuzhiyun ddc = <&hdmi_ddc>; 288*4882a593Smuzhiyun status = "okay"; 289*4882a593Smuzhiyun}; 290*4882a593Smuzhiyun 291*4882a593Smuzhiyun&hsotg { 292*4882a593Smuzhiyun vusb_d-supply = <&ldo3_reg>; 293*4882a593Smuzhiyun vusb_a-supply = <&ldo8_reg>; 294*4882a593Smuzhiyun dr_mode = "peripheral"; 295*4882a593Smuzhiyun status = "okay"; 296*4882a593Smuzhiyun}; 297*4882a593Smuzhiyun 298*4882a593Smuzhiyun&i2c_3 { 299*4882a593Smuzhiyun samsung,i2c-sda-delay = <100>; 300*4882a593Smuzhiyun samsung,i2c-slave-addr = <0x10>; 301*4882a593Smuzhiyun samsung,i2c-max-bus-freq = <100000>; 302*4882a593Smuzhiyun pinctrl-0 = <&i2c3_bus>; 303*4882a593Smuzhiyun pinctrl-names = "default"; 304*4882a593Smuzhiyun status = "okay"; 305*4882a593Smuzhiyun 306*4882a593Smuzhiyun tsp@4a { 307*4882a593Smuzhiyun /* TBD: Atmel maXtouch touchscreen */ 308*4882a593Smuzhiyun reg = <0x4a>; 309*4882a593Smuzhiyun }; 310*4882a593Smuzhiyun}; 311*4882a593Smuzhiyun 312*4882a593Smuzhiyun&i2c_5 { 313*4882a593Smuzhiyun samsung,i2c-sda-delay = <100>; 314*4882a593Smuzhiyun samsung,i2c-slave-addr = <0x10>; 315*4882a593Smuzhiyun samsung,i2c-max-bus-freq = <100000>; 316*4882a593Smuzhiyun pinctrl-0 = <&i2c5_bus>; 317*4882a593Smuzhiyun pinctrl-names = "default"; 318*4882a593Smuzhiyun status = "okay"; 319*4882a593Smuzhiyun 320*4882a593Smuzhiyun vdd_arm_reg: pmic@60 { 321*4882a593Smuzhiyun compatible = "maxim,max8952"; 322*4882a593Smuzhiyun reg = <0x60>; 323*4882a593Smuzhiyun 324*4882a593Smuzhiyun max8952,vid-gpios = <&gpx0 3 GPIO_ACTIVE_HIGH>, 325*4882a593Smuzhiyun <&gpx0 4 GPIO_ACTIVE_HIGH>; 326*4882a593Smuzhiyun max8952,default-mode = <0>; 327*4882a593Smuzhiyun max8952,dvs-mode-microvolt = <1250000>, <1200000>, 328*4882a593Smuzhiyun <1050000>, <950000>; 329*4882a593Smuzhiyun max8952,sync-freq = <0>; 330*4882a593Smuzhiyun max8952,ramp-speed = <0>; 331*4882a593Smuzhiyun 332*4882a593Smuzhiyun regulator-name = "VARM_1.2V_C210"; 333*4882a593Smuzhiyun regulator-min-microvolt = <770000>; 334*4882a593Smuzhiyun regulator-max-microvolt = <1400000>; 335*4882a593Smuzhiyun regulator-always-on; 336*4882a593Smuzhiyun regulator-boot-on; 337*4882a593Smuzhiyun }; 338*4882a593Smuzhiyun 339*4882a593Smuzhiyun pmic@66 { 340*4882a593Smuzhiyun compatible = "national,lp3974"; 341*4882a593Smuzhiyun interrupts-extended = <&gpx0 7 0>, <&gpx2 7 0>; 342*4882a593Smuzhiyun pinctrl-names = "default"; 343*4882a593Smuzhiyun pinctrl-0 = <&lp3974_irq>; 344*4882a593Smuzhiyun reg = <0x66>; 345*4882a593Smuzhiyun 346*4882a593Smuzhiyun max8998,pmic-buck1-default-dvs-idx = <0>; 347*4882a593Smuzhiyun max8998,pmic-buck1-dvs-gpios = <&gpx0 5 GPIO_ACTIVE_HIGH>, 348*4882a593Smuzhiyun <&gpx0 6 GPIO_ACTIVE_HIGH>; 349*4882a593Smuzhiyun max8998,pmic-buck1-dvs-voltage = <1100000>, <1000000>, 350*4882a593Smuzhiyun <1100000>, <1000000>; 351*4882a593Smuzhiyun 352*4882a593Smuzhiyun max8998,pmic-buck2-default-dvs-idx = <0>; 353*4882a593Smuzhiyun max8998,pmic-buck2-dvs-gpio = <&gpe2 0 GPIO_ACTIVE_HIGH>; 354*4882a593Smuzhiyun max8998,pmic-buck2-dvs-voltage = <1200000>, <1100000>; 355*4882a593Smuzhiyun 356*4882a593Smuzhiyun regulators { 357*4882a593Smuzhiyun ldo2_reg: LDO2 { 358*4882a593Smuzhiyun regulator-name = "VALIVE_1.2V"; 359*4882a593Smuzhiyun regulator-min-microvolt = <1200000>; 360*4882a593Smuzhiyun regulator-max-microvolt = <1200000>; 361*4882a593Smuzhiyun regulator-always-on; 362*4882a593Smuzhiyun }; 363*4882a593Smuzhiyun 364*4882a593Smuzhiyun ldo3_reg: LDO3 { 365*4882a593Smuzhiyun regulator-name = "VUSB+MIPI_1.1V"; 366*4882a593Smuzhiyun regulator-min-microvolt = <1100000>; 367*4882a593Smuzhiyun regulator-max-microvolt = <1100000>; 368*4882a593Smuzhiyun regulator-always-on; 369*4882a593Smuzhiyun }; 370*4882a593Smuzhiyun 371*4882a593Smuzhiyun ldo4_reg: LDO4 { 372*4882a593Smuzhiyun regulator-name = "VADC_3.3V"; 373*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 374*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 375*4882a593Smuzhiyun }; 376*4882a593Smuzhiyun 377*4882a593Smuzhiyun ldo5_reg: LDO5 { 378*4882a593Smuzhiyun regulator-name = "VTF_2.8V"; 379*4882a593Smuzhiyun regulator-min-microvolt = <2800000>; 380*4882a593Smuzhiyun regulator-max-microvolt = <2800000>; 381*4882a593Smuzhiyun }; 382*4882a593Smuzhiyun 383*4882a593Smuzhiyun ldo6_reg: LDO6 { 384*4882a593Smuzhiyun regulator-name = "LDO6"; 385*4882a593Smuzhiyun regulator-min-microvolt = <2000000>; 386*4882a593Smuzhiyun regulator-max-microvolt = <2000000>; 387*4882a593Smuzhiyun }; 388*4882a593Smuzhiyun 389*4882a593Smuzhiyun ldo7_reg: LDO7 { 390*4882a593Smuzhiyun regulator-name = "VLCD+VMIPI_1.8V"; 391*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 392*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 393*4882a593Smuzhiyun }; 394*4882a593Smuzhiyun 395*4882a593Smuzhiyun ldo8_reg: LDO8 { 396*4882a593Smuzhiyun regulator-name = "VUSB+VDAC_3.3V"; 397*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 398*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 399*4882a593Smuzhiyun regulator-always-on; 400*4882a593Smuzhiyun }; 401*4882a593Smuzhiyun 402*4882a593Smuzhiyun ldo9_reg: LDO9 { 403*4882a593Smuzhiyun regulator-name = "VCC_2.8V"; 404*4882a593Smuzhiyun regulator-min-microvolt = <2800000>; 405*4882a593Smuzhiyun regulator-max-microvolt = <2800000>; 406*4882a593Smuzhiyun regulator-always-on; 407*4882a593Smuzhiyun }; 408*4882a593Smuzhiyun 409*4882a593Smuzhiyun ldo10_reg: LDO10 { 410*4882a593Smuzhiyun regulator-name = "VPLL_1.1V"; 411*4882a593Smuzhiyun regulator-min-microvolt = <1100000>; 412*4882a593Smuzhiyun regulator-max-microvolt = <1100000>; 413*4882a593Smuzhiyun regulator-boot-on; 414*4882a593Smuzhiyun regulator-always-on; 415*4882a593Smuzhiyun }; 416*4882a593Smuzhiyun 417*4882a593Smuzhiyun ldo11_reg: LDO11 { 418*4882a593Smuzhiyun regulator-name = "CAM_AF_3.3V"; 419*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 420*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 421*4882a593Smuzhiyun }; 422*4882a593Smuzhiyun 423*4882a593Smuzhiyun ldo12_reg: LDO12 { 424*4882a593Smuzhiyun regulator-name = "PS_2.8V"; 425*4882a593Smuzhiyun regulator-min-microvolt = <2800000>; 426*4882a593Smuzhiyun regulator-max-microvolt = <2800000>; 427*4882a593Smuzhiyun }; 428*4882a593Smuzhiyun 429*4882a593Smuzhiyun ldo13_reg: LDO13 { 430*4882a593Smuzhiyun regulator-name = "VHIC_1.2V"; 431*4882a593Smuzhiyun regulator-min-microvolt = <1200000>; 432*4882a593Smuzhiyun regulator-max-microvolt = <1200000>; 433*4882a593Smuzhiyun }; 434*4882a593Smuzhiyun 435*4882a593Smuzhiyun ldo14_reg: LDO14 { 436*4882a593Smuzhiyun regulator-name = "CAM_I_HOST_1.8V"; 437*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 438*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 439*4882a593Smuzhiyun }; 440*4882a593Smuzhiyun 441*4882a593Smuzhiyun ldo15_reg: LDO15 { 442*4882a593Smuzhiyun regulator-name = "CAM_S_DIG+FM33_CORE_1.2V"; 443*4882a593Smuzhiyun regulator-min-microvolt = <1200000>; 444*4882a593Smuzhiyun regulator-max-microvolt = <1200000>; 445*4882a593Smuzhiyun }; 446*4882a593Smuzhiyun 447*4882a593Smuzhiyun ldo16_reg: LDO16 { 448*4882a593Smuzhiyun regulator-name = "CAM_S_ANA_2.8V"; 449*4882a593Smuzhiyun regulator-min-microvolt = <2800000>; 450*4882a593Smuzhiyun regulator-max-microvolt = <2800000>; 451*4882a593Smuzhiyun }; 452*4882a593Smuzhiyun 453*4882a593Smuzhiyun ldo17_reg: LDO17 { 454*4882a593Smuzhiyun regulator-name = "VCC_3.0V_LCD"; 455*4882a593Smuzhiyun regulator-min-microvolt = <3000000>; 456*4882a593Smuzhiyun regulator-max-microvolt = <3000000>; 457*4882a593Smuzhiyun }; 458*4882a593Smuzhiyun 459*4882a593Smuzhiyun buck1_reg: BUCK1 { 460*4882a593Smuzhiyun regulator-name = "VINT_1.1V"; 461*4882a593Smuzhiyun regulator-min-microvolt = <750000>; 462*4882a593Smuzhiyun regulator-max-microvolt = <1500000>; 463*4882a593Smuzhiyun regulator-boot-on; 464*4882a593Smuzhiyun regulator-always-on; 465*4882a593Smuzhiyun }; 466*4882a593Smuzhiyun 467*4882a593Smuzhiyun buck2_reg: BUCK2 { 468*4882a593Smuzhiyun regulator-name = "VG3D_1.1V"; 469*4882a593Smuzhiyun regulator-min-microvolt = <750000>; 470*4882a593Smuzhiyun regulator-max-microvolt = <1500000>; 471*4882a593Smuzhiyun regulator-boot-on; 472*4882a593Smuzhiyun }; 473*4882a593Smuzhiyun 474*4882a593Smuzhiyun buck3_reg: BUCK3 { 475*4882a593Smuzhiyun regulator-name = "VCC_1.8V"; 476*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 477*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 478*4882a593Smuzhiyun regulator-always-on; 479*4882a593Smuzhiyun }; 480*4882a593Smuzhiyun 481*4882a593Smuzhiyun buck4_reg: BUCK4 { 482*4882a593Smuzhiyun regulator-name = "VMEM_1.2V"; 483*4882a593Smuzhiyun regulator-min-microvolt = <1200000>; 484*4882a593Smuzhiyun regulator-max-microvolt = <1200000>; 485*4882a593Smuzhiyun regulator-always-on; 486*4882a593Smuzhiyun }; 487*4882a593Smuzhiyun 488*4882a593Smuzhiyun ap32khz_reg: EN32KHz-AP { 489*4882a593Smuzhiyun regulator-name = "32KHz AP"; 490*4882a593Smuzhiyun regulator-always-on; 491*4882a593Smuzhiyun }; 492*4882a593Smuzhiyun 493*4882a593Smuzhiyun cp32khz_reg: EN32KHz-CP { 494*4882a593Smuzhiyun regulator-name = "32KHz CP"; 495*4882a593Smuzhiyun }; 496*4882a593Smuzhiyun 497*4882a593Smuzhiyun vichg_reg: ENVICHG { 498*4882a593Smuzhiyun regulator-name = "VICHG"; 499*4882a593Smuzhiyun }; 500*4882a593Smuzhiyun 501*4882a593Smuzhiyun safeout1_reg: ESAFEOUT1 { 502*4882a593Smuzhiyun regulator-name = "SAFEOUT1"; 503*4882a593Smuzhiyun }; 504*4882a593Smuzhiyun 505*4882a593Smuzhiyun safeout2_reg: ESAFEOUT2 { 506*4882a593Smuzhiyun regulator-name = "SAFEOUT2"; 507*4882a593Smuzhiyun regulator-boot-on; 508*4882a593Smuzhiyun }; 509*4882a593Smuzhiyun }; 510*4882a593Smuzhiyun }; 511*4882a593Smuzhiyun}; 512*4882a593Smuzhiyun 513*4882a593Smuzhiyun&i2c_8 { 514*4882a593Smuzhiyun status = "okay"; 515*4882a593Smuzhiyun}; 516*4882a593Smuzhiyun 517*4882a593Smuzhiyun&mct { 518*4882a593Smuzhiyun compatible = "none"; 519*4882a593Smuzhiyun}; 520*4882a593Smuzhiyun 521*4882a593Smuzhiyun&mdma1 { 522*4882a593Smuzhiyun /* Use the secure mdma0 */ 523*4882a593Smuzhiyun status = "disabled"; 524*4882a593Smuzhiyun}; 525*4882a593Smuzhiyun 526*4882a593Smuzhiyun&mixer { 527*4882a593Smuzhiyun status = "okay"; 528*4882a593Smuzhiyun}; 529*4882a593Smuzhiyun 530*4882a593Smuzhiyun&ohci { 531*4882a593Smuzhiyun status = "okay"; 532*4882a593Smuzhiyun}; 533*4882a593Smuzhiyun 534*4882a593Smuzhiyun&pinctrl_1 { 535*4882a593Smuzhiyun lp3974_irq: lp3974-irq { 536*4882a593Smuzhiyun samsung,pins = "gpx0-7", "gpx2-7"; 537*4882a593Smuzhiyun samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 538*4882a593Smuzhiyun }; 539*4882a593Smuzhiyun 540*4882a593Smuzhiyun hdmi_hpd: hdmi-hpd { 541*4882a593Smuzhiyun samsung,pins = "gpx3-7"; 542*4882a593Smuzhiyun samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 543*4882a593Smuzhiyun }; 544*4882a593Smuzhiyun}; 545*4882a593Smuzhiyun 546*4882a593Smuzhiyun&pinctrl_0 { 547*4882a593Smuzhiyun i2c_ddc_bus: i2c-ddc-bus { 548*4882a593Smuzhiyun samsung,pins = "gpe4-2", "gpe4-3"; 549*4882a593Smuzhiyun samsung,pin-function = <EXYNOS_PIN_FUNC_2>; 550*4882a593Smuzhiyun samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 551*4882a593Smuzhiyun samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 552*4882a593Smuzhiyun }; 553*4882a593Smuzhiyun}; 554*4882a593Smuzhiyun 555*4882a593Smuzhiyun&pwm { 556*4882a593Smuzhiyun compatible = "samsung,s5p6440-pwm"; 557*4882a593Smuzhiyun status = "okay"; 558*4882a593Smuzhiyun}; 559*4882a593Smuzhiyun 560*4882a593Smuzhiyun&rtc { 561*4882a593Smuzhiyun status = "okay"; 562*4882a593Smuzhiyun clocks = <&clock CLK_RTC>, <&pmic_ap_clk>; 563*4882a593Smuzhiyun clock-names = "rtc", "rtc_src"; 564*4882a593Smuzhiyun}; 565*4882a593Smuzhiyun 566*4882a593Smuzhiyun&sdhci_0 { 567*4882a593Smuzhiyun bus-width = <8>; 568*4882a593Smuzhiyun non-removable; 569*4882a593Smuzhiyun pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus8>; 570*4882a593Smuzhiyun pinctrl-names = "default"; 571*4882a593Smuzhiyun vmmc-supply = <&vemmc_reg>; 572*4882a593Smuzhiyun status = "okay"; 573*4882a593Smuzhiyun}; 574*4882a593Smuzhiyun 575*4882a593Smuzhiyun&sdhci_2 { 576*4882a593Smuzhiyun bus-width = <4>; 577*4882a593Smuzhiyun pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4>; 578*4882a593Smuzhiyun pinctrl-names = "default"; 579*4882a593Smuzhiyun vmmc-supply = <&ldo5_reg>; 580*4882a593Smuzhiyun cd-gpios = <&gpx3 4 GPIO_ACTIVE_LOW>; 581*4882a593Smuzhiyun status = "okay"; 582*4882a593Smuzhiyun}; 583*4882a593Smuzhiyun 584*4882a593Smuzhiyun&sdhci_3 { 585*4882a593Smuzhiyun status = "okay"; 586*4882a593Smuzhiyun 587*4882a593Smuzhiyun #address-cells = <1>; 588*4882a593Smuzhiyun #size-cells = <0>; 589*4882a593Smuzhiyun 590*4882a593Smuzhiyun non-removable; 591*4882a593Smuzhiyun bus-width = <4>; 592*4882a593Smuzhiyun mmc-pwrseq = <&wlan_pwrseq>; 593*4882a593Smuzhiyun vmmc-supply = <&ldo5_reg>; 594*4882a593Smuzhiyun 595*4882a593Smuzhiyun pinctrl-names = "default"; 596*4882a593Smuzhiyun pinctrl-0 = <&sd3_clk>, <&sd3_cmd>, <&sd3_bus4>; 597*4882a593Smuzhiyun 598*4882a593Smuzhiyun brcmf: wifi@1 { 599*4882a593Smuzhiyun compatible = "brcm,bcm4330-fmac"; 600*4882a593Smuzhiyun reg = <1>; 601*4882a593Smuzhiyun interrupt-parent = <&gpx2>; 602*4882a593Smuzhiyun interrupts = <5 IRQ_TYPE_LEVEL_HIGH>; 603*4882a593Smuzhiyun interrupt-names = "host-wake"; 604*4882a593Smuzhiyun }; 605*4882a593Smuzhiyun}; 606*4882a593Smuzhiyun 607*4882a593Smuzhiyun&serial_0 { 608*4882a593Smuzhiyun status = "okay"; 609*4882a593Smuzhiyun /delete-property/dmas; 610*4882a593Smuzhiyun /delete-property/dma-names; 611*4882a593Smuzhiyun}; 612*4882a593Smuzhiyun 613*4882a593Smuzhiyun&serial_1 { 614*4882a593Smuzhiyun status = "okay"; 615*4882a593Smuzhiyun /delete-property/dmas; 616*4882a593Smuzhiyun /delete-property/dma-names; 617*4882a593Smuzhiyun}; 618*4882a593Smuzhiyun 619*4882a593Smuzhiyun&serial_2 { 620*4882a593Smuzhiyun status = "okay"; 621*4882a593Smuzhiyun /delete-property/dmas; 622*4882a593Smuzhiyun /delete-property/dma-names; 623*4882a593Smuzhiyun}; 624*4882a593Smuzhiyun 625*4882a593Smuzhiyun&serial_3 { 626*4882a593Smuzhiyun status = "okay"; 627*4882a593Smuzhiyun /delete-property/dmas; 628*4882a593Smuzhiyun /delete-property/dma-names; 629*4882a593Smuzhiyun}; 630*4882a593Smuzhiyun 631*4882a593Smuzhiyun&soc { 632*4882a593Smuzhiyun mdma0: mdma@12840000 { 633*4882a593Smuzhiyun compatible = "arm,pl330", "arm,primecell"; 634*4882a593Smuzhiyun reg = <0x12840000 0x1000>; 635*4882a593Smuzhiyun interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; 636*4882a593Smuzhiyun clocks = <&clock CLK_MDMA>; 637*4882a593Smuzhiyun clock-names = "apb_pclk"; 638*4882a593Smuzhiyun #dma-cells = <1>; 639*4882a593Smuzhiyun #dma-channels = <8>; 640*4882a593Smuzhiyun #dma-requests = <1>; 641*4882a593Smuzhiyun power-domains = <&pd_lcd0>; 642*4882a593Smuzhiyun }; 643*4882a593Smuzhiyun}; 644*4882a593Smuzhiyun 645*4882a593Smuzhiyun&sysram { 646*4882a593Smuzhiyun smp-sram@0 { 647*4882a593Smuzhiyun status = "disabled"; 648*4882a593Smuzhiyun }; 649*4882a593Smuzhiyun 650*4882a593Smuzhiyun smp-sram@5000 { 651*4882a593Smuzhiyun compatible = "samsung,exynos4210-sysram"; 652*4882a593Smuzhiyun reg = <0x5000 0x1000>; 653*4882a593Smuzhiyun }; 654*4882a593Smuzhiyun 655*4882a593Smuzhiyun smp-sram@1f000 { 656*4882a593Smuzhiyun status = "disabled"; 657*4882a593Smuzhiyun }; 658*4882a593Smuzhiyun}; 659