1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Device tree for EFM32GG-DK3750 development board. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Documentation available from 6*4882a593Smuzhiyun * http://www.silabs.com/Support%20Documents/TechnicalDocs/efm32gg-dk3750-ug.pdf 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun/dts-v1/; 10*4882a593Smuzhiyun#include "efm32gg.dtsi" 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun/ { 13*4882a593Smuzhiyun model = "Energy Micro Giant Gecko Development Kit"; 14*4882a593Smuzhiyun compatible = "efm32,dk3750"; 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun chosen { 17*4882a593Smuzhiyun bootargs = "console=ttyefm4,115200 init=/linuxrc ignore_loglevel ihash_entries=64 dhash_entries=64 earlyprintk uclinux.physaddr=0x8c400000 root=/dev/mtdblock0"; 18*4882a593Smuzhiyun }; 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun memory@88000000 { 21*4882a593Smuzhiyun device_type = "memory"; 22*4882a593Smuzhiyun reg = <0x88000000 0x400000>; 23*4882a593Smuzhiyun }; 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun soc { 26*4882a593Smuzhiyun adc@40002000 { 27*4882a593Smuzhiyun status = "ok"; 28*4882a593Smuzhiyun }; 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun i2c@4000a000 { 31*4882a593Smuzhiyun energymicro,location = <3>; 32*4882a593Smuzhiyun status = "ok"; 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun temp@48 { 35*4882a593Smuzhiyun compatible = "st,stds75"; 36*4882a593Smuzhiyun reg = <0x48>; 37*4882a593Smuzhiyun }; 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun eeprom@50 { 40*4882a593Smuzhiyun compatible = "microchip,24c02", "atmel,24c02"; 41*4882a593Smuzhiyun reg = <0x50>; 42*4882a593Smuzhiyun pagesize = <16>; 43*4882a593Smuzhiyun }; 44*4882a593Smuzhiyun }; 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun spi0: spi@4000c000 { /* USART0 */ 47*4882a593Smuzhiyun cs-gpios = <&gpio 68 1>; // E4 48*4882a593Smuzhiyun energymicro,location = <1>; 49*4882a593Smuzhiyun status = "ok"; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun microsd@0 { 52*4882a593Smuzhiyun compatible = "mmc-spi-slot"; 53*4882a593Smuzhiyun spi-max-frequency = <100000>; 54*4882a593Smuzhiyun voltage-ranges = <3200 3400>; 55*4882a593Smuzhiyun broken-cd; 56*4882a593Smuzhiyun reg = <0>; 57*4882a593Smuzhiyun }; 58*4882a593Smuzhiyun }; 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun spi1: spi@4000c400 { /* USART1 */ 61*4882a593Smuzhiyun cs-gpios = <&gpio 51 1>; // D3 62*4882a593Smuzhiyun energymicro,location = <1>; 63*4882a593Smuzhiyun status = "ok"; 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun ks8851@0 { 66*4882a593Smuzhiyun compatible = "ks8851"; 67*4882a593Smuzhiyun spi-max-frequency = <6000000>; 68*4882a593Smuzhiyun reg = <0>; 69*4882a593Smuzhiyun interrupt-parent = <&boardfpga>; 70*4882a593Smuzhiyun interrupts = <4>; 71*4882a593Smuzhiyun }; 72*4882a593Smuzhiyun }; 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun uart4: uart@4000e400 { /* UART1 */ 75*4882a593Smuzhiyun energymicro,location = <2>; 76*4882a593Smuzhiyun status = "ok"; 77*4882a593Smuzhiyun }; 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun boardfpga: boardfpga@80000000 { 80*4882a593Smuzhiyun compatible = "efm32board"; 81*4882a593Smuzhiyun reg = <0x80000000 0x400>; 82*4882a593Smuzhiyun irq-gpios = <&gpio 64 1>; 83*4882a593Smuzhiyun interrupt-controller; 84*4882a593Smuzhiyun #interrupt-cells = <1>; 85*4882a593Smuzhiyun status = "ok"; 86*4882a593Smuzhiyun }; 87*4882a593Smuzhiyun }; 88*4882a593Smuzhiyun}; 89