xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/cx92755.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun/*
2*4882a593Smuzhiyun * Device Tree Include file for the Conexant Digicolor CX92755 SoC
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Author: Baruch Siach <baruch@tkos.co.il>
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun *  Copyright (C) 2014 Paradox Innovation Ltd.
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * This file is dual-licensed: you can use it either under the terms
9*4882a593Smuzhiyun * of the GPL or the X11 license, at your option. Note that this dual
10*4882a593Smuzhiyun * licensing only applies to this file, and not this project as a
11*4882a593Smuzhiyun * whole.
12*4882a593Smuzhiyun *
13*4882a593Smuzhiyun *  a) This file is free software; you can redistribute it and/or
14*4882a593Smuzhiyun *     modify it under the terms of the GNU General Public License as
15*4882a593Smuzhiyun *     published by the Free Software Foundation; either version 2 of the
16*4882a593Smuzhiyun *     License, or (at your option) any later version.
17*4882a593Smuzhiyun *
18*4882a593Smuzhiyun *     This file is distributed in the hope that it will be useful,
19*4882a593Smuzhiyun *     but WITHOUT ANY WARRANTY; without even the implied warranty of
20*4882a593Smuzhiyun *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
21*4882a593Smuzhiyun *     GNU General Public License for more details.
22*4882a593Smuzhiyun *
23*4882a593Smuzhiyun * Or, alternatively,
24*4882a593Smuzhiyun *
25*4882a593Smuzhiyun *  b) Permission is hereby granted, free of charge, to any person
26*4882a593Smuzhiyun *     obtaining a copy of this software and associated documentation
27*4882a593Smuzhiyun *     files (the "Software"), to deal in the Software without
28*4882a593Smuzhiyun *     restriction, including without limitation the rights to use,
29*4882a593Smuzhiyun *     copy, modify, merge, publish, distribute, sublicense, and/or
30*4882a593Smuzhiyun *     sell copies of the Software, and to permit persons to whom the
31*4882a593Smuzhiyun *     Software is furnished to do so, subject to the following
32*4882a593Smuzhiyun *     conditions:
33*4882a593Smuzhiyun *
34*4882a593Smuzhiyun *     The above copyright notice and this permission notice shall be
35*4882a593Smuzhiyun *     included in all copies or substantial portions of the Software.
36*4882a593Smuzhiyun *
37*4882a593Smuzhiyun *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
38*4882a593Smuzhiyun *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
39*4882a593Smuzhiyun *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
40*4882a593Smuzhiyun *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
41*4882a593Smuzhiyun *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
42*4882a593Smuzhiyun *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
43*4882a593Smuzhiyun *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
44*4882a593Smuzhiyun *     OTHER DEALINGS IN THE SOFTWARE.
45*4882a593Smuzhiyun */
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun/ {
48*4882a593Smuzhiyun	#address-cells = <1>;
49*4882a593Smuzhiyun	#size-cells = <1>;
50*4882a593Smuzhiyun	compatible = "cnxt,cx92755";
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun	interrupt-parent = <&intc>;
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun	cpus {
55*4882a593Smuzhiyun		#address-cells = <1>;
56*4882a593Smuzhiyun		#size-cells = <0>;
57*4882a593Smuzhiyun		cpu@0 {
58*4882a593Smuzhiyun			device_type = "cpu";
59*4882a593Smuzhiyun			compatible = "arm,cortex-a8";
60*4882a593Smuzhiyun			reg = <0x0>;
61*4882a593Smuzhiyun		};
62*4882a593Smuzhiyun	};
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun	main_clk: main_clk {
65*4882a593Smuzhiyun		compatible = "fixed-clock";
66*4882a593Smuzhiyun		#clock-cells = <0>;
67*4882a593Smuzhiyun		clock-frequency  = <200000000>;
68*4882a593Smuzhiyun	};
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun	intc: interrupt-controller@f0000040 {
71*4882a593Smuzhiyun		compatible = "cnxt,cx92755-ic";
72*4882a593Smuzhiyun		interrupt-controller;
73*4882a593Smuzhiyun		#interrupt-cells = <1>;
74*4882a593Smuzhiyun		reg = <0xf0000040 0x40>;
75*4882a593Smuzhiyun		syscon = <&uc_regs>;
76*4882a593Smuzhiyun	};
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun	timer@f0000fc0 {
79*4882a593Smuzhiyun		compatible = "cnxt,cx92755-timer";
80*4882a593Smuzhiyun		reg = <0xf0000fc0 0x40>;
81*4882a593Smuzhiyun		interrupts = <19>, <31>, <34>, <35>, <52>, <53>, <54>, <55>;
82*4882a593Smuzhiyun		clocks = <&main_clk>;
83*4882a593Smuzhiyun	};
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun	rtc@f0000c30 {
86*4882a593Smuzhiyun		compatible = "cnxt,cx92755-rtc";
87*4882a593Smuzhiyun		reg = <0xf0000c30 0x18>;
88*4882a593Smuzhiyun		interrupts = <25>;
89*4882a593Smuzhiyun	};
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun	watchdog@f0000fc0 {
92*4882a593Smuzhiyun		compatible = "cnxt,cx92755-wdt";
93*4882a593Smuzhiyun		reg = <0xf0000fc0 0x8>;
94*4882a593Smuzhiyun		clocks = <&main_clk>;
95*4882a593Smuzhiyun		timeout-sec = <15>;
96*4882a593Smuzhiyun	};
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun	pinctrl: pinctrl@f0000e20 {
99*4882a593Smuzhiyun		compatible = "cnxt,cx92755-pinctrl";
100*4882a593Smuzhiyun		reg = <0xf0000e20 0x100>;
101*4882a593Smuzhiyun		gpio-controller;
102*4882a593Smuzhiyun		#gpio-cells = <2>;
103*4882a593Smuzhiyun	};
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun	uc_regs: syscon@f00003a0 {
106*4882a593Smuzhiyun		compatible = "cnxt,cx92755-uc", "syscon";
107*4882a593Smuzhiyun		reg = <0xf00003a0 0x10>;
108*4882a593Smuzhiyun	};
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun	uart0: uart@f0000740 {
111*4882a593Smuzhiyun		compatible = "cnxt,cx92755-usart";
112*4882a593Smuzhiyun		reg = <0xf0000740 0x20>;
113*4882a593Smuzhiyun		clocks = <&main_clk>;
114*4882a593Smuzhiyun		interrupts = <44>;
115*4882a593Smuzhiyun		status = "disabled";
116*4882a593Smuzhiyun	};
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun	uart1: uart@f0000760 {
119*4882a593Smuzhiyun		compatible = "cnxt,cx92755-usart";
120*4882a593Smuzhiyun		reg = <0xf0000760 0x20>;
121*4882a593Smuzhiyun		clocks = <&main_clk>;
122*4882a593Smuzhiyun		interrupts = <45>;
123*4882a593Smuzhiyun		status = "disabled";
124*4882a593Smuzhiyun	};
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun	uart2: uart@f0000780 {
127*4882a593Smuzhiyun		compatible = "cnxt,cx92755-usart";
128*4882a593Smuzhiyun		reg = <0xf0000780 0x20>;
129*4882a593Smuzhiyun		clocks = <&main_clk>;
130*4882a593Smuzhiyun		interrupts = <46>;
131*4882a593Smuzhiyun		status = "disabled";
132*4882a593Smuzhiyun	};
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun	i2c: i2c@f0000120 {
135*4882a593Smuzhiyun		compatible = "cnxt,cx92755-i2c";
136*4882a593Smuzhiyun		reg = <0xf0000120 0x10>;
137*4882a593Smuzhiyun		interrupts = <28>;
138*4882a593Smuzhiyun		clocks = <&main_clk>;
139*4882a593Smuzhiyun		clock-frequency = <100000>;
140*4882a593Smuzhiyun		#address-cells = <1>;
141*4882a593Smuzhiyun		#size-cells = <0>;
142*4882a593Smuzhiyun		status = "disabled";
143*4882a593Smuzhiyun	};
144*4882a593Smuzhiyun};
145