1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * Copyright (C) 2017 Broadcom 3*4882a593Smuzhiyun * Author: Florian Fainelli <f.fainelli@gmail.com> 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Licensed under the ISC license. 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun/dts-v1/; 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun#include "bcm53573.dtsi" 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun/ { 13*4882a593Smuzhiyun compatible = "brcm,bcm947189acdbmr", "brcm,bcm47189", "brcm,bcm53573"; 14*4882a593Smuzhiyun model = "Broadcom BCM947189ACDBMR"; 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun chosen { 17*4882a593Smuzhiyun bootargs = "console=ttyS0,115200 earlycon"; 18*4882a593Smuzhiyun }; 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun memory@0 { 21*4882a593Smuzhiyun device_type = "memory"; 22*4882a593Smuzhiyun reg = <0x00000000 0x08000000>; 23*4882a593Smuzhiyun }; 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun leds { 26*4882a593Smuzhiyun compatible = "gpio-leds"; 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun wps { 29*4882a593Smuzhiyun label = "bcm53xx:blue:wps"; 30*4882a593Smuzhiyun gpios = <&chipcommon 10 GPIO_ACTIVE_HIGH>; 31*4882a593Smuzhiyun }; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun 5ghz { 34*4882a593Smuzhiyun label = "bcm53xx:blue:5ghz"; 35*4882a593Smuzhiyun gpios = <&chipcommon 11 GPIO_ACTIVE_HIGH>; 36*4882a593Smuzhiyun }; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun 2ghz { 39*4882a593Smuzhiyun label = "bcm53xx:blue:2ghz"; 40*4882a593Smuzhiyun gpios = <&chipcommon 12 GPIO_ACTIVE_HIGH>; 41*4882a593Smuzhiyun }; 42*4882a593Smuzhiyun }; 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun gpio-keys { 45*4882a593Smuzhiyun compatible = "gpio-keys"; 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun restart { 48*4882a593Smuzhiyun label = "Reset"; 49*4882a593Smuzhiyun linux,code = <KEY_RESTART>; 50*4882a593Smuzhiyun gpios = <&chipcommon 7 GPIO_ACTIVE_HIGH>; 51*4882a593Smuzhiyun }; 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun wps { 54*4882a593Smuzhiyun label = "WPS"; 55*4882a593Smuzhiyun linux,code = <KEY_WPS_BUTTON>; 56*4882a593Smuzhiyun gpios = <&chipcommon 9 GPIO_ACTIVE_LOW>; 57*4882a593Smuzhiyun }; 58*4882a593Smuzhiyun }; 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun spi { 61*4882a593Smuzhiyun compatible = "spi-gpio"; 62*4882a593Smuzhiyun num-chipselects = <1>; 63*4882a593Smuzhiyun gpio-sck = <&chipcommon 21 0>; 64*4882a593Smuzhiyun gpio-miso = <&chipcommon 22 0>; 65*4882a593Smuzhiyun gpio-mosi = <&chipcommon 23 0>; 66*4882a593Smuzhiyun cs-gpios = <&chipcommon 24 0>; 67*4882a593Smuzhiyun #address-cells = <1>; 68*4882a593Smuzhiyun #size-cells = <0>; 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun /* External BCM6802 MoCA chip is connected */ 71*4882a593Smuzhiyun }; 72*4882a593Smuzhiyun}; 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun&pcie0 { 75*4882a593Smuzhiyun ranges = <0x00000000 0 0 0 0 0x00100000>; 76*4882a593Smuzhiyun #address-cells = <3>; 77*4882a593Smuzhiyun #size-cells = <2>; 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun bridge@0,0,0 { 80*4882a593Smuzhiyun reg = <0x0000 0 0 0 0>; 81*4882a593Smuzhiyun ranges = <0x00000000 0 0 0 0 0 0 0x00100000>; 82*4882a593Smuzhiyun #address-cells = <3>; 83*4882a593Smuzhiyun #size-cells = <2>; 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun wifi@0,1,0 { 86*4882a593Smuzhiyun reg = <0x0000 0 0 0 0>; 87*4882a593Smuzhiyun ranges = <0x00000000 0 0 0 0x00100000>; 88*4882a593Smuzhiyun #address-cells = <1>; 89*4882a593Smuzhiyun #size-cells = <1>; 90*4882a593Smuzhiyun }; 91*4882a593Smuzhiyun }; 92*4882a593Smuzhiyun}; 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun&usb2 { 95*4882a593Smuzhiyun vcc-gpio = <&chipcommon 8 GPIO_ACTIVE_HIGH>; 96*4882a593Smuzhiyun}; 97