1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-or-later OR MIT 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Broadcom BCM470X / BCM5301X ARM platform code. 4*4882a593Smuzhiyun * DTS for BCM47081 SoC. 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * Copyright © 2014 Rafał Miłecki <zajec5@gmail.com> 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun#include "bcm5301x.dtsi" 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun/ { 12*4882a593Smuzhiyun compatible = "brcm,bcm47081"; 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun aliases { 15*4882a593Smuzhiyun serial0 = &uart0; 16*4882a593Smuzhiyun }; 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun chosen { 19*4882a593Smuzhiyun stdout-path = "serial0:115200n8"; 20*4882a593Smuzhiyun }; 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun cpus { 23*4882a593Smuzhiyun #address-cells = <1>; 24*4882a593Smuzhiyun #size-cells = <0>; 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun cpu@0 { 27*4882a593Smuzhiyun device_type = "cpu"; 28*4882a593Smuzhiyun compatible = "arm,cortex-a9"; 29*4882a593Smuzhiyun next-level-cache = <&L2>; 30*4882a593Smuzhiyun reg = <0x0>; 31*4882a593Smuzhiyun }; 32*4882a593Smuzhiyun }; 33*4882a593Smuzhiyun}; 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun&uart0 { 36*4882a593Smuzhiyun status = "okay"; 37*4882a593Smuzhiyun}; 38