xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/bcm2711-rpi-4-b.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun/dts-v1/;
3*4882a593Smuzhiyun#include "bcm2711.dtsi"
4*4882a593Smuzhiyun#include "bcm2835-rpi.dtsi"
5*4882a593Smuzhiyun#include "bcm283x-rpi-usb-peripheral.dtsi"
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun#include <dt-bindings/reset/raspberrypi,firmware-reset.h>
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun/ {
10*4882a593Smuzhiyun	compatible = "raspberrypi,4-model-b", "brcm,bcm2711";
11*4882a593Smuzhiyun	model = "Raspberry Pi 4 Model B";
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun	chosen {
14*4882a593Smuzhiyun		/* 8250 auxiliary UART instead of pl011 */
15*4882a593Smuzhiyun		stdout-path = "serial1:115200n8";
16*4882a593Smuzhiyun	};
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun	/* Will be filled by the bootloader */
19*4882a593Smuzhiyun	memory@0 {
20*4882a593Smuzhiyun		device_type = "memory";
21*4882a593Smuzhiyun		reg = <0 0 0>;
22*4882a593Smuzhiyun	};
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun	aliases {
25*4882a593Smuzhiyun		emmc2bus = &emmc2bus;
26*4882a593Smuzhiyun		ethernet0 = &genet;
27*4882a593Smuzhiyun		pcie0 = &pcie0;
28*4882a593Smuzhiyun	};
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun	leds {
31*4882a593Smuzhiyun		led-act {
32*4882a593Smuzhiyun			gpios = <&gpio 42 GPIO_ACTIVE_HIGH>;
33*4882a593Smuzhiyun		};
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun		led-pwr {
36*4882a593Smuzhiyun			label = "PWR";
37*4882a593Smuzhiyun			gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
38*4882a593Smuzhiyun			default-state = "keep";
39*4882a593Smuzhiyun			linux,default-trigger = "default-on";
40*4882a593Smuzhiyun		};
41*4882a593Smuzhiyun	};
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun	wifi_pwrseq: wifi-pwrseq {
44*4882a593Smuzhiyun		compatible = "mmc-pwrseq-simple";
45*4882a593Smuzhiyun		reset-gpios = <&expgpio 1 GPIO_ACTIVE_LOW>;
46*4882a593Smuzhiyun	};
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun	sd_io_1v8_reg: sd_io_1v8_reg {
49*4882a593Smuzhiyun		compatible = "regulator-gpio";
50*4882a593Smuzhiyun		regulator-name = "vdd-sd-io";
51*4882a593Smuzhiyun		regulator-min-microvolt = <1800000>;
52*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
53*4882a593Smuzhiyun		regulator-boot-on;
54*4882a593Smuzhiyun		regulator-always-on;
55*4882a593Smuzhiyun		regulator-settling-time-us = <5000>;
56*4882a593Smuzhiyun		gpios = <&expgpio 4 GPIO_ACTIVE_HIGH>;
57*4882a593Smuzhiyun		states = <1800000 0x1>,
58*4882a593Smuzhiyun			 <3300000 0x0>;
59*4882a593Smuzhiyun		status = "okay";
60*4882a593Smuzhiyun	};
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun	sd_vcc_reg: sd_vcc_reg {
63*4882a593Smuzhiyun		compatible = "regulator-fixed";
64*4882a593Smuzhiyun		regulator-name = "vcc-sd";
65*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
66*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
67*4882a593Smuzhiyun		regulator-boot-on;
68*4882a593Smuzhiyun		enable-active-high;
69*4882a593Smuzhiyun		gpio = <&expgpio 6 GPIO_ACTIVE_HIGH>;
70*4882a593Smuzhiyun	};
71*4882a593Smuzhiyun};
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun&ddc0 {
74*4882a593Smuzhiyun	status = "okay";
75*4882a593Smuzhiyun};
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun&ddc1 {
78*4882a593Smuzhiyun	status = "okay";
79*4882a593Smuzhiyun};
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun&firmware {
82*4882a593Smuzhiyun	firmware_clocks: clocks {
83*4882a593Smuzhiyun		compatible = "raspberrypi,firmware-clocks";
84*4882a593Smuzhiyun		#clock-cells = <1>;
85*4882a593Smuzhiyun	};
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun	expgpio: gpio {
88*4882a593Smuzhiyun		compatible = "raspberrypi,firmware-gpio";
89*4882a593Smuzhiyun		gpio-controller;
90*4882a593Smuzhiyun		#gpio-cells = <2>;
91*4882a593Smuzhiyun		gpio-line-names = "BT_ON",
92*4882a593Smuzhiyun				  "WL_ON",
93*4882a593Smuzhiyun				  "PWR_LED_OFF",
94*4882a593Smuzhiyun				  "GLOBAL_RESET",
95*4882a593Smuzhiyun				  "VDD_SD_IO_SEL",
96*4882a593Smuzhiyun				  "CAM_GPIO",
97*4882a593Smuzhiyun				  "SD_PWR_ON",
98*4882a593Smuzhiyun				  "";
99*4882a593Smuzhiyun		status = "okay";
100*4882a593Smuzhiyun	};
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun	reset: reset {
103*4882a593Smuzhiyun		compatible = "raspberrypi,firmware-reset";
104*4882a593Smuzhiyun		#reset-cells = <1>;
105*4882a593Smuzhiyun	};
106*4882a593Smuzhiyun};
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun&gpio {
109*4882a593Smuzhiyun	/*
110*4882a593Smuzhiyun	 * Parts taken from rpi_SCH_4b_4p0_reduced.pdf and
111*4882a593Smuzhiyun	 * the official GPU firmware DT blob.
112*4882a593Smuzhiyun	 *
113*4882a593Smuzhiyun	 * Legend:
114*4882a593Smuzhiyun	 * "FOO" = GPIO line named "FOO" on the schematic
115*4882a593Smuzhiyun	 * "FOO_N" = GPIO line named "FOO" on schematic, active low
116*4882a593Smuzhiyun	 */
117*4882a593Smuzhiyun	gpio-line-names = "ID_SDA",
118*4882a593Smuzhiyun			  "ID_SCL",
119*4882a593Smuzhiyun			  "SDA1",
120*4882a593Smuzhiyun			  "SCL1",
121*4882a593Smuzhiyun			  "GPIO_GCLK",
122*4882a593Smuzhiyun			  "GPIO5",
123*4882a593Smuzhiyun			  "GPIO6",
124*4882a593Smuzhiyun			  "SPI_CE1_N",
125*4882a593Smuzhiyun			  "SPI_CE0_N",
126*4882a593Smuzhiyun			  "SPI_MISO",
127*4882a593Smuzhiyun			  "SPI_MOSI",
128*4882a593Smuzhiyun			  "SPI_SCLK",
129*4882a593Smuzhiyun			  "GPIO12",
130*4882a593Smuzhiyun			  "GPIO13",
131*4882a593Smuzhiyun			  /* Serial port */
132*4882a593Smuzhiyun			  "TXD1",
133*4882a593Smuzhiyun			  "RXD1",
134*4882a593Smuzhiyun			  "GPIO16",
135*4882a593Smuzhiyun			  "GPIO17",
136*4882a593Smuzhiyun			  "GPIO18",
137*4882a593Smuzhiyun			  "GPIO19",
138*4882a593Smuzhiyun			  "GPIO20",
139*4882a593Smuzhiyun			  "GPIO21",
140*4882a593Smuzhiyun			  "GPIO22",
141*4882a593Smuzhiyun			  "GPIO23",
142*4882a593Smuzhiyun			  "GPIO24",
143*4882a593Smuzhiyun			  "GPIO25",
144*4882a593Smuzhiyun			  "GPIO26",
145*4882a593Smuzhiyun			  "GPIO27",
146*4882a593Smuzhiyun			  "RGMII_MDIO",
147*4882a593Smuzhiyun			  "RGMIO_MDC",
148*4882a593Smuzhiyun			  /* Used by BT module */
149*4882a593Smuzhiyun			  "CTS0",
150*4882a593Smuzhiyun			  "RTS0",
151*4882a593Smuzhiyun			  "TXD0",
152*4882a593Smuzhiyun			  "RXD0",
153*4882a593Smuzhiyun			  /* Used by Wifi */
154*4882a593Smuzhiyun			  "SD1_CLK",
155*4882a593Smuzhiyun			  "SD1_CMD",
156*4882a593Smuzhiyun			  "SD1_DATA0",
157*4882a593Smuzhiyun			  "SD1_DATA1",
158*4882a593Smuzhiyun			  "SD1_DATA2",
159*4882a593Smuzhiyun			  "SD1_DATA3",
160*4882a593Smuzhiyun			  /* Shared with SPI flash */
161*4882a593Smuzhiyun			  "PWM0_MISO",
162*4882a593Smuzhiyun			  "PWM1_MOSI",
163*4882a593Smuzhiyun			  "STATUS_LED_G_CLK",
164*4882a593Smuzhiyun			  "SPIFLASH_CE_N",
165*4882a593Smuzhiyun			  "SDA0",
166*4882a593Smuzhiyun			  "SCL0",
167*4882a593Smuzhiyun			  "RGMII_RXCLK",
168*4882a593Smuzhiyun			  "RGMII_RXCTL",
169*4882a593Smuzhiyun			  "RGMII_RXD0",
170*4882a593Smuzhiyun			  "RGMII_RXD1",
171*4882a593Smuzhiyun			  "RGMII_RXD2",
172*4882a593Smuzhiyun			  "RGMII_RXD3",
173*4882a593Smuzhiyun			  "RGMII_TXCLK",
174*4882a593Smuzhiyun			  "RGMII_TXCTL",
175*4882a593Smuzhiyun			  "RGMII_TXD0",
176*4882a593Smuzhiyun			  "RGMII_TXD1",
177*4882a593Smuzhiyun			  "RGMII_TXD2",
178*4882a593Smuzhiyun			  "RGMII_TXD3";
179*4882a593Smuzhiyun};
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun&hdmi0 {
182*4882a593Smuzhiyun	clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 0>, <&clk_27MHz>;
183*4882a593Smuzhiyun	clock-names = "hdmi", "bvb", "audio", "cec";
184*4882a593Smuzhiyun	status = "okay";
185*4882a593Smuzhiyun};
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun&hdmi1 {
188*4882a593Smuzhiyun	clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 1>, <&clk_27MHz>;
189*4882a593Smuzhiyun	clock-names = "hdmi", "bvb", "audio", "cec";
190*4882a593Smuzhiyun	status = "okay";
191*4882a593Smuzhiyun};
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun&hvs {
194*4882a593Smuzhiyun	clocks = <&firmware_clocks 4>;
195*4882a593Smuzhiyun};
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun&pixelvalve0 {
198*4882a593Smuzhiyun	status = "okay";
199*4882a593Smuzhiyun};
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun&pixelvalve1 {
202*4882a593Smuzhiyun	status = "okay";
203*4882a593Smuzhiyun};
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun&pixelvalve2 {
206*4882a593Smuzhiyun	status = "okay";
207*4882a593Smuzhiyun};
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun&pixelvalve4 {
210*4882a593Smuzhiyun	status = "okay";
211*4882a593Smuzhiyun};
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun&pwm1 {
214*4882a593Smuzhiyun	pinctrl-names = "default";
215*4882a593Smuzhiyun	pinctrl-0 = <&pwm1_0_gpio40 &pwm1_1_gpio41>;
216*4882a593Smuzhiyun	status = "okay";
217*4882a593Smuzhiyun};
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun/* SDHCI is used to control the SDIO for wireless */
220*4882a593Smuzhiyun&sdhci {
221*4882a593Smuzhiyun	#address-cells = <1>;
222*4882a593Smuzhiyun	#size-cells = <0>;
223*4882a593Smuzhiyun	pinctrl-names = "default";
224*4882a593Smuzhiyun	pinctrl-0 = <&emmc_gpio34>;
225*4882a593Smuzhiyun	bus-width = <4>;
226*4882a593Smuzhiyun	non-removable;
227*4882a593Smuzhiyun	mmc-pwrseq = <&wifi_pwrseq>;
228*4882a593Smuzhiyun	status = "okay";
229*4882a593Smuzhiyun
230*4882a593Smuzhiyun	brcmf: wifi@1 {
231*4882a593Smuzhiyun		reg = <1>;
232*4882a593Smuzhiyun		compatible = "brcm,bcm4329-fmac";
233*4882a593Smuzhiyun	};
234*4882a593Smuzhiyun};
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun/* EMMC2 is used to drive the SD card */
237*4882a593Smuzhiyun&emmc2 {
238*4882a593Smuzhiyun	vqmmc-supply = <&sd_io_1v8_reg>;
239*4882a593Smuzhiyun	vmmc-supply = <&sd_vcc_reg>;
240*4882a593Smuzhiyun	broken-cd;
241*4882a593Smuzhiyun	status = "okay";
242*4882a593Smuzhiyun};
243*4882a593Smuzhiyun
244*4882a593Smuzhiyun&genet {
245*4882a593Smuzhiyun	phy-handle = <&phy1>;
246*4882a593Smuzhiyun	phy-mode = "rgmii-rxid";
247*4882a593Smuzhiyun	status = "okay";
248*4882a593Smuzhiyun};
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun&genet_mdio {
251*4882a593Smuzhiyun	phy1: ethernet-phy@1 {
252*4882a593Smuzhiyun		/* No PHY interrupt */
253*4882a593Smuzhiyun		reg = <0x1>;
254*4882a593Smuzhiyun	};
255*4882a593Smuzhiyun};
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun&pcie0 {
258*4882a593Smuzhiyun	pci@0,0 {
259*4882a593Smuzhiyun		device_type = "pci";
260*4882a593Smuzhiyun		#address-cells = <3>;
261*4882a593Smuzhiyun		#size-cells = <2>;
262*4882a593Smuzhiyun		ranges;
263*4882a593Smuzhiyun
264*4882a593Smuzhiyun		reg = <0 0 0 0 0>;
265*4882a593Smuzhiyun
266*4882a593Smuzhiyun		usb@0,0 {
267*4882a593Smuzhiyun			reg = <0 0 0 0 0>;
268*4882a593Smuzhiyun			resets = <&reset RASPBERRYPI_FIRMWARE_RESET_ID_USB>;
269*4882a593Smuzhiyun		};
270*4882a593Smuzhiyun	};
271*4882a593Smuzhiyun};
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun/* uart0 communicates with the BT module */
274*4882a593Smuzhiyun&uart0 {
275*4882a593Smuzhiyun	pinctrl-names = "default";
276*4882a593Smuzhiyun	pinctrl-0 = <&uart0_ctsrts_gpio30 &uart0_gpio32>;
277*4882a593Smuzhiyun	uart-has-rtscts;
278*4882a593Smuzhiyun	status = "okay";
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun	bluetooth {
281*4882a593Smuzhiyun		compatible = "brcm,bcm43438-bt";
282*4882a593Smuzhiyun		max-speed = <2000000>;
283*4882a593Smuzhiyun		shutdown-gpios = <&expgpio 0 GPIO_ACTIVE_HIGH>;
284*4882a593Smuzhiyun	};
285*4882a593Smuzhiyun};
286*4882a593Smuzhiyun
287*4882a593Smuzhiyun/* uart1 is mapped to the pin header */
288*4882a593Smuzhiyun&uart1 {
289*4882a593Smuzhiyun	pinctrl-names = "default";
290*4882a593Smuzhiyun	pinctrl-0 = <&uart1_gpio14>;
291*4882a593Smuzhiyun	status = "okay";
292*4882a593Smuzhiyun};
293*4882a593Smuzhiyun
294*4882a593Smuzhiyun&vchiq {
295*4882a593Smuzhiyun	interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
296*4882a593Smuzhiyun};
297*4882a593Smuzhiyun
298*4882a593Smuzhiyun&vc4 {
299*4882a593Smuzhiyun	status = "okay";
300*4882a593Smuzhiyun};
301*4882a593Smuzhiyun
302*4882a593Smuzhiyun&vec {
303*4882a593Smuzhiyun	status = "disabled";
304*4882a593Smuzhiyun};
305