xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/bcm11351.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun/*
2*4882a593Smuzhiyun * Copyright (C) 2012-2013 Broadcom Corporation
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or
5*4882a593Smuzhiyun * modify it under the terms of the GNU General Public License as
6*4882a593Smuzhiyun * published by the Free Software Foundation version 2.
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * This program is distributed "as is" WITHOUT ANY WARRANTY of any
9*4882a593Smuzhiyun * kind, whether express or implied; without even the implied warranty
10*4882a593Smuzhiyun * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
11*4882a593Smuzhiyun * GNU General Public License for more details.
12*4882a593Smuzhiyun */
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun#include <dt-bindings/interrupt-controller/arm-gic.h>
15*4882a593Smuzhiyun#include <dt-bindings/interrupt-controller/irq.h>
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun#include "dt-bindings/clock/bcm281xx.h"
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun/ {
20*4882a593Smuzhiyun	#address-cells = <1>;
21*4882a593Smuzhiyun	#size-cells = <1>;
22*4882a593Smuzhiyun	model = "BCM11351 SoC";
23*4882a593Smuzhiyun	compatible = "brcm,bcm11351";
24*4882a593Smuzhiyun	interrupt-parent = <&gic>;
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun	chosen {
27*4882a593Smuzhiyun		bootargs = "console=ttyS0,115200n8";
28*4882a593Smuzhiyun	};
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun	cpus {
31*4882a593Smuzhiyun		#address-cells = <1>;
32*4882a593Smuzhiyun		#size-cells = <0>;
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun		cpu0: cpu@0 {
35*4882a593Smuzhiyun			device_type = "cpu";
36*4882a593Smuzhiyun			compatible = "arm,cortex-a9";
37*4882a593Smuzhiyun			reg = <0>;
38*4882a593Smuzhiyun		};
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun		cpu1: cpu@1 {
41*4882a593Smuzhiyun			device_type = "cpu";
42*4882a593Smuzhiyun			compatible = "arm,cortex-a9";
43*4882a593Smuzhiyun			enable-method = "brcm,bcm11351-cpu-method";
44*4882a593Smuzhiyun			secondary-boot-reg = <0x3500417c>;
45*4882a593Smuzhiyun			reg = <1>;
46*4882a593Smuzhiyun		};
47*4882a593Smuzhiyun	};
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun	gic: interrupt-controller@3ff00100 {
50*4882a593Smuzhiyun		compatible = "arm,cortex-a9-gic";
51*4882a593Smuzhiyun		#interrupt-cells = <3>;
52*4882a593Smuzhiyun		#address-cells = <0>;
53*4882a593Smuzhiyun		interrupt-controller;
54*4882a593Smuzhiyun		reg = <0x3ff01000 0x1000>,
55*4882a593Smuzhiyun		      <0x3ff00100 0x100>;
56*4882a593Smuzhiyun	};
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun	smc@3404c000 {
59*4882a593Smuzhiyun		compatible = "brcm,bcm11351-smc", "brcm,kona-smc";
60*4882a593Smuzhiyun		reg = <0x3404c000 0x400>; /* 1 KiB in SRAM */
61*4882a593Smuzhiyun	};
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun	uart@3e000000 {
64*4882a593Smuzhiyun		compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
65*4882a593Smuzhiyun		status = "disabled";
66*4882a593Smuzhiyun		reg = <0x3e000000 0x1000>;
67*4882a593Smuzhiyun		clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB>;
68*4882a593Smuzhiyun		interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
69*4882a593Smuzhiyun		reg-shift = <2>;
70*4882a593Smuzhiyun		reg-io-width = <4>;
71*4882a593Smuzhiyun	};
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun	uart@3e001000 {
74*4882a593Smuzhiyun		compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
75*4882a593Smuzhiyun		status = "disabled";
76*4882a593Smuzhiyun		reg = <0x3e001000 0x1000>;
77*4882a593Smuzhiyun		clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB2>;
78*4882a593Smuzhiyun		interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
79*4882a593Smuzhiyun		reg-shift = <2>;
80*4882a593Smuzhiyun		reg-io-width = <4>;
81*4882a593Smuzhiyun	};
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun	uart@3e002000 {
84*4882a593Smuzhiyun		compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
85*4882a593Smuzhiyun		status = "disabled";
86*4882a593Smuzhiyun		reg = <0x3e002000 0x1000>;
87*4882a593Smuzhiyun		clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB3>;
88*4882a593Smuzhiyun		interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
89*4882a593Smuzhiyun		reg-shift = <2>;
90*4882a593Smuzhiyun		reg-io-width = <4>;
91*4882a593Smuzhiyun	};
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun	uart@3e003000 {
94*4882a593Smuzhiyun		compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
95*4882a593Smuzhiyun		status = "disabled";
96*4882a593Smuzhiyun		reg = <0x3e003000 0x1000>;
97*4882a593Smuzhiyun		clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB4>;
98*4882a593Smuzhiyun		interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
99*4882a593Smuzhiyun		reg-shift = <2>;
100*4882a593Smuzhiyun		reg-io-width = <4>;
101*4882a593Smuzhiyun	};
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun	L2: l2-cache@3ff20000 {
104*4882a593Smuzhiyun		compatible = "brcm,bcm11351-a2-pl310-cache";
105*4882a593Smuzhiyun		reg = <0x3ff20000 0x1000>;
106*4882a593Smuzhiyun		cache-unified;
107*4882a593Smuzhiyun		cache-level = <2>;
108*4882a593Smuzhiyun	};
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun	watchdog@35002f40 {
111*4882a593Smuzhiyun		compatible = "brcm,bcm11351-wdt", "brcm,kona-wdt";
112*4882a593Smuzhiyun		reg = <0x35002f40 0x6c>;
113*4882a593Smuzhiyun	};
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun	timer@35006000 {
116*4882a593Smuzhiyun		compatible = "brcm,kona-timer";
117*4882a593Smuzhiyun		reg = <0x35006000 0x1000>;
118*4882a593Smuzhiyun		interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
119*4882a593Smuzhiyun		clocks = <&aon_ccu BCM281XX_AON_CCU_HUB_TIMER>;
120*4882a593Smuzhiyun	};
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun	gpio: gpio@35003000 {
123*4882a593Smuzhiyun		compatible = "brcm,bcm11351-gpio", "brcm,kona-gpio";
124*4882a593Smuzhiyun		reg = <0x35003000 0x800>;
125*4882a593Smuzhiyun		interrupts =
126*4882a593Smuzhiyun		       <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH
127*4882a593Smuzhiyun			GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH
128*4882a593Smuzhiyun			GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH
129*4882a593Smuzhiyun			GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
130*4882a593Smuzhiyun			GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
131*4882a593Smuzhiyun			GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
132*4882a593Smuzhiyun		#gpio-cells = <2>;
133*4882a593Smuzhiyun		#interrupt-cells = <2>;
134*4882a593Smuzhiyun		gpio-controller;
135*4882a593Smuzhiyun		interrupt-controller;
136*4882a593Smuzhiyun	};
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun	sdio1: sdio@3f180000 {
139*4882a593Smuzhiyun		compatible = "brcm,kona-sdhci";
140*4882a593Smuzhiyun		reg = <0x3f180000 0x10000>;
141*4882a593Smuzhiyun		interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
142*4882a593Smuzhiyun		clocks = <&master_ccu BCM281XX_MASTER_CCU_SDIO1>;
143*4882a593Smuzhiyun		status = "disabled";
144*4882a593Smuzhiyun	};
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun	sdio2: sdio@3f190000 {
147*4882a593Smuzhiyun		compatible = "brcm,kona-sdhci";
148*4882a593Smuzhiyun		reg = <0x3f190000 0x10000>;
149*4882a593Smuzhiyun		interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
150*4882a593Smuzhiyun		clocks = <&master_ccu BCM281XX_MASTER_CCU_SDIO2>;
151*4882a593Smuzhiyun		status = "disabled";
152*4882a593Smuzhiyun	};
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun	sdio3: sdio@3f1a0000 {
155*4882a593Smuzhiyun		compatible = "brcm,kona-sdhci";
156*4882a593Smuzhiyun		reg = <0x3f1a0000 0x10000>;
157*4882a593Smuzhiyun		interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
158*4882a593Smuzhiyun		clocks = <&master_ccu BCM281XX_MASTER_CCU_SDIO3>;
159*4882a593Smuzhiyun		status = "disabled";
160*4882a593Smuzhiyun	};
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun	sdio4: sdio@3f1b0000 {
163*4882a593Smuzhiyun		compatible = "brcm,kona-sdhci";
164*4882a593Smuzhiyun		reg = <0x3f1b0000 0x10000>;
165*4882a593Smuzhiyun		interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
166*4882a593Smuzhiyun		clocks = <&master_ccu BCM281XX_MASTER_CCU_SDIO4>;
167*4882a593Smuzhiyun		status = "disabled";
168*4882a593Smuzhiyun	};
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun	pinctrl@35004800 {
171*4882a593Smuzhiyun		compatible = "brcm,bcm11351-pinctrl";
172*4882a593Smuzhiyun		reg = <0x35004800 0x430>;
173*4882a593Smuzhiyun	};
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun	i2c@3e016000 {
176*4882a593Smuzhiyun		compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c";
177*4882a593Smuzhiyun		reg = <0x3e016000 0x80>;
178*4882a593Smuzhiyun		interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
179*4882a593Smuzhiyun		#address-cells = <1>;
180*4882a593Smuzhiyun		#size-cells = <0>;
181*4882a593Smuzhiyun		clocks = <&slave_ccu BCM281XX_SLAVE_CCU_BSC1>;
182*4882a593Smuzhiyun		status = "disabled";
183*4882a593Smuzhiyun	};
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun	i2c@3e017000 {
186*4882a593Smuzhiyun		compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c";
187*4882a593Smuzhiyun		reg = <0x3e017000 0x80>;
188*4882a593Smuzhiyun		interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
189*4882a593Smuzhiyun		#address-cells = <1>;
190*4882a593Smuzhiyun		#size-cells = <0>;
191*4882a593Smuzhiyun		clocks = <&slave_ccu BCM281XX_SLAVE_CCU_BSC2>;
192*4882a593Smuzhiyun		status = "disabled";
193*4882a593Smuzhiyun	};
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun	i2c@3e018000 {
196*4882a593Smuzhiyun		compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c";
197*4882a593Smuzhiyun		reg = <0x3e018000 0x80>;
198*4882a593Smuzhiyun		interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
199*4882a593Smuzhiyun		#address-cells = <1>;
200*4882a593Smuzhiyun		#size-cells = <0>;
201*4882a593Smuzhiyun		clocks = <&slave_ccu BCM281XX_SLAVE_CCU_BSC3>;
202*4882a593Smuzhiyun		status = "disabled";
203*4882a593Smuzhiyun	};
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun	i2c@3500d000 {
206*4882a593Smuzhiyun		compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c";
207*4882a593Smuzhiyun		reg = <0x3500d000 0x80>;
208*4882a593Smuzhiyun		interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
209*4882a593Smuzhiyun		#address-cells = <1>;
210*4882a593Smuzhiyun		#size-cells = <0>;
211*4882a593Smuzhiyun		clocks = <&aon_ccu BCM281XX_AON_CCU_PMU_BSC>;
212*4882a593Smuzhiyun		status = "disabled";
213*4882a593Smuzhiyun	};
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun	pwm: pwm@3e01a000 {
216*4882a593Smuzhiyun		compatible = "brcm,bcm11351-pwm", "brcm,kona-pwm";
217*4882a593Smuzhiyun		reg = <0x3e01a000 0xcc>;
218*4882a593Smuzhiyun		clocks = <&slave_ccu BCM281XX_SLAVE_CCU_PWM>;
219*4882a593Smuzhiyun		#pwm-cells = <3>;
220*4882a593Smuzhiyun		status = "disabled";
221*4882a593Smuzhiyun	};
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun	clocks {
224*4882a593Smuzhiyun		#address-cells = <1>;
225*4882a593Smuzhiyun		#size-cells = <1>;
226*4882a593Smuzhiyun		ranges;
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun		root_ccu: root_ccu@35001000 {
229*4882a593Smuzhiyun			compatible = "brcm,bcm11351-root-ccu";
230*4882a593Smuzhiyun			reg = <0x35001000 0x0f00>;
231*4882a593Smuzhiyun			#clock-cells = <1>;
232*4882a593Smuzhiyun			clock-output-names = "frac_1m";
233*4882a593Smuzhiyun		};
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun		hub_ccu: hub_ccu@34000000 {
236*4882a593Smuzhiyun			compatible = "brcm,bcm11351-hub-ccu";
237*4882a593Smuzhiyun			reg = <0x34000000 0x0f00>;
238*4882a593Smuzhiyun			#clock-cells = <1>;
239*4882a593Smuzhiyun			clock-output-names = "tmon_1m";
240*4882a593Smuzhiyun		};
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun		aon_ccu: aon_ccu@35002000 {
243*4882a593Smuzhiyun			compatible = "brcm,bcm11351-aon-ccu";
244*4882a593Smuzhiyun			reg = <0x35002000 0x0f00>;
245*4882a593Smuzhiyun			#clock-cells = <1>;
246*4882a593Smuzhiyun			clock-output-names = "hub_timer",
247*4882a593Smuzhiyun					     "pmu_bsc",
248*4882a593Smuzhiyun					     "pmu_bsc_var";
249*4882a593Smuzhiyun		};
250*4882a593Smuzhiyun
251*4882a593Smuzhiyun		master_ccu: master_ccu@3f001000 {
252*4882a593Smuzhiyun			compatible = "brcm,bcm11351-master-ccu";
253*4882a593Smuzhiyun			reg = <0x3f001000 0x0f00>;
254*4882a593Smuzhiyun			#clock-cells = <1>;
255*4882a593Smuzhiyun			clock-output-names = "sdio1",
256*4882a593Smuzhiyun					     "sdio2",
257*4882a593Smuzhiyun					     "sdio3",
258*4882a593Smuzhiyun					     "sdio4",
259*4882a593Smuzhiyun					     "usb_ic",
260*4882a593Smuzhiyun					     "hsic2_48m",
261*4882a593Smuzhiyun					     "hsic2_12m";
262*4882a593Smuzhiyun		};
263*4882a593Smuzhiyun
264*4882a593Smuzhiyun		slave_ccu: slave_ccu@3e011000 {
265*4882a593Smuzhiyun			compatible = "brcm,bcm11351-slave-ccu";
266*4882a593Smuzhiyun			reg = <0x3e011000 0x0f00>;
267*4882a593Smuzhiyun			#clock-cells = <1>;
268*4882a593Smuzhiyun			clock-output-names = "uartb",
269*4882a593Smuzhiyun					     "uartb2",
270*4882a593Smuzhiyun					     "uartb3",
271*4882a593Smuzhiyun					     "uartb4",
272*4882a593Smuzhiyun					     "ssp0",
273*4882a593Smuzhiyun					     "ssp2",
274*4882a593Smuzhiyun					     "bsc1",
275*4882a593Smuzhiyun					     "bsc2",
276*4882a593Smuzhiyun					     "bsc3",
277*4882a593Smuzhiyun					     "pwm";
278*4882a593Smuzhiyun		};
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun		ref_1m_clk: ref_1m {
281*4882a593Smuzhiyun			#clock-cells = <0>;
282*4882a593Smuzhiyun			compatible = "fixed-clock";
283*4882a593Smuzhiyun			clock-frequency = <1000000>;
284*4882a593Smuzhiyun		};
285*4882a593Smuzhiyun
286*4882a593Smuzhiyun		ref_32k_clk: ref_32k {
287*4882a593Smuzhiyun			#clock-cells = <0>;
288*4882a593Smuzhiyun			compatible = "fixed-clock";
289*4882a593Smuzhiyun			clock-frequency = <32768>;
290*4882a593Smuzhiyun		};
291*4882a593Smuzhiyun
292*4882a593Smuzhiyun		bbl_32k_clk: bbl_32k {
293*4882a593Smuzhiyun			#clock-cells = <0>;
294*4882a593Smuzhiyun			compatible = "fixed-clock";
295*4882a593Smuzhiyun			clock-frequency = <32768>;
296*4882a593Smuzhiyun		};
297*4882a593Smuzhiyun
298*4882a593Smuzhiyun		ref_13m_clk: ref_13m {
299*4882a593Smuzhiyun			#clock-cells = <0>;
300*4882a593Smuzhiyun			compatible = "fixed-clock";
301*4882a593Smuzhiyun			clock-frequency = <13000000>;
302*4882a593Smuzhiyun		};
303*4882a593Smuzhiyun
304*4882a593Smuzhiyun		var_13m_clk: var_13m {
305*4882a593Smuzhiyun			#clock-cells = <0>;
306*4882a593Smuzhiyun			compatible = "fixed-clock";
307*4882a593Smuzhiyun			clock-frequency = <13000000>;
308*4882a593Smuzhiyun		};
309*4882a593Smuzhiyun
310*4882a593Smuzhiyun		dft_19_5m_clk: dft_19_5m {
311*4882a593Smuzhiyun			#clock-cells = <0>;
312*4882a593Smuzhiyun			compatible = "fixed-clock";
313*4882a593Smuzhiyun			clock-frequency = <19500000>;
314*4882a593Smuzhiyun		};
315*4882a593Smuzhiyun
316*4882a593Smuzhiyun		ref_crystal_clk: ref_crystal {
317*4882a593Smuzhiyun			#clock-cells = <0>;
318*4882a593Smuzhiyun			compatible = "fixed-clock";
319*4882a593Smuzhiyun			clock-frequency = <26000000>;
320*4882a593Smuzhiyun		};
321*4882a593Smuzhiyun
322*4882a593Smuzhiyun		ref_cx40_clk: ref_cx40 {
323*4882a593Smuzhiyun			#clock-cells = <0>;
324*4882a593Smuzhiyun			compatible = "fixed-clock";
325*4882a593Smuzhiyun			clock-frequency = <40000000>;
326*4882a593Smuzhiyun		};
327*4882a593Smuzhiyun
328*4882a593Smuzhiyun		ref_52m_clk: ref_52m {
329*4882a593Smuzhiyun			#clock-cells = <0>;
330*4882a593Smuzhiyun			compatible = "fixed-clock";
331*4882a593Smuzhiyun			clock-frequency = <52000000>;
332*4882a593Smuzhiyun		};
333*4882a593Smuzhiyun
334*4882a593Smuzhiyun		var_52m_clk: var_52m {
335*4882a593Smuzhiyun			#clock-cells = <0>;
336*4882a593Smuzhiyun			compatible = "fixed-clock";
337*4882a593Smuzhiyun			clock-frequency = <52000000>;
338*4882a593Smuzhiyun		};
339*4882a593Smuzhiyun
340*4882a593Smuzhiyun		usb_otg_ahb_clk: usb_otg_ahb {
341*4882a593Smuzhiyun			compatible = "fixed-clock";
342*4882a593Smuzhiyun			clock-frequency = <52000000>;
343*4882a593Smuzhiyun			#clock-cells = <0>;
344*4882a593Smuzhiyun		};
345*4882a593Smuzhiyun
346*4882a593Smuzhiyun		ref_96m_clk: ref_96m {
347*4882a593Smuzhiyun			#clock-cells = <0>;
348*4882a593Smuzhiyun			compatible = "fixed-clock";
349*4882a593Smuzhiyun			clock-frequency = <96000000>;
350*4882a593Smuzhiyun		};
351*4882a593Smuzhiyun
352*4882a593Smuzhiyun		var_96m_clk: var_96m {
353*4882a593Smuzhiyun			#clock-cells = <0>;
354*4882a593Smuzhiyun			compatible = "fixed-clock";
355*4882a593Smuzhiyun			clock-frequency = <96000000>;
356*4882a593Smuzhiyun		};
357*4882a593Smuzhiyun
358*4882a593Smuzhiyun		ref_104m_clk: ref_104m {
359*4882a593Smuzhiyun			#clock-cells = <0>;
360*4882a593Smuzhiyun			compatible = "fixed-clock";
361*4882a593Smuzhiyun			clock-frequency = <104000000>;
362*4882a593Smuzhiyun		};
363*4882a593Smuzhiyun
364*4882a593Smuzhiyun		var_104m_clk: var_104m {
365*4882a593Smuzhiyun			#clock-cells = <0>;
366*4882a593Smuzhiyun			compatible = "fixed-clock";
367*4882a593Smuzhiyun			clock-frequency = <104000000>;
368*4882a593Smuzhiyun		};
369*4882a593Smuzhiyun
370*4882a593Smuzhiyun		ref_156m_clk: ref_156m {
371*4882a593Smuzhiyun			#clock-cells = <0>;
372*4882a593Smuzhiyun			compatible = "fixed-clock";
373*4882a593Smuzhiyun			clock-frequency = <156000000>;
374*4882a593Smuzhiyun		};
375*4882a593Smuzhiyun
376*4882a593Smuzhiyun		var_156m_clk: var_156m {
377*4882a593Smuzhiyun			#clock-cells = <0>;
378*4882a593Smuzhiyun			compatible = "fixed-clock";
379*4882a593Smuzhiyun			clock-frequency = <156000000>;
380*4882a593Smuzhiyun		};
381*4882a593Smuzhiyun
382*4882a593Smuzhiyun		ref_208m_clk: ref_208m {
383*4882a593Smuzhiyun			#clock-cells = <0>;
384*4882a593Smuzhiyun			compatible = "fixed-clock";
385*4882a593Smuzhiyun			clock-frequency = <208000000>;
386*4882a593Smuzhiyun		};
387*4882a593Smuzhiyun
388*4882a593Smuzhiyun		var_208m_clk: var_208m {
389*4882a593Smuzhiyun			#clock-cells = <0>;
390*4882a593Smuzhiyun			compatible = "fixed-clock";
391*4882a593Smuzhiyun			clock-frequency = <208000000>;
392*4882a593Smuzhiyun		};
393*4882a593Smuzhiyun
394*4882a593Smuzhiyun		ref_312m_clk: ref_312m {
395*4882a593Smuzhiyun			#clock-cells = <0>;
396*4882a593Smuzhiyun			compatible = "fixed-clock";
397*4882a593Smuzhiyun			clock-frequency = <312000000>;
398*4882a593Smuzhiyun		};
399*4882a593Smuzhiyun
400*4882a593Smuzhiyun		var_312m_clk: var_312m {
401*4882a593Smuzhiyun			#clock-cells = <0>;
402*4882a593Smuzhiyun			compatible = "fixed-clock";
403*4882a593Smuzhiyun			clock-frequency = <312000000>;
404*4882a593Smuzhiyun		};
405*4882a593Smuzhiyun	};
406*4882a593Smuzhiyun
407*4882a593Smuzhiyun	usbotg: usb@3f120000 {
408*4882a593Smuzhiyun		compatible = "snps,dwc2";
409*4882a593Smuzhiyun		reg = <0x3f120000 0x10000>;
410*4882a593Smuzhiyun		interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
411*4882a593Smuzhiyun		clocks = <&usb_otg_ahb_clk>;
412*4882a593Smuzhiyun		clock-names = "otg";
413*4882a593Smuzhiyun		phys = <&usbphy>;
414*4882a593Smuzhiyun		phy-names = "usb2-phy";
415*4882a593Smuzhiyun		status = "disabled";
416*4882a593Smuzhiyun	};
417*4882a593Smuzhiyun
418*4882a593Smuzhiyun	usbphy: usb-phy@3f130000 {
419*4882a593Smuzhiyun		compatible = "brcm,kona-usb2-phy";
420*4882a593Smuzhiyun		reg = <0x3f130000 0x28>;
421*4882a593Smuzhiyun		#phy-cells = <0>;
422*4882a593Smuzhiyun		status = "disabled";
423*4882a593Smuzhiyun	};
424*4882a593Smuzhiyun};
425