1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * BSD LICENSE 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Copyright(c) 2014 Broadcom Corporation. All rights reserved. 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * Redistribution and use in source and binary forms, with or without 7*4882a593Smuzhiyun * modification, are permitted provided that the following conditions 8*4882a593Smuzhiyun * are met: 9*4882a593Smuzhiyun * 10*4882a593Smuzhiyun * * Redistributions of source code must retain the above copyright 11*4882a593Smuzhiyun * notice, this list of conditions and the following disclaimer. 12*4882a593Smuzhiyun * * Redistributions in binary form must reproduce the above copyright 13*4882a593Smuzhiyun * notice, this list of conditions and the following disclaimer in 14*4882a593Smuzhiyun * the documentation and/or other materials provided with the 15*4882a593Smuzhiyun * distribution. 16*4882a593Smuzhiyun * * Neither the name of Broadcom Corporation nor the names of its 17*4882a593Smuzhiyun * contributors may be used to endorse or promote products derived 18*4882a593Smuzhiyun * from this software without specific prior written permission. 19*4882a593Smuzhiyun * 20*4882a593Smuzhiyun * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 21*4882a593Smuzhiyun * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 22*4882a593Smuzhiyun * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 23*4882a593Smuzhiyun * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 24*4882a593Smuzhiyun * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 25*4882a593Smuzhiyun * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 26*4882a593Smuzhiyun * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 27*4882a593Smuzhiyun * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 28*4882a593Smuzhiyun * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29*4882a593Smuzhiyun * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 30*4882a593Smuzhiyun * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31*4882a593Smuzhiyun */ 32*4882a593Smuzhiyun 33*4882a593Smuzhiyunclocks { 34*4882a593Smuzhiyun #address-cells = <1>; 35*4882a593Smuzhiyun #size-cells = <1>; 36*4882a593Smuzhiyun ranges; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun osc: oscillator { 39*4882a593Smuzhiyun #clock-cells = <0>; 40*4882a593Smuzhiyun compatible = "fixed-clock"; 41*4882a593Smuzhiyun clock-frequency = <25000000>; 42*4882a593Smuzhiyun }; 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun /* Cygnus ARM PLL */ 45*4882a593Smuzhiyun armpll: armpll@19000000 { 46*4882a593Smuzhiyun #clock-cells = <0>; 47*4882a593Smuzhiyun compatible = "brcm,cygnus-armpll"; 48*4882a593Smuzhiyun clocks = <&osc>; 49*4882a593Smuzhiyun reg = <0x19000000 0x1000>; 50*4882a593Smuzhiyun }; 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun /* peripheral clock for system timer */ 53*4882a593Smuzhiyun periph_clk: arm_periph_clk { 54*4882a593Smuzhiyun #clock-cells = <0>; 55*4882a593Smuzhiyun compatible = "fixed-factor-clock"; 56*4882a593Smuzhiyun clocks = <&armpll>; 57*4882a593Smuzhiyun clock-div = <2>; 58*4882a593Smuzhiyun clock-mult = <1>; 59*4882a593Smuzhiyun }; 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun /* APB bus clock */ 62*4882a593Smuzhiyun apb_clk: apb_clk { 63*4882a593Smuzhiyun #clock-cells = <0>; 64*4882a593Smuzhiyun compatible = "fixed-factor-clock"; 65*4882a593Smuzhiyun clocks = <&armpll>; 66*4882a593Smuzhiyun clock-div = <4>; 67*4882a593Smuzhiyun clock-mult = <1>; 68*4882a593Smuzhiyun }; 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun genpll: genpll@301d000 { 71*4882a593Smuzhiyun #clock-cells = <1>; 72*4882a593Smuzhiyun compatible = "brcm,cygnus-genpll"; 73*4882a593Smuzhiyun reg = <0x0301d000 0x2c>, <0x0301c020 0x4>; 74*4882a593Smuzhiyun clocks = <&osc>; 75*4882a593Smuzhiyun clock-output-names = "genpll", "axi21", "250mhz", "ihost_sys", 76*4882a593Smuzhiyun "enet_sw", "audio_125", "can"; 77*4882a593Smuzhiyun }; 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun /* always 1/2 of the axi21 clock */ 80*4882a593Smuzhiyun axi41_clk: axi41_clk { 81*4882a593Smuzhiyun #clock-cells = <0>; 82*4882a593Smuzhiyun compatible = "fixed-factor-clock"; 83*4882a593Smuzhiyun clocks = <&genpll 1>; 84*4882a593Smuzhiyun clock-div = <2>; 85*4882a593Smuzhiyun clock-mult = <1>; 86*4882a593Smuzhiyun }; 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun /* always 1/4 of the axi21 clock */ 89*4882a593Smuzhiyun axi81_clk: axi81_clk { 90*4882a593Smuzhiyun #clock-cells = <0>; 91*4882a593Smuzhiyun compatible = "fixed-factor-clock"; 92*4882a593Smuzhiyun clocks = <&genpll 1>; 93*4882a593Smuzhiyun clock-div = <4>; 94*4882a593Smuzhiyun clock-mult = <1>; 95*4882a593Smuzhiyun }; 96*4882a593Smuzhiyun 97*4882a593Smuzhiyun lcpll0: lcpll0@301d02c { 98*4882a593Smuzhiyun #clock-cells = <1>; 99*4882a593Smuzhiyun compatible = "brcm,cygnus-lcpll0"; 100*4882a593Smuzhiyun reg = <0x0301d02c 0x1c>, <0x0301c020 0x4>; 101*4882a593Smuzhiyun clocks = <&osc>; 102*4882a593Smuzhiyun clock-output-names = "lcpll0", "pcie_phy", "ddr_phy", "sdio", 103*4882a593Smuzhiyun "usb_phy", "smart_card", "ch5"; 104*4882a593Smuzhiyun }; 105*4882a593Smuzhiyun 106*4882a593Smuzhiyun mipipll: mipipll@180a9800 { 107*4882a593Smuzhiyun #clock-cells = <1>; 108*4882a593Smuzhiyun compatible = "brcm,cygnus-mipipll"; 109*4882a593Smuzhiyun reg = <0x180a9800 0x2c>, <0x0301c020 0x4>, <0x180aa024 0x4>; 110*4882a593Smuzhiyun clocks = <&osc>; 111*4882a593Smuzhiyun clock-output-names = "mipipll", "ch0_unused", "ch1_lcd", 112*4882a593Smuzhiyun "ch2_v3d", "ch3_unused", "ch4_unused", 113*4882a593Smuzhiyun "ch5_unused"; 114*4882a593Smuzhiyun }; 115*4882a593Smuzhiyun 116*4882a593Smuzhiyun asiu_clks: asiu_clks@301d048 { 117*4882a593Smuzhiyun #clock-cells = <1>; 118*4882a593Smuzhiyun compatible = "brcm,cygnus-asiu-clk"; 119*4882a593Smuzhiyun reg = <0x0301d048 0xc>, <0x180aa024 0x4>; 120*4882a593Smuzhiyun 121*4882a593Smuzhiyun clocks = <&osc>; 122*4882a593Smuzhiyun clock-output-names = "keypad", "adc/touch", "pwm"; 123*4882a593Smuzhiyun }; 124*4882a593Smuzhiyun 125*4882a593Smuzhiyun audiopll: audiopll@180aeb00 { 126*4882a593Smuzhiyun #clock-cells = <1>; 127*4882a593Smuzhiyun compatible = "brcm,cygnus-audiopll"; 128*4882a593Smuzhiyun reg = <0x180aeb00 0x68>; 129*4882a593Smuzhiyun clocks = <&osc>; 130*4882a593Smuzhiyun clock-output-names = "audiopll", "ch0_audio", 131*4882a593Smuzhiyun "ch1_audio", "ch2_audio"; 132*4882a593Smuzhiyun }; 133*4882a593Smuzhiyun}; 134