1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-or-later 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * at91sam9x5cm.dtsi - Device Tree Include file for AT91SAM9x5 CPU Module 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2012 Atmel, 6*4882a593Smuzhiyun * 2012 Nicolas Ferre <nicolas.ferre@atmel.com> 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun/ { 10*4882a593Smuzhiyun memory@20000000 { 11*4882a593Smuzhiyun reg = <0x20000000 0x8000000>; 12*4882a593Smuzhiyun }; 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun clocks { 15*4882a593Smuzhiyun slow_xtal { 16*4882a593Smuzhiyun clock-frequency = <32768>; 17*4882a593Smuzhiyun }; 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun main_xtal { 20*4882a593Smuzhiyun clock-frequency = <12000000>; 21*4882a593Smuzhiyun }; 22*4882a593Smuzhiyun }; 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun ahb { 25*4882a593Smuzhiyun apb { 26*4882a593Smuzhiyun tcb0: timer@f8008000 { 27*4882a593Smuzhiyun timer@0 { 28*4882a593Smuzhiyun compatible = "atmel,tcb-timer"; 29*4882a593Smuzhiyun reg = <0>; 30*4882a593Smuzhiyun }; 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun timer@1 { 33*4882a593Smuzhiyun compatible = "atmel,tcb-timer"; 34*4882a593Smuzhiyun reg = <1>; 35*4882a593Smuzhiyun }; 36*4882a593Smuzhiyun }; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun pinctrl@fffff400 { 39*4882a593Smuzhiyun 1wire_cm { 40*4882a593Smuzhiyun pinctrl_1wire_cm: 1wire_cm-0 { 41*4882a593Smuzhiyun atmel,pins = <AT91_PIOB 18 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PB18 multidrive, conflicts with led */ 42*4882a593Smuzhiyun }; 43*4882a593Smuzhiyun }; 44*4882a593Smuzhiyun }; 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun rtc@fffffeb0 { 47*4882a593Smuzhiyun status = "okay"; 48*4882a593Smuzhiyun }; 49*4882a593Smuzhiyun }; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun ebi: ebi@10000000 { 52*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_ebi_addr_nand 53*4882a593Smuzhiyun &pinctrl_ebi_data_0_7>; 54*4882a593Smuzhiyun pinctrl-names = "default"; 55*4882a593Smuzhiyun status = "okay"; 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun nand_controller: nand-controller { 58*4882a593Smuzhiyun status = "okay"; 59*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_nand_oe_we 60*4882a593Smuzhiyun &pinctrl_nand_cs 61*4882a593Smuzhiyun &pinctrl_nand_rb>; 62*4882a593Smuzhiyun pinctrl-names = "default"; 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun nand@3 { 65*4882a593Smuzhiyun reg = <0x3 0x0 0x800000>; 66*4882a593Smuzhiyun rb-gpios = <&pioD 5 GPIO_ACTIVE_HIGH>; 67*4882a593Smuzhiyun cs-gpios = <&pioD 4 GPIO_ACTIVE_HIGH>; 68*4882a593Smuzhiyun nand-bus-width = <8>; 69*4882a593Smuzhiyun nand-ecc-mode = "hw"; 70*4882a593Smuzhiyun nand-ecc-strength = <2>; 71*4882a593Smuzhiyun nand-ecc-step-size = <512>; 72*4882a593Smuzhiyun nand-on-flash-bbt; 73*4882a593Smuzhiyun label = "atmel_nand"; 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun partitions { 76*4882a593Smuzhiyun compatible = "fixed-partitions"; 77*4882a593Smuzhiyun #address-cells = <1>; 78*4882a593Smuzhiyun #size-cells = <1>; 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun at91bootstrap@0 { 81*4882a593Smuzhiyun label = "at91bootstrap"; 82*4882a593Smuzhiyun reg = <0x0 0x40000>; 83*4882a593Smuzhiyun }; 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun uboot@40000 { 86*4882a593Smuzhiyun label = "u-boot"; 87*4882a593Smuzhiyun reg = <0x40000 0xc0000>; 88*4882a593Smuzhiyun }; 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun ubootenvred@100000 { 91*4882a593Smuzhiyun label = "U-Boot Env Redundant"; 92*4882a593Smuzhiyun reg = <0x100000 0x40000>; 93*4882a593Smuzhiyun }; 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun ubootenv@140000 { 96*4882a593Smuzhiyun label = "U-Boot Env"; 97*4882a593Smuzhiyun reg = <0x140000 0x40000>; 98*4882a593Smuzhiyun }; 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun dtb@180000 { 101*4882a593Smuzhiyun label = "device tree"; 102*4882a593Smuzhiyun reg = <0x180000 0x80000>; 103*4882a593Smuzhiyun }; 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun kernel@200000 { 106*4882a593Smuzhiyun label = "kernel"; 107*4882a593Smuzhiyun reg = <0x200000 0x600000>; 108*4882a593Smuzhiyun }; 109*4882a593Smuzhiyun 110*4882a593Smuzhiyun rootfs@800000 { 111*4882a593Smuzhiyun label = "rootfs"; 112*4882a593Smuzhiyun reg = <0x800000 0x0f800000>; 113*4882a593Smuzhiyun }; 114*4882a593Smuzhiyun }; 115*4882a593Smuzhiyun }; 116*4882a593Smuzhiyun }; 117*4882a593Smuzhiyun }; 118*4882a593Smuzhiyun }; 119*4882a593Smuzhiyun 120*4882a593Smuzhiyun leds { 121*4882a593Smuzhiyun compatible = "gpio-leds"; 122*4882a593Smuzhiyun 123*4882a593Smuzhiyun pb18 { 124*4882a593Smuzhiyun label = "pb18"; 125*4882a593Smuzhiyun gpios = <&pioB 18 GPIO_ACTIVE_LOW>; 126*4882a593Smuzhiyun linux,default-trigger = "heartbeat"; 127*4882a593Smuzhiyun }; 128*4882a593Smuzhiyun 129*4882a593Smuzhiyun pd21 { 130*4882a593Smuzhiyun label = "pd21"; 131*4882a593Smuzhiyun gpios = <&pioD 21 GPIO_ACTIVE_HIGH>; 132*4882a593Smuzhiyun }; 133*4882a593Smuzhiyun }; 134*4882a593Smuzhiyun 135*4882a593Smuzhiyun 1wire_cm { 136*4882a593Smuzhiyun compatible = "w1-gpio"; 137*4882a593Smuzhiyun gpios = <&pioB 18 GPIO_ACTIVE_HIGH>; 138*4882a593Smuzhiyun linux,open-drain; 139*4882a593Smuzhiyun pinctrl-names = "default"; 140*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_1wire_cm>; 141*4882a593Smuzhiyun status = "okay"; 142*4882a593Smuzhiyun }; 143*4882a593Smuzhiyun 144*4882a593Smuzhiyun}; 145