1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-only 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * at91sam9x5_usart3.dtsi - Device Tree Include file for AT91SAM9x5 SoC with 4*4882a593Smuzhiyun * 4 USART. 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com> 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun#include <dt-bindings/pinctrl/at91.h> 10*4882a593Smuzhiyun#include <dt-bindings/interrupt-controller/irq.h> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun/ { 13*4882a593Smuzhiyun aliases { 14*4882a593Smuzhiyun serial4 = &usart3; 15*4882a593Smuzhiyun }; 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun ahb { 18*4882a593Smuzhiyun apb { 19*4882a593Smuzhiyun pinctrl@fffff400 { 20*4882a593Smuzhiyun usart3 { 21*4882a593Smuzhiyun pinctrl_usart3: usart3-0 { 22*4882a593Smuzhiyun atmel,pins = 23*4882a593Smuzhiyun <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE 24*4882a593Smuzhiyun AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; 25*4882a593Smuzhiyun }; 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun pinctrl_usart3_rts: usart3_rts-0 { 28*4882a593Smuzhiyun atmel,pins = 29*4882a593Smuzhiyun <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC24 periph B */ 30*4882a593Smuzhiyun }; 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun pinctrl_usart3_cts: usart3_cts-0 { 33*4882a593Smuzhiyun atmel,pins = 34*4882a593Smuzhiyun <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC25 periph B */ 35*4882a593Smuzhiyun }; 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun pinctrl_usart3_sck: usart3_sck-0 { 38*4882a593Smuzhiyun atmel,pins = 39*4882a593Smuzhiyun <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC26 periph B */ 40*4882a593Smuzhiyun }; 41*4882a593Smuzhiyun }; 42*4882a593Smuzhiyun }; 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun usart3: serial@f8028000 { 45*4882a593Smuzhiyun compatible = "atmel,at91sam9260-usart"; 46*4882a593Smuzhiyun reg = <0xf8028000 0x200>; 47*4882a593Smuzhiyun interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>; 48*4882a593Smuzhiyun pinctrl-names = "default"; 49*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_usart3>; 50*4882a593Smuzhiyun dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(14)>, 51*4882a593Smuzhiyun <&dma1 1 (AT91_DMA_CFG_PER_ID(15) | AT91_DMA_CFG_FIFOCFG_ASAP)>; 52*4882a593Smuzhiyun dma-names = "tx", "rx"; 53*4882a593Smuzhiyun clocks = <&pmc PMC_TYPE_PERIPHERAL 8>; 54*4882a593Smuzhiyun clock-names = "usart"; 55*4882a593Smuzhiyun status = "disabled"; 56*4882a593Smuzhiyun }; 57*4882a593Smuzhiyun }; 58*4882a593Smuzhiyun }; 59*4882a593Smuzhiyun}; 60