1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-only 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * at91sam9rlek.dts - Device Tree file for Atmel at91sam9rl reference board 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2014 Microchip 6*4882a593Smuzhiyun * Alexandre Belloni <alexandre.belloni@free-electrons.com> 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun/dts-v1/; 9*4882a593Smuzhiyun#include "at91sam9rl.dtsi" 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun/ { 12*4882a593Smuzhiyun model = "Atmel at91sam9rlek"; 13*4882a593Smuzhiyun compatible = "atmel,at91sam9rlek", "atmel,at91sam9rl", "atmel,at91sam9"; 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun chosen { 16*4882a593Smuzhiyun bootargs = "rootfstype=ubifs root=ubi0:rootfs ubi.mtd=5 rw"; 17*4882a593Smuzhiyun stdout-path = "serial0:115200n8"; 18*4882a593Smuzhiyun }; 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun memory@20000000 { 21*4882a593Smuzhiyun reg = <0x20000000 0x4000000>; 22*4882a593Smuzhiyun }; 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun clocks { 25*4882a593Smuzhiyun slow_xtal { 26*4882a593Smuzhiyun clock-frequency = <32768>; 27*4882a593Smuzhiyun }; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun main_xtal { 30*4882a593Smuzhiyun clock-frequency = <12000000>; 31*4882a593Smuzhiyun }; 32*4882a593Smuzhiyun }; 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun ahb { 35*4882a593Smuzhiyun fb0: fb@500000 { 36*4882a593Smuzhiyun display = <&display0>; 37*4882a593Smuzhiyun status = "okay"; 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun display0: panel { 40*4882a593Smuzhiyun bits-per-pixel = <16>; 41*4882a593Smuzhiyun atmel,lcdcon-backlight; 42*4882a593Smuzhiyun atmel,dmacon = <0x1>; 43*4882a593Smuzhiyun atmel,lcdcon2 = <0x80008002>; 44*4882a593Smuzhiyun atmel,guard-time = <1>; 45*4882a593Smuzhiyun atmel,lcd-wiring-mode = "RGB"; 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun display-timings { 48*4882a593Smuzhiyun native-mode = <&timing0>; 49*4882a593Smuzhiyun timing0: timing0 { 50*4882a593Smuzhiyun clock-frequency = <4965000>; 51*4882a593Smuzhiyun hactive = <240>; 52*4882a593Smuzhiyun vactive = <320>; 53*4882a593Smuzhiyun hback-porch = <1>; 54*4882a593Smuzhiyun hfront-porch = <33>; 55*4882a593Smuzhiyun vback-porch = <1>; 56*4882a593Smuzhiyun vfront-porch = <0>; 57*4882a593Smuzhiyun hsync-len = <5>; 58*4882a593Smuzhiyun vsync-len = <1>; 59*4882a593Smuzhiyun hsync-active = <1>; 60*4882a593Smuzhiyun vsync-active = <1>; 61*4882a593Smuzhiyun }; 62*4882a593Smuzhiyun }; 63*4882a593Smuzhiyun }; 64*4882a593Smuzhiyun }; 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun ebi: ebi@10000000 { 67*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_ebi_addr_nand>; 68*4882a593Smuzhiyun pinctrl-names = "default"; 69*4882a593Smuzhiyun status = "okay"; 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun nand_controller: nand-controller { 72*4882a593Smuzhiyun status = "okay"; 73*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_nand_oe_we 74*4882a593Smuzhiyun &pinctrl_nand_cs 75*4882a593Smuzhiyun &pinctrl_nand_rb>; 76*4882a593Smuzhiyun pinctrl-names = "default"; 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun nand@3 { 79*4882a593Smuzhiyun reg = <0x3 0x0 0x800000>; 80*4882a593Smuzhiyun rb-gpios = <&pioD 17 GPIO_ACTIVE_HIGH>; 81*4882a593Smuzhiyun cs-gpios = <&pioB 6 GPIO_ACTIVE_HIGH>; 82*4882a593Smuzhiyun nand-bus-width = <8>; 83*4882a593Smuzhiyun nand-ecc-mode = "soft"; 84*4882a593Smuzhiyun nand-on-flash-bbt; 85*4882a593Smuzhiyun label = "atmel_nand"; 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun partitions { 88*4882a593Smuzhiyun compatible = "fixed-partitions"; 89*4882a593Smuzhiyun #address-cells = <1>; 90*4882a593Smuzhiyun #size-cells = <1>; 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun at91bootstrap@0 { 93*4882a593Smuzhiyun label = "at91bootstrap"; 94*4882a593Smuzhiyun reg = <0x0 0x40000>; 95*4882a593Smuzhiyun }; 96*4882a593Smuzhiyun 97*4882a593Smuzhiyun bootloader@40000 { 98*4882a593Smuzhiyun label = "bootloader"; 99*4882a593Smuzhiyun reg = <0x40000 0x80000>; 100*4882a593Smuzhiyun }; 101*4882a593Smuzhiyun 102*4882a593Smuzhiyun bootloaderenv@c0000 { 103*4882a593Smuzhiyun label = "bootloader env"; 104*4882a593Smuzhiyun reg = <0xc0000 0xc0000>; 105*4882a593Smuzhiyun }; 106*4882a593Smuzhiyun 107*4882a593Smuzhiyun dtb@180000 { 108*4882a593Smuzhiyun label = "device tree"; 109*4882a593Smuzhiyun reg = <0x180000 0x80000>; 110*4882a593Smuzhiyun }; 111*4882a593Smuzhiyun 112*4882a593Smuzhiyun kernel@200000 { 113*4882a593Smuzhiyun label = "kernel"; 114*4882a593Smuzhiyun reg = <0x200000 0x600000>; 115*4882a593Smuzhiyun }; 116*4882a593Smuzhiyun 117*4882a593Smuzhiyun rootfs@800000 { 118*4882a593Smuzhiyun label = "rootfs"; 119*4882a593Smuzhiyun reg = <0x800000 0x0f800000>; 120*4882a593Smuzhiyun }; 121*4882a593Smuzhiyun }; 122*4882a593Smuzhiyun }; 123*4882a593Smuzhiyun }; 124*4882a593Smuzhiyun }; 125*4882a593Smuzhiyun 126*4882a593Smuzhiyun apb { 127*4882a593Smuzhiyun tcb0: timer@fffa0000 { 128*4882a593Smuzhiyun timer@0 { 129*4882a593Smuzhiyun compatible = "atmel,tcb-timer"; 130*4882a593Smuzhiyun reg = <0>, <1>; 131*4882a593Smuzhiyun }; 132*4882a593Smuzhiyun 133*4882a593Smuzhiyun timer@2 { 134*4882a593Smuzhiyun compatible = "atmel,tcb-timer"; 135*4882a593Smuzhiyun reg = <2>; 136*4882a593Smuzhiyun }; 137*4882a593Smuzhiyun }; 138*4882a593Smuzhiyun 139*4882a593Smuzhiyun mmc0: mmc@fffa4000 { 140*4882a593Smuzhiyun pinctrl-0 = < 141*4882a593Smuzhiyun &pinctrl_board_mmc0 142*4882a593Smuzhiyun &pinctrl_mmc0_clk 143*4882a593Smuzhiyun &pinctrl_mmc0_slot0_cmd_dat0 144*4882a593Smuzhiyun &pinctrl_mmc0_slot0_dat1_3>; 145*4882a593Smuzhiyun status = "okay"; 146*4882a593Smuzhiyun slot@0 { 147*4882a593Smuzhiyun reg = <0>; 148*4882a593Smuzhiyun bus-width = <4>; 149*4882a593Smuzhiyun cd-gpios = <&pioA 15 GPIO_ACTIVE_HIGH>; 150*4882a593Smuzhiyun }; 151*4882a593Smuzhiyun }; 152*4882a593Smuzhiyun 153*4882a593Smuzhiyun usart0: serial@fffb0000 { 154*4882a593Smuzhiyun pinctrl-0 = < 155*4882a593Smuzhiyun &pinctrl_usart0 156*4882a593Smuzhiyun &pinctrl_usart0_rts 157*4882a593Smuzhiyun &pinctrl_usart0_cts>; 158*4882a593Smuzhiyun status = "okay"; 159*4882a593Smuzhiyun }; 160*4882a593Smuzhiyun 161*4882a593Smuzhiyun adc0: adc@fffd0000 { 162*4882a593Smuzhiyun pinctrl-names = "default"; 163*4882a593Smuzhiyun pinctrl-0 = < 164*4882a593Smuzhiyun &pinctrl_adc0_ad0 165*4882a593Smuzhiyun &pinctrl_adc0_ad1 166*4882a593Smuzhiyun &pinctrl_adc0_ad2 167*4882a593Smuzhiyun &pinctrl_adc0_ad3 168*4882a593Smuzhiyun &pinctrl_adc0_ad4 169*4882a593Smuzhiyun &pinctrl_adc0_ad5 170*4882a593Smuzhiyun &pinctrl_adc0_adtrg>; 171*4882a593Smuzhiyun atmel,adc-ts-wires = <4>; 172*4882a593Smuzhiyun status = "okay"; 173*4882a593Smuzhiyun }; 174*4882a593Smuzhiyun 175*4882a593Smuzhiyun usb0: gadget@fffd4000 { 176*4882a593Smuzhiyun atmel,vbus-gpio = <&pioA 8 GPIO_ACTIVE_HIGH>; 177*4882a593Smuzhiyun status = "okay"; 178*4882a593Smuzhiyun }; 179*4882a593Smuzhiyun 180*4882a593Smuzhiyun spi0: spi@fffcc000 { 181*4882a593Smuzhiyun status = "okay"; 182*4882a593Smuzhiyun cs-gpios = <&pioA 28 0>, <0>, <0>, <0>; 183*4882a593Smuzhiyun mtd_dataflash@0 { 184*4882a593Smuzhiyun compatible = "atmel,at45", "atmel,dataflash"; 185*4882a593Smuzhiyun spi-max-frequency = <15000000>; 186*4882a593Smuzhiyun reg = <0>; 187*4882a593Smuzhiyun }; 188*4882a593Smuzhiyun }; 189*4882a593Smuzhiyun 190*4882a593Smuzhiyun pwm0: pwm@fffc8000 { 191*4882a593Smuzhiyun status = "okay"; 192*4882a593Smuzhiyun 193*4882a593Smuzhiyun pinctrl-names = "default"; 194*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_pwm0_pwm1_2>, 195*4882a593Smuzhiyun <&pinctrl_pwm0_pwm2_2>; 196*4882a593Smuzhiyun }; 197*4882a593Smuzhiyun 198*4882a593Smuzhiyun dbgu: serial@fffff200 { 199*4882a593Smuzhiyun status = "okay"; 200*4882a593Smuzhiyun }; 201*4882a593Smuzhiyun 202*4882a593Smuzhiyun pinctrl@fffff400 { 203*4882a593Smuzhiyun mmc0 { 204*4882a593Smuzhiyun pinctrl_board_mmc0: mmc0-board { 205*4882a593Smuzhiyun atmel,pins = 206*4882a593Smuzhiyun <AT91_PIOA 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; 207*4882a593Smuzhiyun }; 208*4882a593Smuzhiyun }; 209*4882a593Smuzhiyun }; 210*4882a593Smuzhiyun 211*4882a593Smuzhiyun watchdog@fffffd40 { 212*4882a593Smuzhiyun status = "okay"; 213*4882a593Smuzhiyun }; 214*4882a593Smuzhiyun 215*4882a593Smuzhiyun rtc@fffffe00 { 216*4882a593Smuzhiyun status = "okay"; 217*4882a593Smuzhiyun }; 218*4882a593Smuzhiyun }; 219*4882a593Smuzhiyun }; 220*4882a593Smuzhiyun 221*4882a593Smuzhiyun pwmleds { 222*4882a593Smuzhiyun compatible = "pwm-leds"; 223*4882a593Smuzhiyun 224*4882a593Smuzhiyun ds1 { 225*4882a593Smuzhiyun label = "ds1"; 226*4882a593Smuzhiyun pwms = <&pwm0 1 5000 PWM_POLARITY_INVERTED>; 227*4882a593Smuzhiyun max-brightness = <255>; 228*4882a593Smuzhiyun }; 229*4882a593Smuzhiyun 230*4882a593Smuzhiyun ds2 { 231*4882a593Smuzhiyun label = "ds2"; 232*4882a593Smuzhiyun pwms = <&pwm0 2 5000 PWM_POLARITY_INVERTED>; 233*4882a593Smuzhiyun max-brightness = <255>; 234*4882a593Smuzhiyun }; 235*4882a593Smuzhiyun }; 236*4882a593Smuzhiyun 237*4882a593Smuzhiyun leds { 238*4882a593Smuzhiyun compatible = "gpio-leds"; 239*4882a593Smuzhiyun 240*4882a593Smuzhiyun ds3 { 241*4882a593Smuzhiyun label = "ds3"; 242*4882a593Smuzhiyun gpios = <&pioD 14 GPIO_ACTIVE_HIGH>; 243*4882a593Smuzhiyun linux,default-trigger = "heartbeat"; 244*4882a593Smuzhiyun }; 245*4882a593Smuzhiyun }; 246*4882a593Smuzhiyun 247*4882a593Smuzhiyun gpio_keys { 248*4882a593Smuzhiyun compatible = "gpio-keys"; 249*4882a593Smuzhiyun 250*4882a593Smuzhiyun right_click { 251*4882a593Smuzhiyun label = "right_click"; 252*4882a593Smuzhiyun gpios = <&pioB 0 GPIO_ACTIVE_LOW>; 253*4882a593Smuzhiyun linux,code = <273>; 254*4882a593Smuzhiyun wakeup-source; 255*4882a593Smuzhiyun }; 256*4882a593Smuzhiyun 257*4882a593Smuzhiyun left_click { 258*4882a593Smuzhiyun label = "left_click"; 259*4882a593Smuzhiyun gpios = <&pioB 1 GPIO_ACTIVE_LOW>; 260*4882a593Smuzhiyun linux,code = <272>; 261*4882a593Smuzhiyun wakeup-source; 262*4882a593Smuzhiyun }; 263*4882a593Smuzhiyun }; 264*4882a593Smuzhiyun 265*4882a593Smuzhiyun i2c-gpio-0 { 266*4882a593Smuzhiyun status = "okay"; 267*4882a593Smuzhiyun }; 268*4882a593Smuzhiyun 269*4882a593Smuzhiyun i2c-gpio-1 { 270*4882a593Smuzhiyun status = "okay"; 271*4882a593Smuzhiyun }; 272*4882a593Smuzhiyun}; 273