1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-or-later 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * at91sam9g25ek.dts - Device Tree file for AT91SAM9G25-EK board 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2012 Atmel, 6*4882a593Smuzhiyun * 2012 Nicolas Ferre <nicolas.ferre@atmel.com> 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun/dts-v1/; 9*4882a593Smuzhiyun#include "at91sam9g25.dtsi" 10*4882a593Smuzhiyun#include "at91sam9x5ek.dtsi" 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun/ { 13*4882a593Smuzhiyun model = "Atmel AT91SAM9G25-EK"; 14*4882a593Smuzhiyun compatible = "atmel,at91sam9g25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9"; 15*4882a593Smuzhiyun}; 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun&i2c0 { 18*4882a593Smuzhiyun camera@30 { 19*4882a593Smuzhiyun compatible = "ovti,ov2640"; 20*4882a593Smuzhiyun reg = <0x30>; 21*4882a593Smuzhiyun pinctrl-names = "default"; 22*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_pck0_as_isi_mck &pinctrl_sensor_power &pinctrl_sensor_reset>; 23*4882a593Smuzhiyun resetb-gpios = <&pioA 7 GPIO_ACTIVE_LOW>; 24*4882a593Smuzhiyun pwdn-gpios = <&pioA 13 GPIO_ACTIVE_HIGH>; 25*4882a593Smuzhiyun clocks = <&pmc PMC_TYPE_SYSTEM 8>; 26*4882a593Smuzhiyun clock-names = "xvclk"; 27*4882a593Smuzhiyun assigned-clocks = <&pmc PMC_TYPE_SYSTEM 8>; 28*4882a593Smuzhiyun assigned-clock-rates = <25000000>; 29*4882a593Smuzhiyun status = "okay"; 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun port { 32*4882a593Smuzhiyun ov2640_0: endpoint { 33*4882a593Smuzhiyun remote-endpoint = <&isi_0>; 34*4882a593Smuzhiyun bus-width = <8>; 35*4882a593Smuzhiyun }; 36*4882a593Smuzhiyun }; 37*4882a593Smuzhiyun }; 38*4882a593Smuzhiyun}; 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun&isi { 41*4882a593Smuzhiyun status = "okay"; 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun port { 44*4882a593Smuzhiyun isi_0: endpoint@0 { 45*4882a593Smuzhiyun reg = <0>; 46*4882a593Smuzhiyun remote-endpoint = <&ov2640_0>; 47*4882a593Smuzhiyun bus-width = <8>; 48*4882a593Smuzhiyun vsync-active = <1>; 49*4882a593Smuzhiyun hsync-active = <1>; 50*4882a593Smuzhiyun }; 51*4882a593Smuzhiyun }; 52*4882a593Smuzhiyun}; 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun&macb0 { 55*4882a593Smuzhiyun phy-mode = "rmii"; 56*4882a593Smuzhiyun status = "okay"; 57*4882a593Smuzhiyun}; 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun&mmc1 { 60*4882a593Smuzhiyun status = "disabled"; 61*4882a593Smuzhiyun}; 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun&spi0 { 64*4882a593Smuzhiyun status = "disabled"; 65*4882a593Smuzhiyun}; 66