xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/at91sam9263ek.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * at91sam9263ek.dts - Device Tree file for Atmel at91sam9263 reference board
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun *  Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun/dts-v1/;
8*4882a593Smuzhiyun#include "at91sam9263.dtsi"
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun/ {
11*4882a593Smuzhiyun	model = "Atmel at91sam9263ek";
12*4882a593Smuzhiyun	compatible = "atmel,at91sam9263ek", "atmel,at91sam9263", "atmel,at91sam9";
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun	chosen {
15*4882a593Smuzhiyun		bootargs = "mem=64M root=/dev/mtdblock5 rw rootfstype=ubifs";
16*4882a593Smuzhiyun		stdout-path = "serial0:115200n8";
17*4882a593Smuzhiyun	};
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun	memory@20000000 {
20*4882a593Smuzhiyun		reg = <0x20000000 0x4000000>;
21*4882a593Smuzhiyun	};
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun	clocks {
24*4882a593Smuzhiyun		slow_xtal {
25*4882a593Smuzhiyun			clock-frequency = <32768>;
26*4882a593Smuzhiyun		};
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun		main_xtal {
29*4882a593Smuzhiyun			clock-frequency = <16367660>;
30*4882a593Smuzhiyun		};
31*4882a593Smuzhiyun	};
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun	ahb {
34*4882a593Smuzhiyun		apb {
35*4882a593Smuzhiyun			dbgu: serial@ffffee00 {
36*4882a593Smuzhiyun				status = "okay";
37*4882a593Smuzhiyun			};
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun			tcb0: timer@fff7c000 {
40*4882a593Smuzhiyun				timer@0 {
41*4882a593Smuzhiyun					compatible = "atmel,tcb-timer";
42*4882a593Smuzhiyun					reg = <0>, <1>;
43*4882a593Smuzhiyun				};
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun				timer@2 {
46*4882a593Smuzhiyun					compatible = "atmel,tcb-timer";
47*4882a593Smuzhiyun					reg = <2>;
48*4882a593Smuzhiyun				};
49*4882a593Smuzhiyun			};
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun			usart0: serial@fff8c000 {
52*4882a593Smuzhiyun				pinctrl-0 = <
53*4882a593Smuzhiyun					&pinctrl_usart0
54*4882a593Smuzhiyun					&pinctrl_usart0_rts
55*4882a593Smuzhiyun					&pinctrl_usart0_cts>;
56*4882a593Smuzhiyun				status = "okay";
57*4882a593Smuzhiyun			};
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun			macb0: ethernet@fffbc000 {
60*4882a593Smuzhiyun				phy-mode = "rmii";
61*4882a593Smuzhiyun				status = "okay";
62*4882a593Smuzhiyun			};
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun			usb1: gadget@fff78000 {
65*4882a593Smuzhiyun				atmel,vbus-gpio = <&pioA 25 GPIO_ACTIVE_HIGH>;
66*4882a593Smuzhiyun				status = "okay";
67*4882a593Smuzhiyun			};
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun			mmc0: mmc@fff80000 {
70*4882a593Smuzhiyun				pinctrl-0 = <
71*4882a593Smuzhiyun					&pinctrl_board_mmc0
72*4882a593Smuzhiyun					&pinctrl_mmc0_clk
73*4882a593Smuzhiyun					&pinctrl_mmc0_slot0_cmd_dat0
74*4882a593Smuzhiyun					&pinctrl_mmc0_slot0_dat1_3>;
75*4882a593Smuzhiyun				pinctrl-names = "default";
76*4882a593Smuzhiyun				status = "okay";
77*4882a593Smuzhiyun				slot@0 {
78*4882a593Smuzhiyun					reg = <0>;
79*4882a593Smuzhiyun					bus-width = <4>;
80*4882a593Smuzhiyun					cd-gpios = <&pioE 18 GPIO_ACTIVE_HIGH>;
81*4882a593Smuzhiyun					wp-gpios = <&pioE 19 GPIO_ACTIVE_HIGH>;
82*4882a593Smuzhiyun				};
83*4882a593Smuzhiyun			};
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun			pinctrl@fffff200 {
86*4882a593Smuzhiyun				mmc0 {
87*4882a593Smuzhiyun					pinctrl_board_mmc0: mmc0-board {
88*4882a593Smuzhiyun						atmel,pins =
89*4882a593Smuzhiyun							<AT91_PIOE 18 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH 	/* PE18 gpio CD pin pull up and deglitch */
90*4882a593Smuzhiyun							 AT91_PIOE 19 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;	/* PE19 gpio WP pin pull up */
91*4882a593Smuzhiyun					};
92*4882a593Smuzhiyun				};
93*4882a593Smuzhiyun			};
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun			spi0: spi@fffa4000 {
96*4882a593Smuzhiyun				status = "okay";
97*4882a593Smuzhiyun				cs-gpios = <&pioA 5 0>, <0>, <0>, <0>;
98*4882a593Smuzhiyun				mtd_dataflash@0 {
99*4882a593Smuzhiyun					compatible = "atmel,at45", "atmel,dataflash";
100*4882a593Smuzhiyun					spi-max-frequency = <50000000>;
101*4882a593Smuzhiyun					reg = <0>;
102*4882a593Smuzhiyun				};
103*4882a593Smuzhiyun			};
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun			watchdog@fffffd40 {
106*4882a593Smuzhiyun				status = "okay";
107*4882a593Smuzhiyun			};
108*4882a593Smuzhiyun		};
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun		fb0: fb@700000 {
111*4882a593Smuzhiyun			display = <&display0>;
112*4882a593Smuzhiyun			status = "okay";
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun			display0: panel {
115*4882a593Smuzhiyun				bits-per-pixel = <16>;
116*4882a593Smuzhiyun				atmel,lcdcon-backlight;
117*4882a593Smuzhiyun				atmel,dmacon = <0x1>;
118*4882a593Smuzhiyun				atmel,lcdcon2 = <0x80008002>;
119*4882a593Smuzhiyun				atmel,guard-time = <1>;
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun				display-timings {
122*4882a593Smuzhiyun					native-mode = <&timing0>;
123*4882a593Smuzhiyun					timing0: timing0 {
124*4882a593Smuzhiyun						clock-frequency = <4965000>;
125*4882a593Smuzhiyun						hactive = <240>;
126*4882a593Smuzhiyun						vactive = <320>;
127*4882a593Smuzhiyun						hback-porch = <1>;
128*4882a593Smuzhiyun						hfront-porch = <33>;
129*4882a593Smuzhiyun						vback-porch = <1>;
130*4882a593Smuzhiyun						vfront-porch = <0>;
131*4882a593Smuzhiyun						hsync-len = <5>;
132*4882a593Smuzhiyun						vsync-len = <1>;
133*4882a593Smuzhiyun						hsync-active = <1>;
134*4882a593Smuzhiyun						vsync-active = <1>;
135*4882a593Smuzhiyun					};
136*4882a593Smuzhiyun				};
137*4882a593Smuzhiyun			};
138*4882a593Smuzhiyun		};
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun		ebi0: ebi@10000000 {
141*4882a593Smuzhiyun			status = "okay";
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun			nand_controller: nand-controller {
144*4882a593Smuzhiyun				status = "okay";
145*4882a593Smuzhiyun				pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb>;
146*4882a593Smuzhiyun				pinctrl-names = "default";
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun				nand@3 {
149*4882a593Smuzhiyun					reg = <0x3 0x0 0x800000>;
150*4882a593Smuzhiyun					rb-gpios = <&pioA 22 GPIO_ACTIVE_HIGH>;
151*4882a593Smuzhiyun					cs-gpios = <&pioA 15 GPIO_ACTIVE_HIGH>;
152*4882a593Smuzhiyun					nand-bus-width = <8>;
153*4882a593Smuzhiyun					nand-ecc-mode = "soft";
154*4882a593Smuzhiyun					nand-on-flash-bbt;
155*4882a593Smuzhiyun					label = "atmel_nand";
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun					partitions {
158*4882a593Smuzhiyun						compatible = "fixed-partitions";
159*4882a593Smuzhiyun						#address-cells = <1>;
160*4882a593Smuzhiyun						#size-cells = <1>;
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun						at91bootstrap@0 {
163*4882a593Smuzhiyun							label = "at91bootstrap";
164*4882a593Smuzhiyun							reg = <0x0 0x20000>;
165*4882a593Smuzhiyun						};
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun						barebox@20000 {
168*4882a593Smuzhiyun							label = "barebox";
169*4882a593Smuzhiyun							reg = <0x20000 0x40000>;
170*4882a593Smuzhiyun						};
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun						bareboxenv@60000 {
173*4882a593Smuzhiyun							label = "bareboxenv";
174*4882a593Smuzhiyun							reg = <0x60000 0x20000>;
175*4882a593Smuzhiyun						};
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun						bareboxenv2@80000 {
178*4882a593Smuzhiyun							label = "bareboxenv2";
179*4882a593Smuzhiyun							reg = <0x80000 0x20000>;
180*4882a593Smuzhiyun						};
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun						oftree@80000 {
183*4882a593Smuzhiyun							label = "oftree";
184*4882a593Smuzhiyun							reg = <0xa0000 0x20000>;
185*4882a593Smuzhiyun						};
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun						kernel@a0000 {
188*4882a593Smuzhiyun							label = "kernel";
189*4882a593Smuzhiyun							reg = <0xc0000 0x400000>;
190*4882a593Smuzhiyun						};
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun						rootfs@4a0000 {
193*4882a593Smuzhiyun							label = "rootfs";
194*4882a593Smuzhiyun							reg = <0x4c0000 0x7800000>;
195*4882a593Smuzhiyun						};
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun						data@7ca0000 {
198*4882a593Smuzhiyun							label = "data";
199*4882a593Smuzhiyun							reg = <0x7cc0000 0x8340000>;
200*4882a593Smuzhiyun						};
201*4882a593Smuzhiyun					};
202*4882a593Smuzhiyun				};
203*4882a593Smuzhiyun			};
204*4882a593Smuzhiyun		};
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun		usb0: ohci@a00000 {
207*4882a593Smuzhiyun			num-ports = <2>;
208*4882a593Smuzhiyun			status = "okay";
209*4882a593Smuzhiyun			atmel,vbus-gpio = <&pioA 24 GPIO_ACTIVE_HIGH
210*4882a593Smuzhiyun					   &pioA 21 GPIO_ACTIVE_HIGH
211*4882a593Smuzhiyun					  >;
212*4882a593Smuzhiyun		};
213*4882a593Smuzhiyun	};
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun	leds {
216*4882a593Smuzhiyun		compatible = "gpio-leds";
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun		d3 {
219*4882a593Smuzhiyun			label = "d3";
220*4882a593Smuzhiyun			gpios = <&pioB 7 GPIO_ACTIVE_HIGH>;
221*4882a593Smuzhiyun			linux,default-trigger = "heartbeat";
222*4882a593Smuzhiyun		};
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun		d2 {
225*4882a593Smuzhiyun			label = "d2";
226*4882a593Smuzhiyun			gpios = <&pioC 29 GPIO_ACTIVE_LOW>;
227*4882a593Smuzhiyun			linux,default-trigger = "nand-disk";
228*4882a593Smuzhiyun		};
229*4882a593Smuzhiyun	};
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun	gpio_keys {
232*4882a593Smuzhiyun		compatible = "gpio-keys";
233*4882a593Smuzhiyun
234*4882a593Smuzhiyun		left_click {
235*4882a593Smuzhiyun			label = "left_click";
236*4882a593Smuzhiyun			gpios = <&pioC 5 GPIO_ACTIVE_LOW>;
237*4882a593Smuzhiyun			linux,code = <272>;
238*4882a593Smuzhiyun			wakeup-source;
239*4882a593Smuzhiyun		};
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun		right_click {
242*4882a593Smuzhiyun			label = "right_click";
243*4882a593Smuzhiyun			gpios = <&pioC 4 GPIO_ACTIVE_LOW>;
244*4882a593Smuzhiyun			linux,code = <273>;
245*4882a593Smuzhiyun			wakeup-source;
246*4882a593Smuzhiyun		};
247*4882a593Smuzhiyun	};
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun	i2c-gpio-0 {
250*4882a593Smuzhiyun		status = "okay";
251*4882a593Smuzhiyun
252*4882a593Smuzhiyun		24c512@50 {
253*4882a593Smuzhiyun			compatible = "atmel,24c512";
254*4882a593Smuzhiyun			reg = <0x50>;
255*4882a593Smuzhiyun			pagesize = <128>;
256*4882a593Smuzhiyun		};
257*4882a593Smuzhiyun	};
258*4882a593Smuzhiyun};
259