1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * at91-wb50n.dts - Device Tree file for wb50n evaluation board 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2018 Laird 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun/dts-v1/; 10*4882a593Smuzhiyun#include "at91-wb50n.dtsi" 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun/ { 13*4882a593Smuzhiyun model = "Laird Workgroup Bridge 50N - Atmel SAMA5D"; 14*4882a593Smuzhiyun compatible = "laird,wb50n", "atmel,sama5d31", "atmel,sama5d3", "atmel,sama5"; 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun gpio_keys { 17*4882a593Smuzhiyun compatible = "gpio-keys"; 18*4882a593Smuzhiyun #address-cells = <1>; 19*4882a593Smuzhiyun #size-cells = <0>; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun btn0@10 { 22*4882a593Smuzhiyun reg = <10>; 23*4882a593Smuzhiyun label = "BTNESC"; 24*4882a593Smuzhiyun linux,code = <1>; /* ESC button */ 25*4882a593Smuzhiyun gpios = <&pioA 10 GPIO_ACTIVE_LOW>; 26*4882a593Smuzhiyun wakeup-source; 27*4882a593Smuzhiyun }; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun irqbtn@31 { 30*4882a593Smuzhiyun reg = <31>; 31*4882a593Smuzhiyun label = "IRQBTN"; 32*4882a593Smuzhiyun linux,code = <99>; /* SysReq button */ 33*4882a593Smuzhiyun gpios = <&pioE 31 GPIO_ACTIVE_LOW>; 34*4882a593Smuzhiyun wakeup-source; 35*4882a593Smuzhiyun }; 36*4882a593Smuzhiyun }; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun leds { 39*4882a593Smuzhiyun compatible = "gpio-leds"; 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun led0 { 42*4882a593Smuzhiyun label = "wb50n:blue:led0"; 43*4882a593Smuzhiyun gpios = <&pioA 12 GPIO_ACTIVE_LOW>; 44*4882a593Smuzhiyun default-state = "off"; 45*4882a593Smuzhiyun }; 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun led1 { 48*4882a593Smuzhiyun label = "wb50n:green:led1"; 49*4882a593Smuzhiyun gpios = <&pioA 24 GPIO_ACTIVE_LOW>; 50*4882a593Smuzhiyun default-state = "off"; 51*4882a593Smuzhiyun }; 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun led2 { 54*4882a593Smuzhiyun label = "wb50n:red:led2"; 55*4882a593Smuzhiyun gpios = <&pioA 26 GPIO_ACTIVE_LOW>; 56*4882a593Smuzhiyun default-state = "off"; 57*4882a593Smuzhiyun }; 58*4882a593Smuzhiyun }; 59*4882a593Smuzhiyun}; 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun&watchdog { 62*4882a593Smuzhiyun status = "okay"; 63*4882a593Smuzhiyun}; 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun&mmc0 { 66*4882a593Smuzhiyun status = "okay"; 67*4882a593Smuzhiyun}; 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun&macb1 { 70*4882a593Smuzhiyun status = "okay"; 71*4882a593Smuzhiyun}; 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun&dbgu { 74*4882a593Smuzhiyun status = "okay"; 75*4882a593Smuzhiyun}; 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun/* On BB40 this port is labeled UART1 */ 78*4882a593Smuzhiyun&usart0 { 79*4882a593Smuzhiyun status = "okay"; 80*4882a593Smuzhiyun}; 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun/* On BB40 this port is labeled UART0 */ 83*4882a593Smuzhiyun&usart1 { 84*4882a593Smuzhiyun status = "okay"; 85*4882a593Smuzhiyun}; 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun&i2c0 { 88*4882a593Smuzhiyun status = "okay"; 89*4882a593Smuzhiyun}; 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun&spi1 { 92*4882a593Smuzhiyun status = "okay"; 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun spidev@0 { 95*4882a593Smuzhiyun compatible = "spidev"; 96*4882a593Smuzhiyun reg = <0>; 97*4882a593Smuzhiyun spi-max-frequency = <8000000>; 98*4882a593Smuzhiyun }; 99*4882a593Smuzhiyun}; 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun&usb0 { 102*4882a593Smuzhiyun status = "okay"; 103*4882a593Smuzhiyun}; 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun&usb1 { 106*4882a593Smuzhiyun status = "okay"; 107*4882a593Smuzhiyun}; 108*4882a593Smuzhiyun 109*4882a593Smuzhiyun&usb2 { 110*4882a593Smuzhiyun status = "okay"; 111*4882a593Smuzhiyun}; 112*4882a593Smuzhiyun 113