1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-or-later 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * at91-tse850-3.dts - Device Tree file for the Axentia TSE-850 3.0 board 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2017 Axentia Technologies AB 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * Author: Peter Rosin <peda@axentia.se> 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun/dts-v1/; 10*4882a593Smuzhiyun#include <dt-bindings/pwm/pwm.h> 11*4882a593Smuzhiyun#include "at91-linea.dtsi" 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun/ { 14*4882a593Smuzhiyun model = "Axentia TSE-850 3.0"; 15*4882a593Smuzhiyun compatible = "axentia,tse850v3", "axentia,linea", 16*4882a593Smuzhiyun "atmel,sama5d31", "atmel,sama5d3", "atmel,sama5"; 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun sck: oscillator { 19*4882a593Smuzhiyun compatible = "fixed-clock"; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun #clock-cells = <0>; 22*4882a593Smuzhiyun clock-frequency = <16000000>; 23*4882a593Smuzhiyun clock-output-names = "sck"; 24*4882a593Smuzhiyun }; 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun reg_3v3: regulator { 27*4882a593Smuzhiyun compatible = "regulator-fixed"; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun regulator-name = "3v3-supply"; 30*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 31*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 32*4882a593Smuzhiyun }; 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun ana: reg-ana { 35*4882a593Smuzhiyun compatible = "pwm-regulator"; 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun regulator-name = "ANA"; 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun pwms = <&pwm0 2 1000 PWM_POLARITY_INVERTED>; 40*4882a593Smuzhiyun pwm-dutycycle-unit = <1000>; 41*4882a593Smuzhiyun pwm-dutycycle-range = <100 1000>; 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun regulator-min-microvolt = <2000000>; 44*4882a593Smuzhiyun regulator-max-microvolt = <20000000>; 45*4882a593Smuzhiyun regulator-ramp-delay = <1000>; 46*4882a593Smuzhiyun }; 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun sound { 49*4882a593Smuzhiyun compatible = "axentia,tse850-pcm5142"; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun axentia,cpu-dai = <&ssc0>; 52*4882a593Smuzhiyun axentia,audio-codec = <&pcm5142>; 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun axentia,add-gpios = <&pioA 8 GPIO_ACTIVE_LOW>; 55*4882a593Smuzhiyun axentia,loop1-gpios = <&pioA 10 GPIO_ACTIVE_LOW>; 56*4882a593Smuzhiyun axentia,loop2-gpios = <&pioA 11 GPIO_ACTIVE_LOW>; 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun axentia,ana-supply = <&ana>; 59*4882a593Smuzhiyun }; 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun dac: dpot-dac { 62*4882a593Smuzhiyun compatible = "dpot-dac"; 63*4882a593Smuzhiyun vref-supply = <®_3v3>; 64*4882a593Smuzhiyun io-channels = <&dpot 0>; 65*4882a593Smuzhiyun io-channel-names = "dpot"; 66*4882a593Smuzhiyun #io-channel-cells = <1>; 67*4882a593Smuzhiyun }; 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun env_det: envelope-detector { 70*4882a593Smuzhiyun compatible = "axentia,tse850-envelope-detector"; 71*4882a593Smuzhiyun io-channels = <&dac 0>; 72*4882a593Smuzhiyun io-channel-names = "dac"; 73*4882a593Smuzhiyun #io-channel-cells = <1>; 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun interrupt-parent = <&pioA>; 76*4882a593Smuzhiyun interrupts = <3 IRQ_TYPE_EDGE_RISING>; 77*4882a593Smuzhiyun interrupt-names = "comp"; 78*4882a593Smuzhiyun }; 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun mux: mux-controller { 81*4882a593Smuzhiyun compatible = "gpio-mux"; 82*4882a593Smuzhiyun #mux-control-cells = <0>; 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun mux-gpios = <&pioA 0 GPIO_ACTIVE_HIGH>, 85*4882a593Smuzhiyun <&pioA 1 GPIO_ACTIVE_HIGH>, 86*4882a593Smuzhiyun <&pioA 2 GPIO_ACTIVE_HIGH>; 87*4882a593Smuzhiyun idle-state = <0>; 88*4882a593Smuzhiyun }; 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun envelope-detector-mux { 91*4882a593Smuzhiyun compatible = "io-channel-mux"; 92*4882a593Smuzhiyun io-channels = <&env_det 0>; 93*4882a593Smuzhiyun io-channel-names = "parent"; 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun mux-controls = <&mux>; 96*4882a593Smuzhiyun 97*4882a593Smuzhiyun channels = "", "", 98*4882a593Smuzhiyun "sync-1", 99*4882a593Smuzhiyun "in", 100*4882a593Smuzhiyun "out", 101*4882a593Smuzhiyun "sync-2", 102*4882a593Smuzhiyun "sys-reg", 103*4882a593Smuzhiyun "ana-reg"; 104*4882a593Smuzhiyun }; 105*4882a593Smuzhiyun 106*4882a593Smuzhiyun leds { 107*4882a593Smuzhiyun compatible = "gpio-leds"; 108*4882a593Smuzhiyun 109*4882a593Smuzhiyun ch1-red { 110*4882a593Smuzhiyun label = "ch-1:red"; 111*4882a593Smuzhiyun gpios = <&pioA 23 GPIO_ACTIVE_LOW>; 112*4882a593Smuzhiyun }; 113*4882a593Smuzhiyun ch1-green { 114*4882a593Smuzhiyun label = "ch-1:green"; 115*4882a593Smuzhiyun gpios = <&pioA 22 GPIO_ACTIVE_LOW>; 116*4882a593Smuzhiyun }; 117*4882a593Smuzhiyun ch2-red { 118*4882a593Smuzhiyun label = "ch-2:red"; 119*4882a593Smuzhiyun gpios = <&pioA 21 GPIO_ACTIVE_LOW>; 120*4882a593Smuzhiyun }; 121*4882a593Smuzhiyun ch2-green { 122*4882a593Smuzhiyun label = "ch-2:green"; 123*4882a593Smuzhiyun gpios = <&pioA 20 GPIO_ACTIVE_LOW>; 124*4882a593Smuzhiyun }; 125*4882a593Smuzhiyun data-red { 126*4882a593Smuzhiyun label = "data:red"; 127*4882a593Smuzhiyun gpios = <&pioA 19 GPIO_ACTIVE_LOW>; 128*4882a593Smuzhiyun }; 129*4882a593Smuzhiyun data-green { 130*4882a593Smuzhiyun label = "data:green"; 131*4882a593Smuzhiyun gpios = <&pioA 18 GPIO_ACTIVE_LOW>; 132*4882a593Smuzhiyun }; 133*4882a593Smuzhiyun alarm-red { 134*4882a593Smuzhiyun label = "alarm:red"; 135*4882a593Smuzhiyun gpios = <&pioA 17 GPIO_ACTIVE_LOW>; 136*4882a593Smuzhiyun }; 137*4882a593Smuzhiyun alarm-green { 138*4882a593Smuzhiyun label = "alarm:green"; 139*4882a593Smuzhiyun gpios = <&pioA 16 GPIO_ACTIVE_LOW>; 140*4882a593Smuzhiyun }; 141*4882a593Smuzhiyun }; 142*4882a593Smuzhiyun}; 143*4882a593Smuzhiyun 144*4882a593Smuzhiyun&nand { 145*4882a593Smuzhiyun partitions { 146*4882a593Smuzhiyun compatible = "fixed-partitions"; 147*4882a593Smuzhiyun #address-cells = <1>; 148*4882a593Smuzhiyun #size-cells = <1>; 149*4882a593Smuzhiyun 150*4882a593Smuzhiyun at91bootstrap@0 { 151*4882a593Smuzhiyun label = "at91bootstrap"; 152*4882a593Smuzhiyun reg = <0x0 0x40000>; 153*4882a593Smuzhiyun }; 154*4882a593Smuzhiyun 155*4882a593Smuzhiyun barebox@40000 { 156*4882a593Smuzhiyun label = "bootloader"; 157*4882a593Smuzhiyun reg = <0x40000 0x60000>; 158*4882a593Smuzhiyun }; 159*4882a593Smuzhiyun 160*4882a593Smuzhiyun bareboxenv@c0000 { 161*4882a593Smuzhiyun label = "bareboxenv"; 162*4882a593Smuzhiyun reg = <0xc0000 0x40000>; 163*4882a593Smuzhiyun }; 164*4882a593Smuzhiyun 165*4882a593Smuzhiyun bareboxenv2@100000 { 166*4882a593Smuzhiyun label = "bareboxenv2"; 167*4882a593Smuzhiyun reg = <0x100000 0x40000>; 168*4882a593Smuzhiyun }; 169*4882a593Smuzhiyun 170*4882a593Smuzhiyun oftree@180000 { 171*4882a593Smuzhiyun label = "oftree"; 172*4882a593Smuzhiyun reg = <0x180000 0x20000>; 173*4882a593Smuzhiyun }; 174*4882a593Smuzhiyun 175*4882a593Smuzhiyun kernel@200000 { 176*4882a593Smuzhiyun label = "kernel"; 177*4882a593Smuzhiyun reg = <0x200000 0x500000>; 178*4882a593Smuzhiyun }; 179*4882a593Smuzhiyun 180*4882a593Smuzhiyun rootfs@800000 { 181*4882a593Smuzhiyun label = "rootfs"; 182*4882a593Smuzhiyun reg = <0x800000 0x0f800000>; 183*4882a593Smuzhiyun }; 184*4882a593Smuzhiyun 185*4882a593Smuzhiyun ovlfs@10000000 { 186*4882a593Smuzhiyun label = "ovlfs"; 187*4882a593Smuzhiyun reg = <0x10000000 0x10000000>; 188*4882a593Smuzhiyun }; 189*4882a593Smuzhiyun }; 190*4882a593Smuzhiyun}; 191*4882a593Smuzhiyun 192*4882a593Smuzhiyun&ssc0 { 193*4882a593Smuzhiyun #sound-dai-cells = <0>; 194*4882a593Smuzhiyun 195*4882a593Smuzhiyun status = "okay"; 196*4882a593Smuzhiyun}; 197*4882a593Smuzhiyun 198*4882a593Smuzhiyun&i2c0 { 199*4882a593Smuzhiyun status = "okay"; 200*4882a593Smuzhiyun 201*4882a593Smuzhiyun jc42@18 { 202*4882a593Smuzhiyun compatible = "nxp,se97b", "jedec,jc-42.4-temp"; 203*4882a593Smuzhiyun reg = <0x18>; 204*4882a593Smuzhiyun smbus-timeout-disable; 205*4882a593Smuzhiyun }; 206*4882a593Smuzhiyun 207*4882a593Smuzhiyun dpot: mcp4651-104@28 { 208*4882a593Smuzhiyun compatible = "microchip,mcp4651-104"; 209*4882a593Smuzhiyun reg = <0x28>; 210*4882a593Smuzhiyun #io-channel-cells = <1>; 211*4882a593Smuzhiyun }; 212*4882a593Smuzhiyun 213*4882a593Smuzhiyun pcm5142: pcm5142@4c { 214*4882a593Smuzhiyun compatible = "ti,pcm5142"; 215*4882a593Smuzhiyun 216*4882a593Smuzhiyun reg = <0x4c>; 217*4882a593Smuzhiyun #sound-dai-cells = <0>; 218*4882a593Smuzhiyun 219*4882a593Smuzhiyun AVDD-supply = <®_3v3>; 220*4882a593Smuzhiyun DVDD-supply = <®_3v3>; 221*4882a593Smuzhiyun CPVDD-supply = <®_3v3>; 222*4882a593Smuzhiyun 223*4882a593Smuzhiyun clocks = <&sck>; 224*4882a593Smuzhiyun 225*4882a593Smuzhiyun pll-in = <3>; 226*4882a593Smuzhiyun pll-out = <6>; 227*4882a593Smuzhiyun }; 228*4882a593Smuzhiyun 229*4882a593Smuzhiyun eeprom@50 { 230*4882a593Smuzhiyun compatible = "nxp,se97b", "atmel,24c02"; 231*4882a593Smuzhiyun reg = <0x50>; 232*4882a593Smuzhiyun pagesize = <16>; 233*4882a593Smuzhiyun }; 234*4882a593Smuzhiyun}; 235*4882a593Smuzhiyun 236*4882a593Smuzhiyun&pinctrl { 237*4882a593Smuzhiyun tse850 { 238*4882a593Smuzhiyun pinctrl_usba_vbus: usba-vbus { 239*4882a593Smuzhiyun atmel,pins = <AT91_PIOC 31 AT91_PERIPH_GPIO 240*4882a593Smuzhiyun AT91_PINCTRL_DEGLITCH>; 241*4882a593Smuzhiyun }; 242*4882a593Smuzhiyun }; 243*4882a593Smuzhiyun}; 244*4882a593Smuzhiyun 245*4882a593Smuzhiyun&watchdog { 246*4882a593Smuzhiyun status = "okay"; 247*4882a593Smuzhiyun}; 248*4882a593Smuzhiyun 249*4882a593Smuzhiyun&usart0 { 250*4882a593Smuzhiyun status = "okay"; 251*4882a593Smuzhiyun 252*4882a593Smuzhiyun atmel,use-dma-rx; 253*4882a593Smuzhiyun}; 254*4882a593Smuzhiyun 255*4882a593Smuzhiyun&pwm0 { 256*4882a593Smuzhiyun status = "okay"; 257*4882a593Smuzhiyun 258*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_pwm0_pwml2_1>; 259*4882a593Smuzhiyun pinctrl-names = "default"; 260*4882a593Smuzhiyun}; 261*4882a593Smuzhiyun 262*4882a593Smuzhiyun&macb1 { 263*4882a593Smuzhiyun status = "okay"; 264*4882a593Smuzhiyun 265*4882a593Smuzhiyun phy-mode = "rmii"; 266*4882a593Smuzhiyun 267*4882a593Smuzhiyun #address-cells = <1>; 268*4882a593Smuzhiyun #size-cells = <0>; 269*4882a593Smuzhiyun 270*4882a593Smuzhiyun phy0: ethernet-phy@3 { 271*4882a593Smuzhiyun reg = <3>; 272*4882a593Smuzhiyun 273*4882a593Smuzhiyun interrupt-parent = <&pioE>; 274*4882a593Smuzhiyun interrupts = <31 IRQ_TYPE_EDGE_FALLING>; 275*4882a593Smuzhiyun }; 276*4882a593Smuzhiyun}; 277*4882a593Smuzhiyun 278*4882a593Smuzhiyun&usb0 { 279*4882a593Smuzhiyun status = "okay"; 280*4882a593Smuzhiyun 281*4882a593Smuzhiyun pinctrl-names = "default"; 282*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_usba_vbus>; 283*4882a593Smuzhiyun atmel,vbus-gpio = <&pioC 31 GPIO_ACTIVE_HIGH>; 284*4882a593Smuzhiyun}; 285*4882a593Smuzhiyun 286*4882a593Smuzhiyun&usb1 { 287*4882a593Smuzhiyun status = "okay"; 288*4882a593Smuzhiyun 289*4882a593Smuzhiyun num-ports = <1>; 290*4882a593Smuzhiyun atmel,vbus-gpio = <&pioD 29 GPIO_ACTIVE_HIGH>; 291*4882a593Smuzhiyun atmel,oc-gpio = <&pioC 15 GPIO_ACTIVE_LOW>; 292*4882a593Smuzhiyun}; 293*4882a593Smuzhiyun 294*4882a593Smuzhiyun&usb2 { 295*4882a593Smuzhiyun status = "okay"; 296*4882a593Smuzhiyun}; 297*4882a593Smuzhiyun 298*4882a593Smuzhiyun&dbgu { 299*4882a593Smuzhiyun status = "okay"; 300*4882a593Smuzhiyun 301*4882a593Smuzhiyun dmas = <0>, <0>; /* Do not use DMA for dbgu */ 302*4882a593Smuzhiyun}; 303