xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/at91-sama5d4_ma5d4.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (C) 2015 Marek Vasut <marex@denx.de>
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun#include "sama5d4.dtsi"
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun/ {
9*4882a593Smuzhiyun	model = "Aries/DENX MA5D4";
10*4882a593Smuzhiyun	compatible = "aries,ma5d4", "denx,ma5d4", "atmel,sama5d4", "atmel,sama5";
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun	memory@20000000 {
13*4882a593Smuzhiyun		reg = <0x20000000 0x10000000>;
14*4882a593Smuzhiyun	};
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun	clocks {
17*4882a593Smuzhiyun		slow_xtal {
18*4882a593Smuzhiyun			clock-frequency = <32768>;
19*4882a593Smuzhiyun		};
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun		main_xtal {
22*4882a593Smuzhiyun			clock-frequency = <12000000>;
23*4882a593Smuzhiyun		};
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun		clk20m: clk20m {
26*4882a593Smuzhiyun			compatible = "fixed-clock";
27*4882a593Smuzhiyun			#clock-cells = <0>;
28*4882a593Smuzhiyun			clock-frequency = <20000000>;
29*4882a593Smuzhiyun			clock-output-names = "clk20m";
30*4882a593Smuzhiyun		};
31*4882a593Smuzhiyun	};
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun	ahb {
34*4882a593Smuzhiyun		apb {
35*4882a593Smuzhiyun			mmc0: mmc@f8000000 {
36*4882a593Smuzhiyun				pinctrl-names = "default";
37*4882a593Smuzhiyun				pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_dat4_7>;
38*4882a593Smuzhiyun				vmmc-supply = <&vcc_mmc0_reg>;
39*4882a593Smuzhiyun				vqmmc-supply = <&vcc_3v3_reg>;
40*4882a593Smuzhiyun				status = "okay";
41*4882a593Smuzhiyun				slot@0 {
42*4882a593Smuzhiyun					reg = <0>;
43*4882a593Smuzhiyun					bus-width = <8>;
44*4882a593Smuzhiyun					broken-cd;
45*4882a593Smuzhiyun				};
46*4882a593Smuzhiyun			};
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun			spi0: spi@f8010000 {
49*4882a593Smuzhiyun				cs-gpios = <&pioC 3 0>, <0>, <0>, <0>;
50*4882a593Smuzhiyun				status = "okay";
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun				m25p80@0 {
53*4882a593Smuzhiyun					compatible = "atmel,at25df321a";
54*4882a593Smuzhiyun					spi-max-frequency = <50000000>;
55*4882a593Smuzhiyun					reg = <0>;
56*4882a593Smuzhiyun				};
57*4882a593Smuzhiyun			};
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun			i2c0: i2c@f8014000 {
60*4882a593Smuzhiyun				status = "okay";
61*4882a593Smuzhiyun			};
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun			spi1: spi@fc018000 {
64*4882a593Smuzhiyun				cs-gpios = <&pioB 22 0>, <&pioB 23 0>, <0>, <0>;
65*4882a593Smuzhiyun				status = "okay";
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun				can0: can@0 {
68*4882a593Smuzhiyun					compatible = "microchip,mcp2515";
69*4882a593Smuzhiyun					reg = <0>;
70*4882a593Smuzhiyun					clocks = <&clk20m>;
71*4882a593Smuzhiyun					interrupt-parent = <&pioE>;
72*4882a593Smuzhiyun					interrupts = <6 IRQ_TYPE_EDGE_RISING>;
73*4882a593Smuzhiyun					spi-max-frequency = <10000000>;
74*4882a593Smuzhiyun				};
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun				can1: can@1 {
77*4882a593Smuzhiyun					compatible = "microchip,mcp2515";
78*4882a593Smuzhiyun					reg = <1>;
79*4882a593Smuzhiyun					clocks = <&clk20m>;
80*4882a593Smuzhiyun					interrupt-parent = <&pioE>;
81*4882a593Smuzhiyun					interrupts = <7 IRQ_TYPE_EDGE_RISING>;
82*4882a593Smuzhiyun					spi-max-frequency = <10000000>;
83*4882a593Smuzhiyun				};
84*4882a593Smuzhiyun			};
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun			tcb2: timer@fc024000 {
87*4882a593Smuzhiyun				timer@0 {
88*4882a593Smuzhiyun					compatible = "atmel,tcb-timer";
89*4882a593Smuzhiyun					reg = <0>;
90*4882a593Smuzhiyun				};
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun				timer@1 {
93*4882a593Smuzhiyun					compatible = "atmel,tcb-timer";
94*4882a593Smuzhiyun					reg = <1>;
95*4882a593Smuzhiyun				};
96*4882a593Smuzhiyun			};
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun			adc0: adc@fc034000 {
99*4882a593Smuzhiyun				pinctrl-names = "default";
100*4882a593Smuzhiyun				pinctrl-0 = <
101*4882a593Smuzhiyun					/* external trigger conflicts with USBA_VBUS */
102*4882a593Smuzhiyun					&pinctrl_adc0_ad0
103*4882a593Smuzhiyun					&pinctrl_adc0_ad1
104*4882a593Smuzhiyun					&pinctrl_adc0_ad2
105*4882a593Smuzhiyun					&pinctrl_adc0_ad3
106*4882a593Smuzhiyun					&pinctrl_adc0_ad4
107*4882a593Smuzhiyun					>;
108*4882a593Smuzhiyun				atmel,adc-vref = <3300>;
109*4882a593Smuzhiyun				status = "okay";
110*4882a593Smuzhiyun			};
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun			watchdog@fc068640 {
113*4882a593Smuzhiyun				status = "okay";
114*4882a593Smuzhiyun			};
115*4882a593Smuzhiyun		};
116*4882a593Smuzhiyun	};
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun	vcc_3v3_reg: fixedregulator_3v3 {
119*4882a593Smuzhiyun		compatible = "regulator-fixed";
120*4882a593Smuzhiyun		regulator-name = "VCC 3V3";
121*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
122*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
123*4882a593Smuzhiyun		regulator-boot-on;
124*4882a593Smuzhiyun		regulator-always-on;
125*4882a593Smuzhiyun	};
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun	vcc_mmc0_reg: fixedregulator_mmc0 {
128*4882a593Smuzhiyun		compatible = "regulator-fixed";
129*4882a593Smuzhiyun		gpio = <&pioE 15 GPIO_ACTIVE_HIGH>;
130*4882a593Smuzhiyun		regulator-name = "RST_n MCI0";
131*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
132*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
133*4882a593Smuzhiyun		vin-supply = <&vcc_3v3_reg>;
134*4882a593Smuzhiyun		regulator-boot-on;
135*4882a593Smuzhiyun	};
136*4882a593Smuzhiyun};
137