xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/at91-sama5d2_xplained.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * at91-sama5d2_xplained.dts - Device Tree file for SAMA5D2 Xplained board
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun *  Copyright (C) 2015 Atmel,
6*4882a593Smuzhiyun *                2015 Nicolas Ferre <nicolas.ferre@atmel.com>
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun/dts-v1/;
9*4882a593Smuzhiyun#include "sama5d2.dtsi"
10*4882a593Smuzhiyun#include "sama5d2-pinfunc.h"
11*4882a593Smuzhiyun#include <dt-bindings/mfd/atmel-flexcom.h>
12*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h>
13*4882a593Smuzhiyun#include <dt-bindings/input/input.h>
14*4882a593Smuzhiyun#include <dt-bindings/regulator/active-semi,8945a-regulator.h>
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun/ {
17*4882a593Smuzhiyun	model = "Atmel SAMA5D2 Xplained";
18*4882a593Smuzhiyun	compatible = "atmel,sama5d2-xplained", "atmel,sama5d2", "atmel,sama5";
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun	aliases {
21*4882a593Smuzhiyun		serial0 = &uart1;	/* DBGU */
22*4882a593Smuzhiyun		i2c0 = &i2c0;
23*4882a593Smuzhiyun		i2c1 = &i2c1;
24*4882a593Smuzhiyun		i2c2 = &i2c2;		/* XPRO EXT2 */
25*4882a593Smuzhiyun	};
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun	chosen {
28*4882a593Smuzhiyun		stdout-path = "serial0:115200n8";
29*4882a593Smuzhiyun	};
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun	clocks {
32*4882a593Smuzhiyun		slow_xtal {
33*4882a593Smuzhiyun			clock-frequency = <32768>;
34*4882a593Smuzhiyun		};
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun		main_xtal {
37*4882a593Smuzhiyun			clock-frequency = <12000000>;
38*4882a593Smuzhiyun		};
39*4882a593Smuzhiyun	};
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun	ahb {
42*4882a593Smuzhiyun		usb0: gadget@300000 {
43*4882a593Smuzhiyun			atmel,vbus-gpio = <&pioA PIN_PA31 GPIO_ACTIVE_HIGH>;
44*4882a593Smuzhiyun			pinctrl-names = "default";
45*4882a593Smuzhiyun			pinctrl-0 = <&pinctrl_usba_vbus>;
46*4882a593Smuzhiyun			status = "okay";
47*4882a593Smuzhiyun		};
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun		usb1: ohci@400000 {
50*4882a593Smuzhiyun			num-ports = <3>;
51*4882a593Smuzhiyun			atmel,vbus-gpio = <0 /* &pioA PIN_PB9 GPIO_ACTIVE_HIGH */
52*4882a593Smuzhiyun					   &pioA PIN_PB10 GPIO_ACTIVE_HIGH
53*4882a593Smuzhiyun					   0
54*4882a593Smuzhiyun					  >;
55*4882a593Smuzhiyun			pinctrl-names = "default";
56*4882a593Smuzhiyun			pinctrl-0 = <&pinctrl_usb_default>;
57*4882a593Smuzhiyun			status = "okay";
58*4882a593Smuzhiyun		};
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun		usb2: ehci@500000 {
61*4882a593Smuzhiyun			status = "okay";
62*4882a593Smuzhiyun		};
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun		sdmmc0: sdio-host@a0000000 {
65*4882a593Smuzhiyun			bus-width = <8>;
66*4882a593Smuzhiyun			pinctrl-names = "default";
67*4882a593Smuzhiyun			pinctrl-0 = <&pinctrl_sdmmc0_default>;
68*4882a593Smuzhiyun			non-removable;
69*4882a593Smuzhiyun			mmc-ddr-1_8v;
70*4882a593Smuzhiyun			status = "okay";
71*4882a593Smuzhiyun		};
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun		sdmmc1: sdio-host@b0000000 {
74*4882a593Smuzhiyun			bus-width = <4>;
75*4882a593Smuzhiyun			pinctrl-names = "default";
76*4882a593Smuzhiyun			pinctrl-0 = <&pinctrl_sdmmc1_default>;
77*4882a593Smuzhiyun			status = "okay"; /* conflict with qspi0 */
78*4882a593Smuzhiyun			vqmmc-supply = <&vdd_3v3_reg>;
79*4882a593Smuzhiyun			vmmc-supply = <&vdd_3v3_reg>;
80*4882a593Smuzhiyun		};
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun		apb {
83*4882a593Smuzhiyun			qspi0: spi@f0020000 {
84*4882a593Smuzhiyun				pinctrl-names = "default";
85*4882a593Smuzhiyun				pinctrl-0 = <&pinctrl_qspi0_default>;
86*4882a593Smuzhiyun				status = "disabled"; /* conflict with sdmmc1 */
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun				flash@0 {
89*4882a593Smuzhiyun					#address-cells = <1>;
90*4882a593Smuzhiyun					#size-cells = <1>;
91*4882a593Smuzhiyun					compatible = "jedec,spi-nor";
92*4882a593Smuzhiyun					reg = <0>;
93*4882a593Smuzhiyun					spi-max-frequency = <80000000>;
94*4882a593Smuzhiyun					spi-tx-bus-width = <4>;
95*4882a593Smuzhiyun					spi-rx-bus-width = <4>;
96*4882a593Smuzhiyun					m25p,fast-read;
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun					at91bootstrap@00000000 {
99*4882a593Smuzhiyun						label = "at91bootstrap";
100*4882a593Smuzhiyun						reg = <0x00000000 0x00040000>;
101*4882a593Smuzhiyun					};
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun					bootloader@00040000 {
104*4882a593Smuzhiyun						label = "bootloader";
105*4882a593Smuzhiyun						reg = <0x00040000 0x000c0000>;
106*4882a593Smuzhiyun					};
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun					bootloaderenvred@00100000 {
109*4882a593Smuzhiyun						label = "bootloader env redundant";
110*4882a593Smuzhiyun						reg = <0x00100000 0x00040000>;
111*4882a593Smuzhiyun					};
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun					bootloaderenv@00140000 {
114*4882a593Smuzhiyun						label = "bootloader env";
115*4882a593Smuzhiyun						reg = <0x00140000 0x00040000>;
116*4882a593Smuzhiyun					};
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun					dtb@00180000 {
119*4882a593Smuzhiyun						label = "device tree";
120*4882a593Smuzhiyun						reg = <0x00180000 0x00080000>;
121*4882a593Smuzhiyun					};
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun					kernel@00200000 {
124*4882a593Smuzhiyun						label = "kernel";
125*4882a593Smuzhiyun						reg = <0x00200000 0x00600000>;
126*4882a593Smuzhiyun					};
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun					misc@00800000 {
129*4882a593Smuzhiyun						label = "misc";
130*4882a593Smuzhiyun						reg = <0x00800000 0x00000000>;
131*4882a593Smuzhiyun					};
132*4882a593Smuzhiyun				};
133*4882a593Smuzhiyun			};
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun			spi0: spi@f8000000 {
136*4882a593Smuzhiyun				pinctrl-names = "default";
137*4882a593Smuzhiyun				pinctrl-0 = <&pinctrl_spi0_default>;
138*4882a593Smuzhiyun				status = "okay";
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun				m25p80@0 {
141*4882a593Smuzhiyun					compatible = "atmel,at25df321a";
142*4882a593Smuzhiyun					reg = <0>;
143*4882a593Smuzhiyun					spi-max-frequency = <50000000>;
144*4882a593Smuzhiyun				};
145*4882a593Smuzhiyun			};
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun			macb0: ethernet@f8008000 {
148*4882a593Smuzhiyun				pinctrl-names = "default";
149*4882a593Smuzhiyun				pinctrl-0 = <&pinctrl_macb0_default &pinctrl_macb0_phy_irq>;
150*4882a593Smuzhiyun				phy-mode = "rmii";
151*4882a593Smuzhiyun				status = "okay";
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun				ethernet-phy@1 {
154*4882a593Smuzhiyun					reg = <0x1>;
155*4882a593Smuzhiyun					interrupt-parent = <&pioA>;
156*4882a593Smuzhiyun					interrupts = <PIN_PC9 IRQ_TYPE_LEVEL_LOW>;
157*4882a593Smuzhiyun				};
158*4882a593Smuzhiyun			};
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun			tcb0: timer@f800c000 {
161*4882a593Smuzhiyun				timer0: timer@0 {
162*4882a593Smuzhiyun					compatible = "atmel,tcb-timer";
163*4882a593Smuzhiyun					reg = <0>;
164*4882a593Smuzhiyun				};
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun				timer1: timer@1 {
167*4882a593Smuzhiyun					compatible = "atmel,tcb-timer";
168*4882a593Smuzhiyun					reg = <1>;
169*4882a593Smuzhiyun				};
170*4882a593Smuzhiyun			};
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun			uart1: serial@f8020000 {
173*4882a593Smuzhiyun				pinctrl-names = "default";
174*4882a593Smuzhiyun				pinctrl-0 = <&pinctrl_uart1_default>;
175*4882a593Smuzhiyun				atmel,use-dma-rx;
176*4882a593Smuzhiyun				atmel,use-dma-tx;
177*4882a593Smuzhiyun				status = "okay";
178*4882a593Smuzhiyun			};
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun			i2c0: i2c@f8028000 {
181*4882a593Smuzhiyun				dmas = <0>, <0>;
182*4882a593Smuzhiyun				pinctrl-names = "default", "gpio";
183*4882a593Smuzhiyun				pinctrl-0 = <&pinctrl_i2c0_default>;
184*4882a593Smuzhiyun				pinctrl-1 = <&pinctrl_i2c0_gpio>;
185*4882a593Smuzhiyun				sda-gpios = <&pioA PIN_PD21 GPIO_ACTIVE_HIGH>;
186*4882a593Smuzhiyun				scl-gpios = <&pioA PIN_PD22 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
187*4882a593Smuzhiyun				i2c-sda-hold-time-ns = <350>;
188*4882a593Smuzhiyun				status = "okay";
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun				pmic@5b {
191*4882a593Smuzhiyun					compatible = "active-semi,act8945a";
192*4882a593Smuzhiyun					reg = <0x5b>;
193*4882a593Smuzhiyun					active-semi,vsel-high;
194*4882a593Smuzhiyun					status = "okay";
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun					regulators {
197*4882a593Smuzhiyun						vdd_1v35_reg: REG_DCDC1 {
198*4882a593Smuzhiyun							regulator-name = "VDD_1V35";
199*4882a593Smuzhiyun							regulator-min-microvolt = <1350000>;
200*4882a593Smuzhiyun							regulator-max-microvolt = <1350000>;
201*4882a593Smuzhiyun							regulator-allowed-modes = <ACT8945A_REGULATOR_MODE_FIXED>,
202*4882a593Smuzhiyun										  <ACT8945A_REGULATOR_MODE_LOWPOWER>;
203*4882a593Smuzhiyun							regulator-initial-mode = <ACT8945A_REGULATOR_MODE_FIXED>;
204*4882a593Smuzhiyun							regulator-always-on;
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun							regulator-state-mem {
207*4882a593Smuzhiyun								regulator-on-in-suspend;
208*4882a593Smuzhiyun								regulator-suspend-min-microvolt=<1400000>;
209*4882a593Smuzhiyun								regulator-suspend-max-microvolt=<1400000>;
210*4882a593Smuzhiyun								regulator-changeable-in-suspend;
211*4882a593Smuzhiyun								regulator-mode=<ACT8945A_REGULATOR_MODE_LOWPOWER>;
212*4882a593Smuzhiyun							};
213*4882a593Smuzhiyun						};
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun						vdd_1v2_reg: REG_DCDC2 {
216*4882a593Smuzhiyun							regulator-name = "VDD_1V2";
217*4882a593Smuzhiyun							regulator-min-microvolt = <1100000>;
218*4882a593Smuzhiyun							regulator-max-microvolt = <1300000>;
219*4882a593Smuzhiyun							regulator-allowed-modes = <ACT8945A_REGULATOR_MODE_FIXED>,
220*4882a593Smuzhiyun										  <ACT8945A_REGULATOR_MODE_LOWPOWER>;
221*4882a593Smuzhiyun							regulator-initial-mode = <ACT8945A_REGULATOR_MODE_FIXED>;
222*4882a593Smuzhiyun							regulator-always-on;
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun							regulator-state-mem {
225*4882a593Smuzhiyun								regulator-off-in-suspend;
226*4882a593Smuzhiyun							};
227*4882a593Smuzhiyun						};
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun						vdd_3v3_reg: REG_DCDC3 {
230*4882a593Smuzhiyun							regulator-name = "VDD_3V3";
231*4882a593Smuzhiyun							regulator-min-microvolt = <3300000>;
232*4882a593Smuzhiyun							regulator-max-microvolt = <3300000>;
233*4882a593Smuzhiyun							regulator-allowed-modes = <ACT8945A_REGULATOR_MODE_FIXED>,
234*4882a593Smuzhiyun										  <ACT8945A_REGULATOR_MODE_LOWPOWER>;
235*4882a593Smuzhiyun							regulator-initial-mode = <ACT8945A_REGULATOR_MODE_FIXED>;
236*4882a593Smuzhiyun							regulator-always-on;
237*4882a593Smuzhiyun
238*4882a593Smuzhiyun							regulator-state-mem {
239*4882a593Smuzhiyun								regulator-off-in-suspend;
240*4882a593Smuzhiyun							};
241*4882a593Smuzhiyun						};
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun						vdd_fuse_reg: REG_LDO1 {
244*4882a593Smuzhiyun							regulator-name = "VDD_FUSE";
245*4882a593Smuzhiyun							regulator-min-microvolt = <2500000>;
246*4882a593Smuzhiyun							regulator-max-microvolt = <2500000>;
247*4882a593Smuzhiyun							regulator-allowed-modes = <ACT8945A_REGULATOR_MODE_NORMAL>,
248*4882a593Smuzhiyun										  <ACT8945A_REGULATOR_MODE_LOWPOWER>;
249*4882a593Smuzhiyun							regulator-initial-mode = <ACT8945A_REGULATOR_MODE_NORMAL>;
250*4882a593Smuzhiyun							regulator-always-on;
251*4882a593Smuzhiyun
252*4882a593Smuzhiyun							regulator-state-mem {
253*4882a593Smuzhiyun								regulator-off-in-suspend;
254*4882a593Smuzhiyun							};
255*4882a593Smuzhiyun						};
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun						vdd_3v3_lp_reg: REG_LDO2 {
258*4882a593Smuzhiyun							regulator-name = "VDD_3V3_LP";
259*4882a593Smuzhiyun							regulator-min-microvolt = <3300000>;
260*4882a593Smuzhiyun							regulator-max-microvolt = <3300000>;
261*4882a593Smuzhiyun							regulator-allowed-modes = <ACT8945A_REGULATOR_MODE_NORMAL>,
262*4882a593Smuzhiyun										  <ACT8945A_REGULATOR_MODE_LOWPOWER>;
263*4882a593Smuzhiyun							regulator-initial-mode = <ACT8945A_REGULATOR_MODE_NORMAL>;
264*4882a593Smuzhiyun							regulator-always-on;
265*4882a593Smuzhiyun
266*4882a593Smuzhiyun							regulator-state-mem {
267*4882a593Smuzhiyun								regulator-off-in-suspend;
268*4882a593Smuzhiyun							};
269*4882a593Smuzhiyun						};
270*4882a593Smuzhiyun
271*4882a593Smuzhiyun						vdd_led_reg: REG_LDO3 {
272*4882a593Smuzhiyun							regulator-name = "VDD_LED";
273*4882a593Smuzhiyun							regulator-min-microvolt = <3300000>;
274*4882a593Smuzhiyun							regulator-max-microvolt = <3300000>;
275*4882a593Smuzhiyun							regulator-allowed-modes = <ACT8945A_REGULATOR_MODE_NORMAL>,
276*4882a593Smuzhiyun										  <ACT8945A_REGULATOR_MODE_LOWPOWER>;
277*4882a593Smuzhiyun							regulator-initial-mode = <ACT8945A_REGULATOR_MODE_NORMAL>;
278*4882a593Smuzhiyun							regulator-always-on;
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun							regulator-state-mem {
281*4882a593Smuzhiyun								regulator-off-in-suspend;
282*4882a593Smuzhiyun							};
283*4882a593Smuzhiyun						};
284*4882a593Smuzhiyun
285*4882a593Smuzhiyun						vdd_sdhc_1v8_reg: REG_LDO4 {
286*4882a593Smuzhiyun							regulator-name = "VDD_SDHC_1V8";
287*4882a593Smuzhiyun							regulator-min-microvolt = <1800000>;
288*4882a593Smuzhiyun							regulator-max-microvolt = <1800000>;
289*4882a593Smuzhiyun							regulator-allowed-modes = <ACT8945A_REGULATOR_MODE_NORMAL>,
290*4882a593Smuzhiyun										  <ACT8945A_REGULATOR_MODE_LOWPOWER>;
291*4882a593Smuzhiyun							regulator-initial-mode = <ACT8945A_REGULATOR_MODE_NORMAL>;
292*4882a593Smuzhiyun							regulator-always-on;
293*4882a593Smuzhiyun
294*4882a593Smuzhiyun							regulator-state-mem {
295*4882a593Smuzhiyun								regulator-off-in-suspend;
296*4882a593Smuzhiyun							};
297*4882a593Smuzhiyun						};
298*4882a593Smuzhiyun					};
299*4882a593Smuzhiyun
300*4882a593Smuzhiyun					charger {
301*4882a593Smuzhiyun						compatible = "active-semi,act8945a-charger";
302*4882a593Smuzhiyun						pinctrl-names = "default";
303*4882a593Smuzhiyun						pinctrl-0 = <&pinctrl_charger_chglev &pinctrl_charger_lbo &pinctrl_charger_irq>;
304*4882a593Smuzhiyun						interrupt-parent = <&pioA>;
305*4882a593Smuzhiyun						interrupts = <PIN_PB13 IRQ_TYPE_EDGE_RISING>;
306*4882a593Smuzhiyun
307*4882a593Smuzhiyun						active-semi,chglev-gpios = <&pioA PIN_PA12 GPIO_ACTIVE_HIGH>;
308*4882a593Smuzhiyun						active-semi,lbo-gpios = <&pioA PIN_PC8 GPIO_ACTIVE_LOW>;
309*4882a593Smuzhiyun						active-semi,input-voltage-threshold-microvolt = <6600>;
310*4882a593Smuzhiyun						active-semi,precondition-timeout = <40>;
311*4882a593Smuzhiyun						active-semi,total-timeout = <3>;
312*4882a593Smuzhiyun						status = "okay";
313*4882a593Smuzhiyun					};
314*4882a593Smuzhiyun				};
315*4882a593Smuzhiyun			};
316*4882a593Smuzhiyun
317*4882a593Smuzhiyun			pwm0: pwm@f802c000 {
318*4882a593Smuzhiyun				pinctrl-names = "default";
319*4882a593Smuzhiyun				pinctrl-0 = <&pinctrl_pwm0_pwm2_default>;
320*4882a593Smuzhiyun				status = "disabled"; /* conflict with leds */
321*4882a593Smuzhiyun			};
322*4882a593Smuzhiyun
323*4882a593Smuzhiyun			flx0: flexcom@f8034000 {
324*4882a593Smuzhiyun				atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>;
325*4882a593Smuzhiyun				status = "disabled"; /* conflict with ISC_D2 & ISC_D3 data pins */
326*4882a593Smuzhiyun
327*4882a593Smuzhiyun				uart5: serial@200 {
328*4882a593Smuzhiyun					dmas = <0>, <0>;
329*4882a593Smuzhiyun					pinctrl-names = "default";
330*4882a593Smuzhiyun					pinctrl-0 = <&pinctrl_flx0_default>;
331*4882a593Smuzhiyun					status = "okay";
332*4882a593Smuzhiyun				};
333*4882a593Smuzhiyun
334*4882a593Smuzhiyun				i2c2: i2c@600 {
335*4882a593Smuzhiyun					dmas = <0>, <0>;
336*4882a593Smuzhiyun					pinctrl-names = "default", "gpio";
337*4882a593Smuzhiyun					pinctrl-0 = <&pinctrl_flx0_default>;
338*4882a593Smuzhiyun					pinctrl-1 = <&pinctrl_i2c2_gpio>;
339*4882a593Smuzhiyun					sda-gpios = <&pioA PIN_PB28 GPIO_ACTIVE_HIGH>;
340*4882a593Smuzhiyun					scl-gpios = <&pioA PIN_PB29 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
341*4882a593Smuzhiyun					i2c-sda-hold-time-ns = <350>;
342*4882a593Smuzhiyun					i2c-analog-filter;
343*4882a593Smuzhiyun					i2c-digital-filter;
344*4882a593Smuzhiyun					i2c-digital-filter-width-ns = <35>;
345*4882a593Smuzhiyun					status = "disabled"; /* conflict with ISC_D2 & ISC_D3 data pins */
346*4882a593Smuzhiyun				};
347*4882a593Smuzhiyun			};
348*4882a593Smuzhiyun
349*4882a593Smuzhiyun			shdwc@f8048010 {
350*4882a593Smuzhiyun				debounce-delay-us = <976>;
351*4882a593Smuzhiyun				atmel,wakeup-rtc-timer;
352*4882a593Smuzhiyun
353*4882a593Smuzhiyun				input@0 {
354*4882a593Smuzhiyun					reg = <0>;
355*4882a593Smuzhiyun					atmel,wakeup-type = "low";
356*4882a593Smuzhiyun				};
357*4882a593Smuzhiyun			};
358*4882a593Smuzhiyun
359*4882a593Smuzhiyun			watchdog@f8048040 {
360*4882a593Smuzhiyun				status = "okay";
361*4882a593Smuzhiyun			};
362*4882a593Smuzhiyun
363*4882a593Smuzhiyun			i2s0: i2s@f8050000 {
364*4882a593Smuzhiyun				pinctrl-names = "default";
365*4882a593Smuzhiyun				pinctrl-0 = <&pinctrl_i2s0_default>;
366*4882a593Smuzhiyun				status = "disabled"; /* conflict with can0 */
367*4882a593Smuzhiyun			};
368*4882a593Smuzhiyun
369*4882a593Smuzhiyun			can0: can@f8054000 {
370*4882a593Smuzhiyun				pinctrl-names = "default";
371*4882a593Smuzhiyun				pinctrl-0 = <&pinctrl_can0_default>;
372*4882a593Smuzhiyun				status = "okay";
373*4882a593Smuzhiyun			};
374*4882a593Smuzhiyun
375*4882a593Smuzhiyun			uart3: serial@fc008000 {
376*4882a593Smuzhiyun				atmel,use-dma-rx;
377*4882a593Smuzhiyun				atmel,use-dma-tx;
378*4882a593Smuzhiyun				pinctrl-names = "default";
379*4882a593Smuzhiyun				pinctrl-0 = <&pinctrl_uart3_default>;
380*4882a593Smuzhiyun				status = "okay";
381*4882a593Smuzhiyun			};
382*4882a593Smuzhiyun
383*4882a593Smuzhiyun			flx4: flexcom@fc018000 {
384*4882a593Smuzhiyun				atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>;
385*4882a593Smuzhiyun				status = "okay";
386*4882a593Smuzhiyun
387*4882a593Smuzhiyun				i2c6: i2c@600 {
388*4882a593Smuzhiyun					dmas = <0>, <0>;
389*4882a593Smuzhiyun					pinctrl-names = "default", "gpio";
390*4882a593Smuzhiyun					pinctrl-0 = <&pinctrl_flx4_default>;
391*4882a593Smuzhiyun					pinctrl-1 = <&pinctrl_flx4_gpio>;
392*4882a593Smuzhiyun					sda-gpios = <&pioA PIN_PD12 GPIO_ACTIVE_HIGH>;
393*4882a593Smuzhiyun					scl-gpios = <&pioA PIN_PD13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
394*4882a593Smuzhiyun					i2c-analog-filter;
395*4882a593Smuzhiyun					i2c-digital-filter;
396*4882a593Smuzhiyun					i2c-digital-filter-width-ns = <35>;
397*4882a593Smuzhiyun					status = "okay";
398*4882a593Smuzhiyun				};
399*4882a593Smuzhiyun			};
400*4882a593Smuzhiyun
401*4882a593Smuzhiyun			i2c1: i2c@fc028000 {
402*4882a593Smuzhiyun				dmas = <0>, <0>;
403*4882a593Smuzhiyun				pinctrl-names = "default", "gpio";
404*4882a593Smuzhiyun				pinctrl-0 = <&pinctrl_i2c1_default>;
405*4882a593Smuzhiyun				i2c-analog-filter;
406*4882a593Smuzhiyun				i2c-digital-filter;
407*4882a593Smuzhiyun				i2c-digital-filter-width-ns = <35>;
408*4882a593Smuzhiyun				pinctrl-1 = <&pinctrl_i2c1_gpio>;
409*4882a593Smuzhiyun				sda-gpios = <&pioA PIN_PD4 GPIO_ACTIVE_HIGH>;
410*4882a593Smuzhiyun				scl-gpios = <&pioA PIN_PD5 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
411*4882a593Smuzhiyun				status = "okay";
412*4882a593Smuzhiyun
413*4882a593Smuzhiyun				at24@54 {
414*4882a593Smuzhiyun					compatible = "atmel,24c02";
415*4882a593Smuzhiyun					reg = <0x54>;
416*4882a593Smuzhiyun					pagesize = <16>;
417*4882a593Smuzhiyun				};
418*4882a593Smuzhiyun			};
419*4882a593Smuzhiyun
420*4882a593Smuzhiyun			adc: adc@fc030000 {
421*4882a593Smuzhiyun				vddana-supply = <&vdd_3v3_lp_reg>;
422*4882a593Smuzhiyun				vref-supply = <&vdd_3v3_lp_reg>;
423*4882a593Smuzhiyun				pinctrl-names = "default";
424*4882a593Smuzhiyun				pinctrl-0 = <&pinctrl_adc_default &pinctrl_adtrg_default>;
425*4882a593Smuzhiyun				status = "okay";
426*4882a593Smuzhiyun			};
427*4882a593Smuzhiyun
428*4882a593Smuzhiyun			pinctrl@fc038000 {
429*4882a593Smuzhiyun				/*
430*4882a593Smuzhiyun				 * There is no real pinmux for ADC, if the pin
431*4882a593Smuzhiyun				 * is not requested by another peripheral then
432*4882a593Smuzhiyun				 * the muxing is done when channel is enabled.
433*4882a593Smuzhiyun				 * Requesting pins for ADC is GPIO is
434*4882a593Smuzhiyun				 * encouraged to prevent conflicts and to
435*4882a593Smuzhiyun				 * disable bias in order to be in the same
436*4882a593Smuzhiyun				 * state when the pin is not muxed to the adc.
437*4882a593Smuzhiyun				 */
438*4882a593Smuzhiyun				pinctrl_adc_default: adc_default {
439*4882a593Smuzhiyun					pinmux = <PIN_PD23__GPIO>;
440*4882a593Smuzhiyun					bias-disable;
441*4882a593Smuzhiyun				};
442*4882a593Smuzhiyun
443*4882a593Smuzhiyun				pinctrl_can0_default: can0_default {
444*4882a593Smuzhiyun					pinmux = <PIN_PC10__CANTX0>,
445*4882a593Smuzhiyun						 <PIN_PC11__CANRX0>;
446*4882a593Smuzhiyun					bias-disable;
447*4882a593Smuzhiyun				};
448*4882a593Smuzhiyun
449*4882a593Smuzhiyun				pinctrl_can1_default: can1_default {
450*4882a593Smuzhiyun					pinmux = <PIN_PC26__CANTX1>,
451*4882a593Smuzhiyun						 <PIN_PC27__CANRX1>;
452*4882a593Smuzhiyun					bias-disable;
453*4882a593Smuzhiyun				};
454*4882a593Smuzhiyun
455*4882a593Smuzhiyun				/*
456*4882a593Smuzhiyun				 * The ADTRG pin can work on any edge type.
457*4882a593Smuzhiyun				 * In here it's being pulled up, so need to
458*4882a593Smuzhiyun				 * connect it to ground to get an edge e.g.
459*4882a593Smuzhiyun				 * Trigger can be configured on falling, rise
460*4882a593Smuzhiyun				 * or any edge, and the pull-up can be changed
461*4882a593Smuzhiyun				 * to pull-down or left floating according to
462*4882a593Smuzhiyun				 * needs.
463*4882a593Smuzhiyun				 */
464*4882a593Smuzhiyun				pinctrl_adtrg_default: adtrg_default {
465*4882a593Smuzhiyun					pinmux = <PIN_PD31__ADTRG>;
466*4882a593Smuzhiyun					bias-pull-up;
467*4882a593Smuzhiyun				};
468*4882a593Smuzhiyun
469*4882a593Smuzhiyun				pinctrl_charger_chglev: charger_chglev {
470*4882a593Smuzhiyun					pinmux = <PIN_PA12__GPIO>;
471*4882a593Smuzhiyun					bias-disable;
472*4882a593Smuzhiyun				};
473*4882a593Smuzhiyun
474*4882a593Smuzhiyun				pinctrl_charger_irq: charger_irq {
475*4882a593Smuzhiyun					pinmux = <PIN_PB13__GPIO>;
476*4882a593Smuzhiyun					bias-disable;
477*4882a593Smuzhiyun				};
478*4882a593Smuzhiyun
479*4882a593Smuzhiyun				pinctrl_charger_lbo: charger_lbo {
480*4882a593Smuzhiyun					pinmux = <PIN_PC8__GPIO>;
481*4882a593Smuzhiyun					bias-pull-up;
482*4882a593Smuzhiyun				};
483*4882a593Smuzhiyun
484*4882a593Smuzhiyun				pinctrl_classd_default_pfets: classd_default_pfets {
485*4882a593Smuzhiyun					pinmux = <PIN_PB1__CLASSD_R0>,
486*4882a593Smuzhiyun						 <PIN_PB3__CLASSD_R2>;
487*4882a593Smuzhiyun					bias-pull-up;
488*4882a593Smuzhiyun				};
489*4882a593Smuzhiyun
490*4882a593Smuzhiyun				pinctrl_classd_default_nfets: classd_default_nfets {
491*4882a593Smuzhiyun					pinmux = <PIN_PB2__CLASSD_R1>,
492*4882a593Smuzhiyun						 <PIN_PB4__CLASSD_R3>;
493*4882a593Smuzhiyun					bias-pull-down;
494*4882a593Smuzhiyun				};
495*4882a593Smuzhiyun
496*4882a593Smuzhiyun				pinctrl_flx0_default: flx0_default {
497*4882a593Smuzhiyun					pinmux = <PIN_PB28__FLEXCOM0_IO0>,
498*4882a593Smuzhiyun						 <PIN_PB29__FLEXCOM0_IO1>;
499*4882a593Smuzhiyun					bias-disable;
500*4882a593Smuzhiyun				};
501*4882a593Smuzhiyun
502*4882a593Smuzhiyun				pinctrl_flx4_default: flx4_default {
503*4882a593Smuzhiyun					pinmux = <PIN_PD12__FLEXCOM4_IO0>,
504*4882a593Smuzhiyun						 <PIN_PD13__FLEXCOM4_IO1>;
505*4882a593Smuzhiyun					bias-disable;
506*4882a593Smuzhiyun				};
507*4882a593Smuzhiyun
508*4882a593Smuzhiyun				pinctrl_flx4_gpio: flx4_gpio {
509*4882a593Smuzhiyun					pinmux = <PIN_PD12__GPIO>,
510*4882a593Smuzhiyun						 <PIN_PD13__GPIO>;
511*4882a593Smuzhiyun					bias-disable;
512*4882a593Smuzhiyun				};
513*4882a593Smuzhiyun
514*4882a593Smuzhiyun				pinctrl_i2c0_default: i2c0_default {
515*4882a593Smuzhiyun					pinmux = <PIN_PD21__TWD0>,
516*4882a593Smuzhiyun						 <PIN_PD22__TWCK0>;
517*4882a593Smuzhiyun					bias-disable;
518*4882a593Smuzhiyun				};
519*4882a593Smuzhiyun
520*4882a593Smuzhiyun				pinctrl_i2c0_gpio: i2c0_gpio {
521*4882a593Smuzhiyun					pinmux = <PIN_PD21__GPIO>,
522*4882a593Smuzhiyun						 <PIN_PD22__GPIO>;
523*4882a593Smuzhiyun					bias-disable;
524*4882a593Smuzhiyun				};
525*4882a593Smuzhiyun
526*4882a593Smuzhiyun				pinctrl_i2c1_default: i2c1_default {
527*4882a593Smuzhiyun					pinmux = <PIN_PD4__TWD1>,
528*4882a593Smuzhiyun						 <PIN_PD5__TWCK1>;
529*4882a593Smuzhiyun					bias-disable;
530*4882a593Smuzhiyun				};
531*4882a593Smuzhiyun
532*4882a593Smuzhiyun				pinctrl_i2c1_gpio: i2c1_gpio {
533*4882a593Smuzhiyun					pinmux = <PIN_PD4__GPIO>,
534*4882a593Smuzhiyun						 <PIN_PD5__GPIO>;
535*4882a593Smuzhiyun					bias-disable;
536*4882a593Smuzhiyun				};
537*4882a593Smuzhiyun
538*4882a593Smuzhiyun				pinctrl_i2c2_gpio: i2c2_gpio {
539*4882a593Smuzhiyun					pinmux = <PIN_PB28__GPIO>,
540*4882a593Smuzhiyun						 <PIN_PB29__GPIO>;
541*4882a593Smuzhiyun					bias-disable;
542*4882a593Smuzhiyun				};
543*4882a593Smuzhiyun
544*4882a593Smuzhiyun				pinctrl_i2s0_default: i2s0_default {
545*4882a593Smuzhiyun					pinmux = <PIN_PC1__I2SC0_CK>,
546*4882a593Smuzhiyun						 <PIN_PC2__I2SC0_MCK>,
547*4882a593Smuzhiyun						 <PIN_PC3__I2SC0_WS>,
548*4882a593Smuzhiyun						 <PIN_PC4__I2SC0_DI0>,
549*4882a593Smuzhiyun						 <PIN_PC5__I2SC0_DO0>;
550*4882a593Smuzhiyun					bias-disable;
551*4882a593Smuzhiyun				};
552*4882a593Smuzhiyun
553*4882a593Smuzhiyun				pinctrl_i2s1_default: i2s1_default {
554*4882a593Smuzhiyun					pinmux = <PIN_PA15__I2SC1_CK>,
555*4882a593Smuzhiyun						 <PIN_PA14__I2SC1_MCK>,
556*4882a593Smuzhiyun						 <PIN_PA16__I2SC1_WS>,
557*4882a593Smuzhiyun						 <PIN_PA17__I2SC1_DI0>,
558*4882a593Smuzhiyun						 <PIN_PA18__I2SC1_DO0>;
559*4882a593Smuzhiyun					bias-disable;
560*4882a593Smuzhiyun				};
561*4882a593Smuzhiyun
562*4882a593Smuzhiyun				pinctrl_key_gpio_default: key_gpio_default {
563*4882a593Smuzhiyun					pinmux = <PIN_PB9__GPIO>;
564*4882a593Smuzhiyun					bias-pull-up;
565*4882a593Smuzhiyun				};
566*4882a593Smuzhiyun
567*4882a593Smuzhiyun				pinctrl_led_gpio_default: led_gpio_default {
568*4882a593Smuzhiyun					pinmux = <PIN_PB0__GPIO>,
569*4882a593Smuzhiyun						 <PIN_PB5__GPIO>,
570*4882a593Smuzhiyun						 <PIN_PB6__GPIO>;
571*4882a593Smuzhiyun					bias-pull-up;
572*4882a593Smuzhiyun				};
573*4882a593Smuzhiyun
574*4882a593Smuzhiyun				pinctrl_macb0_default: macb0_default {
575*4882a593Smuzhiyun					pinmux = <PIN_PB14__GTXCK>,
576*4882a593Smuzhiyun						 <PIN_PB15__GTXEN>,
577*4882a593Smuzhiyun						 <PIN_PB16__GRXDV>,
578*4882a593Smuzhiyun						 <PIN_PB17__GRXER>,
579*4882a593Smuzhiyun						 <PIN_PB18__GRX0>,
580*4882a593Smuzhiyun						 <PIN_PB19__GRX1>,
581*4882a593Smuzhiyun						 <PIN_PB20__GTX0>,
582*4882a593Smuzhiyun						 <PIN_PB21__GTX1>,
583*4882a593Smuzhiyun						 <PIN_PB22__GMDC>,
584*4882a593Smuzhiyun						 <PIN_PB23__GMDIO>;
585*4882a593Smuzhiyun					bias-disable;
586*4882a593Smuzhiyun				};
587*4882a593Smuzhiyun
588*4882a593Smuzhiyun				pinctrl_macb0_phy_irq: macb0_phy_irq {
589*4882a593Smuzhiyun					pinmux = <PIN_PC9__GPIO>;
590*4882a593Smuzhiyun					bias-disable;
591*4882a593Smuzhiyun				};
592*4882a593Smuzhiyun
593*4882a593Smuzhiyun				pinctrl_qspi0_default: qspi0_default {
594*4882a593Smuzhiyun					sck_cs {
595*4882a593Smuzhiyun						pinmux = <PIN_PA22__QSPI0_SCK>,
596*4882a593Smuzhiyun							 <PIN_PA23__QSPI0_CS>;
597*4882a593Smuzhiyun						bias-disable;
598*4882a593Smuzhiyun					};
599*4882a593Smuzhiyun
600*4882a593Smuzhiyun					data {
601*4882a593Smuzhiyun						pinmux = <PIN_PA24__QSPI0_IO0>,
602*4882a593Smuzhiyun							 <PIN_PA25__QSPI0_IO1>,
603*4882a593Smuzhiyun							 <PIN_PA26__QSPI0_IO2>,
604*4882a593Smuzhiyun							 <PIN_PA27__QSPI0_IO3>;
605*4882a593Smuzhiyun						bias-pull-up;
606*4882a593Smuzhiyun					};
607*4882a593Smuzhiyun				};
608*4882a593Smuzhiyun
609*4882a593Smuzhiyun				pinctrl_sdmmc0_default: sdmmc0_default {
610*4882a593Smuzhiyun					cmd_data {
611*4882a593Smuzhiyun						pinmux = <PIN_PA1__SDMMC0_CMD>,
612*4882a593Smuzhiyun							 <PIN_PA2__SDMMC0_DAT0>,
613*4882a593Smuzhiyun							 <PIN_PA3__SDMMC0_DAT1>,
614*4882a593Smuzhiyun							 <PIN_PA4__SDMMC0_DAT2>,
615*4882a593Smuzhiyun							 <PIN_PA5__SDMMC0_DAT3>,
616*4882a593Smuzhiyun							 <PIN_PA6__SDMMC0_DAT4>,
617*4882a593Smuzhiyun							 <PIN_PA7__SDMMC0_DAT5>,
618*4882a593Smuzhiyun							 <PIN_PA8__SDMMC0_DAT6>,
619*4882a593Smuzhiyun							 <PIN_PA9__SDMMC0_DAT7>;
620*4882a593Smuzhiyun						bias-disable;
621*4882a593Smuzhiyun					};
622*4882a593Smuzhiyun
623*4882a593Smuzhiyun					ck_cd_rstn_vddsel {
624*4882a593Smuzhiyun						pinmux = <PIN_PA0__SDMMC0_CK>,
625*4882a593Smuzhiyun							 <PIN_PA10__SDMMC0_RSTN>,
626*4882a593Smuzhiyun							 <PIN_PA11__SDMMC0_VDDSEL>,
627*4882a593Smuzhiyun							 <PIN_PA13__SDMMC0_CD>;
628*4882a593Smuzhiyun						bias-disable;
629*4882a593Smuzhiyun					};
630*4882a593Smuzhiyun				};
631*4882a593Smuzhiyun
632*4882a593Smuzhiyun				pinctrl_sdmmc1_default: sdmmc1_default {
633*4882a593Smuzhiyun					cmd_data {
634*4882a593Smuzhiyun						pinmux = <PIN_PA28__SDMMC1_CMD>,
635*4882a593Smuzhiyun							 <PIN_PA18__SDMMC1_DAT0>,
636*4882a593Smuzhiyun							 <PIN_PA19__SDMMC1_DAT1>,
637*4882a593Smuzhiyun							 <PIN_PA20__SDMMC1_DAT2>,
638*4882a593Smuzhiyun							 <PIN_PA21__SDMMC1_DAT3>;
639*4882a593Smuzhiyun						bias-disable;
640*4882a593Smuzhiyun					};
641*4882a593Smuzhiyun
642*4882a593Smuzhiyun					conf-ck_cd {
643*4882a593Smuzhiyun						pinmux = <PIN_PA22__SDMMC1_CK>,
644*4882a593Smuzhiyun							 <PIN_PA30__SDMMC1_CD>;
645*4882a593Smuzhiyun						bias-disable;
646*4882a593Smuzhiyun					};
647*4882a593Smuzhiyun				};
648*4882a593Smuzhiyun
649*4882a593Smuzhiyun				pinctrl_spi0_default: spi0_default {
650*4882a593Smuzhiyun					pinmux = <PIN_PA14__SPI0_SPCK>,
651*4882a593Smuzhiyun						 <PIN_PA15__SPI0_MOSI>,
652*4882a593Smuzhiyun						 <PIN_PA16__SPI0_MISO>,
653*4882a593Smuzhiyun						 <PIN_PA17__SPI0_NPCS0>;
654*4882a593Smuzhiyun					bias-disable;
655*4882a593Smuzhiyun				};
656*4882a593Smuzhiyun
657*4882a593Smuzhiyun				pinctrl_uart1_default: uart1_default {
658*4882a593Smuzhiyun					pinmux = <PIN_PD2__URXD1>,
659*4882a593Smuzhiyun						 <PIN_PD3__UTXD1>;
660*4882a593Smuzhiyun					bias-disable;
661*4882a593Smuzhiyun				};
662*4882a593Smuzhiyun
663*4882a593Smuzhiyun				pinctrl_uart3_default: uart3_default {
664*4882a593Smuzhiyun					pinmux = <PIN_PB11__URXD3>,
665*4882a593Smuzhiyun						 <PIN_PB12__UTXD3>;
666*4882a593Smuzhiyun					bias-disable;
667*4882a593Smuzhiyun				};
668*4882a593Smuzhiyun
669*4882a593Smuzhiyun				pinctrl_usb_default: usb_default {
670*4882a593Smuzhiyun					pinmux = <PIN_PB10__GPIO>;
671*4882a593Smuzhiyun					bias-disable;
672*4882a593Smuzhiyun				};
673*4882a593Smuzhiyun
674*4882a593Smuzhiyun				pinctrl_usba_vbus: usba_vbus {
675*4882a593Smuzhiyun					pinmux = <PIN_PA31__GPIO>;
676*4882a593Smuzhiyun					bias-disable;
677*4882a593Smuzhiyun				};
678*4882a593Smuzhiyun
679*4882a593Smuzhiyun				pinctrl_pwm0_pwm2_default: pwm0_pwm2_default {
680*4882a593Smuzhiyun					pinmux = <PIN_PB5__PWMH2>,
681*4882a593Smuzhiyun						 <PIN_PB6__PWML2>;
682*4882a593Smuzhiyun					bias-pull-up;
683*4882a593Smuzhiyun				};
684*4882a593Smuzhiyun			};
685*4882a593Smuzhiyun
686*4882a593Smuzhiyun			classd: classd@fc048000 {
687*4882a593Smuzhiyun				pinctrl-names = "default";
688*4882a593Smuzhiyun				pinctrl-0 = <&pinctrl_classd_default_pfets &pinctrl_classd_default_nfets>;
689*4882a593Smuzhiyun				atmel,pwm-type = "diff";
690*4882a593Smuzhiyun				atmel,non-overlap-time = <10>;
691*4882a593Smuzhiyun				status = "okay";
692*4882a593Smuzhiyun			};
693*4882a593Smuzhiyun
694*4882a593Smuzhiyun			i2s1: i2s@fc04c000 {
695*4882a593Smuzhiyun				pinctrl-names = "default";
696*4882a593Smuzhiyun				pinctrl-0 = <&pinctrl_i2s1_default>;
697*4882a593Smuzhiyun				status = "disabled"; /* conflict with spi0, sdmmc1 */
698*4882a593Smuzhiyun			};
699*4882a593Smuzhiyun
700*4882a593Smuzhiyun			can1: can@fc050000 {
701*4882a593Smuzhiyun				pinctrl-names = "default";
702*4882a593Smuzhiyun				pinctrl-0 = <&pinctrl_can1_default>;
703*4882a593Smuzhiyun				status = "okay";
704*4882a593Smuzhiyun			};
705*4882a593Smuzhiyun		};
706*4882a593Smuzhiyun	};
707*4882a593Smuzhiyun
708*4882a593Smuzhiyun	gpio_keys {
709*4882a593Smuzhiyun		compatible = "gpio-keys";
710*4882a593Smuzhiyun
711*4882a593Smuzhiyun		pinctrl-names = "default";
712*4882a593Smuzhiyun		pinctrl-0 = <&pinctrl_key_gpio_default>;
713*4882a593Smuzhiyun
714*4882a593Smuzhiyun		bp1 {
715*4882a593Smuzhiyun			label = "PB_USER";
716*4882a593Smuzhiyun			gpios = <&pioA PIN_PB9 GPIO_ACTIVE_LOW>;
717*4882a593Smuzhiyun			linux,code = <KEY_PROG1>;
718*4882a593Smuzhiyun			wakeup-source;
719*4882a593Smuzhiyun		};
720*4882a593Smuzhiyun	};
721*4882a593Smuzhiyun
722*4882a593Smuzhiyun	leds {
723*4882a593Smuzhiyun		compatible = "gpio-leds";
724*4882a593Smuzhiyun		pinctrl-names = "default";
725*4882a593Smuzhiyun		pinctrl-0 = <&pinctrl_led_gpio_default>;
726*4882a593Smuzhiyun		status = "okay"; /* conflict with pwm0 */
727*4882a593Smuzhiyun
728*4882a593Smuzhiyun		red {
729*4882a593Smuzhiyun			label = "red";
730*4882a593Smuzhiyun			gpios = <&pioA PIN_PB6 GPIO_ACTIVE_LOW>;
731*4882a593Smuzhiyun		};
732*4882a593Smuzhiyun
733*4882a593Smuzhiyun
734*4882a593Smuzhiyun		green {
735*4882a593Smuzhiyun			label = "green";
736*4882a593Smuzhiyun			gpios = <&pioA PIN_PB5 GPIO_ACTIVE_LOW>;
737*4882a593Smuzhiyun		};
738*4882a593Smuzhiyun
739*4882a593Smuzhiyun		blue {
740*4882a593Smuzhiyun			label = "blue";
741*4882a593Smuzhiyun			gpios = <&pioA PIN_PB0 GPIO_ACTIVE_LOW>;
742*4882a593Smuzhiyun			linux,default-trigger = "heartbeat";
743*4882a593Smuzhiyun		};
744*4882a593Smuzhiyun	};
745*4882a593Smuzhiyun};
746