1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * at91-sama5d2_icp.dts - Device Tree file for SAMA5D2-ICP board 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2019 Microchip Technology Inc. and its subsidiaries 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * Author: Radu Pirea & Razvan Stefanescu, 8*4882a593Smuzhiyun * Codrin Ciubotariu <codrin.ciubotariu@microchip.com>, 9*4882a593Smuzhiyun * Cristian Birsan <cristian.birsan@microchip.com> 10*4882a593Smuzhiyun */ 11*4882a593Smuzhiyun/dts-v1/; 12*4882a593Smuzhiyun#include "sama5d2.dtsi" 13*4882a593Smuzhiyun#include "sama5d2-pinfunc.h" 14*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h> 15*4882a593Smuzhiyun#include <dt-bindings/input/input.h> 16*4882a593Smuzhiyun#include <dt-bindings/mfd/atmel-flexcom.h> 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun/ { 19*4882a593Smuzhiyun model = "Microchip SAMA5D2-ICP"; 20*4882a593Smuzhiyun compatible = "microchip,sama5d2-icp", "atmel,sama5d27", "atmel,sama5d2", "atmel,sama5"; 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun aliases { 23*4882a593Smuzhiyun serial0 = &uart0; /* debug uart0 + mikro BUS 1 */ 24*4882a593Smuzhiyun serial1 = &uart1; /* mikro BUS 3 */ 25*4882a593Smuzhiyun serial3 = &uart3; /* mikro BUS 2 */ 26*4882a593Smuzhiyun serial5 = &uart7; /* flx2 */ 27*4882a593Smuzhiyun i2c0 = &i2c0; 28*4882a593Smuzhiyun i2c1 = &i2c1; 29*4882a593Smuzhiyun }; 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun chosen { 32*4882a593Smuzhiyun stdout-path = "serial0:115200n8"; 33*4882a593Smuzhiyun }; 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun clocks { 36*4882a593Smuzhiyun slow_xtal { 37*4882a593Smuzhiyun clock-frequency = <32768>; 38*4882a593Smuzhiyun }; 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun main_xtal { 41*4882a593Smuzhiyun clock-frequency = <12000000>; 42*4882a593Smuzhiyun }; 43*4882a593Smuzhiyun }; 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun gpio_keys { 46*4882a593Smuzhiyun compatible = "gpio-keys"; 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun pinctrl-names = "default"; 49*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_key_gpio_default>; 50*4882a593Smuzhiyun status = "okay"; 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun sw4 { 53*4882a593Smuzhiyun label = "USER_PB1"; 54*4882a593Smuzhiyun gpios = <&pioA PIN_PD0 GPIO_ACTIVE_LOW>; 55*4882a593Smuzhiyun linux,code = <KEY_PROG1>; 56*4882a593Smuzhiyun wakeup-source; 57*4882a593Smuzhiyun }; 58*4882a593Smuzhiyun }; 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun leds { 61*4882a593Smuzhiyun compatible = "gpio-leds"; 62*4882a593Smuzhiyun pinctrl-names = "default"; 63*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_led_gpio_default>; 64*4882a593Smuzhiyun status = "okay"; /* conflict with pwm0 */ 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun red { 67*4882a593Smuzhiyun label = "red"; 68*4882a593Smuzhiyun gpios = <&pioA PIN_PB0 GPIO_ACTIVE_HIGH>; 69*4882a593Smuzhiyun }; 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun green { 72*4882a593Smuzhiyun label = "green"; 73*4882a593Smuzhiyun gpios = <&pioA PIN_PB1 GPIO_ACTIVE_HIGH>; 74*4882a593Smuzhiyun }; 75*4882a593Smuzhiyun 76*4882a593Smuzhiyun blue { 77*4882a593Smuzhiyun label = "blue"; 78*4882a593Smuzhiyun gpios = <&pioA PIN_PA31 GPIO_ACTIVE_HIGH>; 79*4882a593Smuzhiyun linux,default-trigger = "heartbeat"; 80*4882a593Smuzhiyun }; 81*4882a593Smuzhiyun }; 82*4882a593Smuzhiyun}; 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun&adc { 85*4882a593Smuzhiyun vddana-supply = <&vdd_io_reg>; 86*4882a593Smuzhiyun vref-supply = <&vdd_io_reg>; 87*4882a593Smuzhiyun pinctrl-names = "default"; 88*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_adc_default &pinctrl_adtrg_default>; 89*4882a593Smuzhiyun status = "okay"; 90*4882a593Smuzhiyun}; 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun&can0 { 93*4882a593Smuzhiyun pinctrl-names = "default"; 94*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_can0_default>; 95*4882a593Smuzhiyun status = "okay"; 96*4882a593Smuzhiyun}; 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun&can1 { 99*4882a593Smuzhiyun pinctrl-names = "default"; 100*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_can1_default>; 101*4882a593Smuzhiyun status = "okay"; 102*4882a593Smuzhiyun}; 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun&flx0 { /* mikrobus2 spi */ 105*4882a593Smuzhiyun atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_SPI>; 106*4882a593Smuzhiyun status = "okay"; 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun spi2: spi@400 { 109*4882a593Smuzhiyun dmas = <0>, <0>; 110*4882a593Smuzhiyun cs-gpios = <&pioA PIN_PC0 GPIO_ACTIVE_LOW>; 111*4882a593Smuzhiyun pinctrl-names = "default"; 112*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_mikrobus2_spi &pinctrl_ksz_spi_cs>; 113*4882a593Smuzhiyun status = "okay"; 114*4882a593Smuzhiyun #address-cells = <1>; 115*4882a593Smuzhiyun #size-cells = <0>; 116*4882a593Smuzhiyun 117*4882a593Smuzhiyun switch0: ksz8563@0 { 118*4882a593Smuzhiyun compatible = "microchip,ksz8563"; 119*4882a593Smuzhiyun reg = <0>; 120*4882a593Smuzhiyun reset-gpios = <&pioA PIN_PD4 GPIO_ACTIVE_LOW>; 121*4882a593Smuzhiyun 122*4882a593Smuzhiyun spi-max-frequency = <500000>; 123*4882a593Smuzhiyun spi-cpha; 124*4882a593Smuzhiyun spi-cpol; 125*4882a593Smuzhiyun 126*4882a593Smuzhiyun ports { 127*4882a593Smuzhiyun #address-cells = <1>; 128*4882a593Smuzhiyun #size-cells = <0>; 129*4882a593Smuzhiyun port@0 { 130*4882a593Smuzhiyun reg = <0>; 131*4882a593Smuzhiyun label = "lan1"; 132*4882a593Smuzhiyun }; 133*4882a593Smuzhiyun 134*4882a593Smuzhiyun port@1 { 135*4882a593Smuzhiyun reg = <1>; 136*4882a593Smuzhiyun label = "lan2"; 137*4882a593Smuzhiyun }; 138*4882a593Smuzhiyun 139*4882a593Smuzhiyun port@2 { 140*4882a593Smuzhiyun reg = <2>; 141*4882a593Smuzhiyun label = "cpu"; 142*4882a593Smuzhiyun ethernet = <&macb0>; 143*4882a593Smuzhiyun phy-mode = "mii"; 144*4882a593Smuzhiyun fixed-link { 145*4882a593Smuzhiyun speed = <100>; 146*4882a593Smuzhiyun full-duplex; 147*4882a593Smuzhiyun }; 148*4882a593Smuzhiyun }; 149*4882a593Smuzhiyun }; 150*4882a593Smuzhiyun }; 151*4882a593Smuzhiyun }; 152*4882a593Smuzhiyun}; 153*4882a593Smuzhiyun 154*4882a593Smuzhiyun&flx2 { 155*4882a593Smuzhiyun atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>; 156*4882a593Smuzhiyun status = "okay"; 157*4882a593Smuzhiyun 158*4882a593Smuzhiyun uart7: serial@200 { 159*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_flx2_default>; 160*4882a593Smuzhiyun pinctrl-names = "default"; 161*4882a593Smuzhiyun atmel,use-dma-rx; 162*4882a593Smuzhiyun atmel,use-dma-tx; 163*4882a593Smuzhiyun status = "okay"; /* Conflict w/ qspi1. */ 164*4882a593Smuzhiyun }; 165*4882a593Smuzhiyun}; 166*4882a593Smuzhiyun 167*4882a593Smuzhiyun&flx3 { /* mikrobus1 spi */ 168*4882a593Smuzhiyun atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_SPI>; 169*4882a593Smuzhiyun status = "okay"; 170*4882a593Smuzhiyun 171*4882a593Smuzhiyun spi5: spi@400 { 172*4882a593Smuzhiyun dmas = <0>, <0>; 173*4882a593Smuzhiyun pinctrl-names = "default"; 174*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_mikrobus1_spi &pinctrl_mikrobus1_spi_cs>; 175*4882a593Smuzhiyun status = "okay"; 176*4882a593Smuzhiyun }; 177*4882a593Smuzhiyun}; 178*4882a593Smuzhiyun 179*4882a593Smuzhiyun&flx4 { 180*4882a593Smuzhiyun atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>; 181*4882a593Smuzhiyun status = "okay"; 182*4882a593Smuzhiyun 183*4882a593Smuzhiyun i2c6: i2c@600 { 184*4882a593Smuzhiyun dmas = <0>, <0>; 185*4882a593Smuzhiyun pinctrl-names = "default"; 186*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_flx4_default>; 187*4882a593Smuzhiyun status = "okay"; 188*4882a593Smuzhiyun 189*4882a593Smuzhiyun mcp16502@5b { 190*4882a593Smuzhiyun compatible = "microchip,mcp16502"; 191*4882a593Smuzhiyun reg = <0x5b>; 192*4882a593Smuzhiyun status = "okay"; 193*4882a593Smuzhiyun lpm-gpios = <&pioBU 7 GPIO_ACTIVE_LOW>; 194*4882a593Smuzhiyun 195*4882a593Smuzhiyun regulators { 196*4882a593Smuzhiyun vdd_io_reg: VDD_IO { 197*4882a593Smuzhiyun regulator-name = "VDD_IO"; 198*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 199*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 200*4882a593Smuzhiyun regulator-initial-mode = <2>; 201*4882a593Smuzhiyun regulator-allowed-modes = <2>, <4>; 202*4882a593Smuzhiyun regulator-always-on; 203*4882a593Smuzhiyun 204*4882a593Smuzhiyun regulator-state-standby { 205*4882a593Smuzhiyun regulator-on-in-suspend; 206*4882a593Smuzhiyun regulator-mode = <4>; 207*4882a593Smuzhiyun }; 208*4882a593Smuzhiyun 209*4882a593Smuzhiyun regulator-state-mem { 210*4882a593Smuzhiyun regulator-off-in-suspend; 211*4882a593Smuzhiyun regulator-mode = <4>; 212*4882a593Smuzhiyun }; 213*4882a593Smuzhiyun }; 214*4882a593Smuzhiyun 215*4882a593Smuzhiyun VDD_DDR { 216*4882a593Smuzhiyun regulator-name = "VDD_DDR"; 217*4882a593Smuzhiyun regulator-min-microvolt = <1350000>; 218*4882a593Smuzhiyun regulator-max-microvolt = <1350000>; 219*4882a593Smuzhiyun regulator-initial-mode = <2>; 220*4882a593Smuzhiyun regulator-allowed-modes = <2>, <4>; 221*4882a593Smuzhiyun regulator-always-on; 222*4882a593Smuzhiyun 223*4882a593Smuzhiyun regulator-state-standby { 224*4882a593Smuzhiyun regulator-on-in-suspend; 225*4882a593Smuzhiyun regulator-mode = <4>; 226*4882a593Smuzhiyun }; 227*4882a593Smuzhiyun 228*4882a593Smuzhiyun regulator-state-mem { 229*4882a593Smuzhiyun regulator-on-in-suspend; 230*4882a593Smuzhiyun regulator-mode = <4>; 231*4882a593Smuzhiyun }; 232*4882a593Smuzhiyun }; 233*4882a593Smuzhiyun 234*4882a593Smuzhiyun VDD_CORE { 235*4882a593Smuzhiyun regulator-name = "VDD_CORE"; 236*4882a593Smuzhiyun regulator-min-microvolt = <1250000>; 237*4882a593Smuzhiyun regulator-max-microvolt = <1250000>; 238*4882a593Smuzhiyun regulator-initial-mode = <2>; 239*4882a593Smuzhiyun regulator-allowed-modes = <2>, <4>; 240*4882a593Smuzhiyun regulator-always-on; 241*4882a593Smuzhiyun 242*4882a593Smuzhiyun regulator-state-standby { 243*4882a593Smuzhiyun regulator-on-in-suspend; 244*4882a593Smuzhiyun regulator-mode = <4>; 245*4882a593Smuzhiyun }; 246*4882a593Smuzhiyun 247*4882a593Smuzhiyun regulator-state-mem { 248*4882a593Smuzhiyun regulator-off-in-suspend; 249*4882a593Smuzhiyun regulator-mode = <4>; 250*4882a593Smuzhiyun }; 251*4882a593Smuzhiyun }; 252*4882a593Smuzhiyun 253*4882a593Smuzhiyun VDD_OTHER { 254*4882a593Smuzhiyun regulator-name = "VDD_OTHER"; 255*4882a593Smuzhiyun regulator-min-microvolt = <600000>; 256*4882a593Smuzhiyun regulator-max-microvolt = <1850000>; 257*4882a593Smuzhiyun regulator-initial-mode = <2>; 258*4882a593Smuzhiyun regulator-allowed-modes = <2>, <4>; 259*4882a593Smuzhiyun 260*4882a593Smuzhiyun regulator-state-standby { 261*4882a593Smuzhiyun regulator-on-in-suspend; 262*4882a593Smuzhiyun regulator-mode = <4>; 263*4882a593Smuzhiyun }; 264*4882a593Smuzhiyun 265*4882a593Smuzhiyun regulator-state-mem { 266*4882a593Smuzhiyun regulator-off-in-suspend; 267*4882a593Smuzhiyun regulator-mode = <4>; 268*4882a593Smuzhiyun }; 269*4882a593Smuzhiyun }; 270*4882a593Smuzhiyun 271*4882a593Smuzhiyun LDO1 { 272*4882a593Smuzhiyun regulator-name = "LDO1"; 273*4882a593Smuzhiyun regulator-min-microvolt = <2500000>; 274*4882a593Smuzhiyun regulator-max-microvolt = <2500000>; 275*4882a593Smuzhiyun regulator-always-on; 276*4882a593Smuzhiyun 277*4882a593Smuzhiyun regulator-state-standby { 278*4882a593Smuzhiyun regulator-on-in-suspend; 279*4882a593Smuzhiyun }; 280*4882a593Smuzhiyun 281*4882a593Smuzhiyun regulator-state-mem { 282*4882a593Smuzhiyun regulator-off-in-suspend; 283*4882a593Smuzhiyun }; 284*4882a593Smuzhiyun }; 285*4882a593Smuzhiyun 286*4882a593Smuzhiyun LDO2 { 287*4882a593Smuzhiyun regulator-name = "LDO2"; 288*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 289*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 290*4882a593Smuzhiyun regulator-always-on; 291*4882a593Smuzhiyun 292*4882a593Smuzhiyun regulator-state-standby { 293*4882a593Smuzhiyun regulator-on-in-suspend; 294*4882a593Smuzhiyun }; 295*4882a593Smuzhiyun 296*4882a593Smuzhiyun regulator-state-mem { 297*4882a593Smuzhiyun regulator-off-in-suspend; 298*4882a593Smuzhiyun }; 299*4882a593Smuzhiyun }; 300*4882a593Smuzhiyun 301*4882a593Smuzhiyun }; 302*4882a593Smuzhiyun }; 303*4882a593Smuzhiyun }; 304*4882a593Smuzhiyun}; 305*4882a593Smuzhiyun 306*4882a593Smuzhiyun&i2c0 { /* mikrobus i2c */ 307*4882a593Smuzhiyun pinctrl-names = "default"; 308*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_mikrobus_i2c>; 309*4882a593Smuzhiyun status = "okay"; 310*4882a593Smuzhiyun}; 311*4882a593Smuzhiyun 312*4882a593Smuzhiyun&i2c1 { 313*4882a593Smuzhiyun dmas = <0>, <0>; 314*4882a593Smuzhiyun pinctrl-names = "default"; 315*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_i2c1_default>; 316*4882a593Smuzhiyun status = "okay"; 317*4882a593Smuzhiyun 318*4882a593Smuzhiyun eeprom@50 { 319*4882a593Smuzhiyun compatible = "atmel,24c02"; 320*4882a593Smuzhiyun reg = <0x50>; 321*4882a593Smuzhiyun pagesize = <16>; 322*4882a593Smuzhiyun status = "okay"; 323*4882a593Smuzhiyun }; 324*4882a593Smuzhiyun 325*4882a593Smuzhiyun eeprom@52 { 326*4882a593Smuzhiyun compatible = "atmel,24c02"; 327*4882a593Smuzhiyun reg = <0x52>; 328*4882a593Smuzhiyun pagesize = <16>; 329*4882a593Smuzhiyun status = "disabled"; 330*4882a593Smuzhiyun }; 331*4882a593Smuzhiyun 332*4882a593Smuzhiyun eeprom@53 { 333*4882a593Smuzhiyun compatible = "atmel,24c02"; 334*4882a593Smuzhiyun reg = <0x53>; 335*4882a593Smuzhiyun pagesize = <16>; 336*4882a593Smuzhiyun status = "disabled"; 337*4882a593Smuzhiyun }; 338*4882a593Smuzhiyun}; 339*4882a593Smuzhiyun 340*4882a593Smuzhiyun&macb0 { 341*4882a593Smuzhiyun pinctrl-names = "default"; 342*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_macb0_default &pinctrl_macb0_phy_irq &pinctrl_macb0_rst>; 343*4882a593Smuzhiyun phy-mode = "mii"; 344*4882a593Smuzhiyun status = "okay"; 345*4882a593Smuzhiyun 346*4882a593Smuzhiyun fixed-link { 347*4882a593Smuzhiyun speed = <100>; 348*4882a593Smuzhiyun full-duplex; 349*4882a593Smuzhiyun }; 350*4882a593Smuzhiyun}; 351*4882a593Smuzhiyun 352*4882a593Smuzhiyun&pioA { 353*4882a593Smuzhiyun pinctrl_adc_default: adc_default { 354*4882a593Smuzhiyun pinmux = <PIN_PD24__GPIO>, 355*4882a593Smuzhiyun <PIN_PD25__GPIO>, 356*4882a593Smuzhiyun <PIN_PD26__GPIO>; 357*4882a593Smuzhiyun bias-disable; 358*4882a593Smuzhiyun }; 359*4882a593Smuzhiyun 360*4882a593Smuzhiyun /* 361*4882a593Smuzhiyun * The ADTRG pin can work on any edge type. 362*4882a593Smuzhiyun * In here it's being pulled up, so need to 363*4882a593Smuzhiyun * connect it to ground to get an edge e.g. 364*4882a593Smuzhiyun * Trigger can be configured on falling, rise 365*4882a593Smuzhiyun * or any edge, and the pull-up can be changed 366*4882a593Smuzhiyun * to pull-down or left floating according to 367*4882a593Smuzhiyun * needs. 368*4882a593Smuzhiyun */ 369*4882a593Smuzhiyun pinctrl_adtrg_default: adtrg_default { 370*4882a593Smuzhiyun pinmux = <PIN_PD31__ADTRG>; 371*4882a593Smuzhiyun bias-pull-up; 372*4882a593Smuzhiyun }; 373*4882a593Smuzhiyun 374*4882a593Smuzhiyun pinctrl_flx4_default: flx4_default { 375*4882a593Smuzhiyun pinmux = <PIN_PC28__FLEXCOM4_IO0>, 376*4882a593Smuzhiyun <PIN_PC29__FLEXCOM4_IO1>; 377*4882a593Smuzhiyun bias-disable; 378*4882a593Smuzhiyun }; 379*4882a593Smuzhiyun 380*4882a593Smuzhiyun pinctrl_can0_default: can0_default { 381*4882a593Smuzhiyun pinmux = <PIN_PC10__CANTX0>, 382*4882a593Smuzhiyun <PIN_PC11__CANRX0>; 383*4882a593Smuzhiyun bias-disable; 384*4882a593Smuzhiyun }; 385*4882a593Smuzhiyun 386*4882a593Smuzhiyun pinctrl_can1_default: can1_default { 387*4882a593Smuzhiyun pinmux = <PIN_PC26__CANTX1>, 388*4882a593Smuzhiyun <PIN_PC27__CANRX1>; 389*4882a593Smuzhiyun bias-disable; 390*4882a593Smuzhiyun }; 391*4882a593Smuzhiyun 392*4882a593Smuzhiyun pinctrl_i2c1_default: i2c1_default { 393*4882a593Smuzhiyun pinmux = <PIN_PD19__TWD1>, 394*4882a593Smuzhiyun <PIN_PD20__TWCK1>; 395*4882a593Smuzhiyun bias-disable; 396*4882a593Smuzhiyun }; 397*4882a593Smuzhiyun 398*4882a593Smuzhiyun pinctrl_key_gpio_default: key_gpio_default { 399*4882a593Smuzhiyun pinmux = <PIN_PD0__GPIO>; 400*4882a593Smuzhiyun bias-pull-up; 401*4882a593Smuzhiyun }; 402*4882a593Smuzhiyun 403*4882a593Smuzhiyun pinctrl_led_gpio_default: led_gpio_default { 404*4882a593Smuzhiyun pinmux = <PIN_PB0__GPIO>, 405*4882a593Smuzhiyun <PIN_PB1__GPIO>, 406*4882a593Smuzhiyun <PIN_PA31__GPIO>; 407*4882a593Smuzhiyun bias-pull-up; 408*4882a593Smuzhiyun }; 409*4882a593Smuzhiyun 410*4882a593Smuzhiyun pinctrl_qspi1_default: qspi1_default { 411*4882a593Smuzhiyun pinmux = <PIN_PA6__QSPI1_SCK>, 412*4882a593Smuzhiyun <PIN_PA7__QSPI1_IO0>, 413*4882a593Smuzhiyun <PIN_PA8__QSPI1_IO1>, 414*4882a593Smuzhiyun <PIN_PA9__QSPI1_IO2>, 415*4882a593Smuzhiyun <PIN_PA10__QSPI1_IO3>, 416*4882a593Smuzhiyun <PIN_PA11__QSPI1_CS>; 417*4882a593Smuzhiyun bias-disable; 418*4882a593Smuzhiyun }; 419*4882a593Smuzhiyun 420*4882a593Smuzhiyun pinctrl_sdmmc0_default: sdmmc0_default { 421*4882a593Smuzhiyun cmd_data { 422*4882a593Smuzhiyun pinmux = <PIN_PA1__SDMMC0_CMD>, 423*4882a593Smuzhiyun <PIN_PA2__SDMMC0_DAT0>, 424*4882a593Smuzhiyun <PIN_PA3__SDMMC0_DAT1>, 425*4882a593Smuzhiyun <PIN_PA4__SDMMC0_DAT2>, 426*4882a593Smuzhiyun <PIN_PA5__SDMMC0_DAT3>; 427*4882a593Smuzhiyun bias-disable; 428*4882a593Smuzhiyun }; 429*4882a593Smuzhiyun 430*4882a593Smuzhiyun ck_cd { 431*4882a593Smuzhiyun pinmux = <PIN_PA0__SDMMC0_CK>, 432*4882a593Smuzhiyun <PIN_PA13__SDMMC0_CD>; 433*4882a593Smuzhiyun bias-disable; 434*4882a593Smuzhiyun }; 435*4882a593Smuzhiyun }; 436*4882a593Smuzhiyun 437*4882a593Smuzhiyun pinctrl_sdmmc1_default: sdmmc1_default { 438*4882a593Smuzhiyun cmd_data { 439*4882a593Smuzhiyun pinmux = <PIN_PA18__SDMMC1_DAT0>, 440*4882a593Smuzhiyun <PIN_PA19__SDMMC1_DAT1>, 441*4882a593Smuzhiyun <PIN_PA20__SDMMC1_DAT2>, 442*4882a593Smuzhiyun <PIN_PA21__SDMMC1_DAT3>; 443*4882a593Smuzhiyun bias-disable; 444*4882a593Smuzhiyun }; 445*4882a593Smuzhiyun 446*4882a593Smuzhiyun ck_cd { 447*4882a593Smuzhiyun pinmux = <PIN_PA22__SDMMC1_CK>, 448*4882a593Smuzhiyun <PIN_PA28__SDMMC1_CMD>; 449*4882a593Smuzhiyun bias-disable; 450*4882a593Smuzhiyun }; 451*4882a593Smuzhiyun }; 452*4882a593Smuzhiyun 453*4882a593Smuzhiyun pinctrl_mikrobus_i2c: mikrobus_i2c { 454*4882a593Smuzhiyun pinmux = <PIN_PD22__TWCK0>, 455*4882a593Smuzhiyun <PIN_PD21__TWD0>; 456*4882a593Smuzhiyun bias-disable; 457*4882a593Smuzhiyun }; 458*4882a593Smuzhiyun 459*4882a593Smuzhiyun pinctrl_mikrobus1_an: mikrobus1_an { 460*4882a593Smuzhiyun pinmux = <PIN_PD26__GPIO>; 461*4882a593Smuzhiyun bias-disable; 462*4882a593Smuzhiyun }; 463*4882a593Smuzhiyun 464*4882a593Smuzhiyun pinctrl_mikrobus1_rst: mikrobus1_rst { 465*4882a593Smuzhiyun pinmux = <PIN_PC5__GPIO>; 466*4882a593Smuzhiyun bias-disable; 467*4882a593Smuzhiyun }; 468*4882a593Smuzhiyun 469*4882a593Smuzhiyun pinctrl_mikrobus1_spi_cs: mikrobus1_spi_cs { 470*4882a593Smuzhiyun pinmux = <PIN_PC21__FLEXCOM3_IO3>; 471*4882a593Smuzhiyun bias-disable; 472*4882a593Smuzhiyun }; 473*4882a593Smuzhiyun 474*4882a593Smuzhiyun pinctrl_mikrobus1_spi: mikrobus1_spi { 475*4882a593Smuzhiyun pinmux = <PIN_PC20__FLEXCOM3_IO0>, 476*4882a593Smuzhiyun <PIN_PC19__FLEXCOM3_IO1>, 477*4882a593Smuzhiyun <PIN_PC18__FLEXCOM3_IO2>; 478*4882a593Smuzhiyun bias-disable; 479*4882a593Smuzhiyun }; 480*4882a593Smuzhiyun 481*4882a593Smuzhiyun pinctrl_mikrobus1_pwm: mikrobus1_pwm { 482*4882a593Smuzhiyun pinmux = <PIN_PC4__TIOB1>; 483*4882a593Smuzhiyun bias-disable; 484*4882a593Smuzhiyun }; 485*4882a593Smuzhiyun 486*4882a593Smuzhiyun pinctrl_mikrobus1_int: mikrobus1_int { 487*4882a593Smuzhiyun pinmux = <PIN_PC3__GPIO>; 488*4882a593Smuzhiyun bias-disable; 489*4882a593Smuzhiyun }; 490*4882a593Smuzhiyun 491*4882a593Smuzhiyun pinctrl_mikrobus1_uart: mikrobus1_uart { 492*4882a593Smuzhiyun pinmux = <PIN_PB26__URXD0>, 493*4882a593Smuzhiyun <PIN_PB27__UTXD0>; 494*4882a593Smuzhiyun bias-disable; 495*4882a593Smuzhiyun }; 496*4882a593Smuzhiyun 497*4882a593Smuzhiyun pinctrl_mikrobus2_an: mikrobus2_an { 498*4882a593Smuzhiyun pinmux = <PIN_PD25__GPIO>; 499*4882a593Smuzhiyun bias-disable; 500*4882a593Smuzhiyun }; 501*4882a593Smuzhiyun 502*4882a593Smuzhiyun pinctrl_mikrobus2_rst: mikrobus2_rst { 503*4882a593Smuzhiyun pinmux = <PIN_PB24__GPIO>; 504*4882a593Smuzhiyun bias-disable; 505*4882a593Smuzhiyun }; 506*4882a593Smuzhiyun 507*4882a593Smuzhiyun pinctrl_mikrobus2_spi_cs: mikrobus2_spi_cs { 508*4882a593Smuzhiyun pinmux = <PIN_PB31__FLEXCOM0_IO3>; 509*4882a593Smuzhiyun bias-disable; 510*4882a593Smuzhiyun }; 511*4882a593Smuzhiyun 512*4882a593Smuzhiyun pinctrl_mikrobus2_spi: mikrobus2_spi { 513*4882a593Smuzhiyun pinmux = <PIN_PB28__FLEXCOM0_IO0>, 514*4882a593Smuzhiyun <PIN_PB29__FLEXCOM0_IO1>, 515*4882a593Smuzhiyun <PIN_PB30__FLEXCOM0_IO2>; 516*4882a593Smuzhiyun bias-disable; 517*4882a593Smuzhiyun }; 518*4882a593Smuzhiyun 519*4882a593Smuzhiyun pinctrl_ksz_spi_cs: ksz_spi_cs { 520*4882a593Smuzhiyun pinmux = <PIN_PC0__GPIO>; 521*4882a593Smuzhiyun bias-disable; 522*4882a593Smuzhiyun }; 523*4882a593Smuzhiyun 524*4882a593Smuzhiyun pinctrl_mikrobus2_pwm: mikrobus2_pwm { 525*4882a593Smuzhiyun pinmux = <PIN_PB23__TIOB2>; 526*4882a593Smuzhiyun bias-disable; 527*4882a593Smuzhiyun }; 528*4882a593Smuzhiyun 529*4882a593Smuzhiyun pinctrl_mikrobus2_int: mikrobus2_int { 530*4882a593Smuzhiyun pinmux = <PIN_PB22__GPIO>; 531*4882a593Smuzhiyun bias-disable; 532*4882a593Smuzhiyun }; 533*4882a593Smuzhiyun 534*4882a593Smuzhiyun pinctrl_mikrobus2_uart: mikrobus2_uart { 535*4882a593Smuzhiyun pinmux = <PIN_PC12__URXD3>, 536*4882a593Smuzhiyun <PIN_PC13__UTXD3>; 537*4882a593Smuzhiyun bias-disable; 538*4882a593Smuzhiyun }; 539*4882a593Smuzhiyun 540*4882a593Smuzhiyun pinctrl_mikrobus3_an: mikrobus3_an { 541*4882a593Smuzhiyun pinmux = <PIN_PD24__GPIO>; 542*4882a593Smuzhiyun bias-disable; 543*4882a593Smuzhiyun }; 544*4882a593Smuzhiyun 545*4882a593Smuzhiyun pinctrl_mikrobus3_rst: mikrobus3_rst { 546*4882a593Smuzhiyun pinmux = <PIN_PB21__GPIO>; 547*4882a593Smuzhiyun bias-disable; 548*4882a593Smuzhiyun }; 549*4882a593Smuzhiyun 550*4882a593Smuzhiyun pinctrl_mikrobus3_spi_cs: mikrobus3_spi_cs { 551*4882a593Smuzhiyun pinmux = <PIN_PA17__SPI0_NPCS0>; 552*4882a593Smuzhiyun bias-disable; 553*4882a593Smuzhiyun }; 554*4882a593Smuzhiyun 555*4882a593Smuzhiyun pinctrl_mikrobus3_spi: mikrobus3_spi { 556*4882a593Smuzhiyun pinmux = <PIN_PA14__SPI0_SPCK>, 557*4882a593Smuzhiyun <PIN_PA16__SPI0_MISO>, 558*4882a593Smuzhiyun <PIN_PA15__SPI0_MOSI>; 559*4882a593Smuzhiyun bias-disable; 560*4882a593Smuzhiyun }; 561*4882a593Smuzhiyun 562*4882a593Smuzhiyun pinctrl_mikrobus3_pwm: mikrobus3_pwm { 563*4882a593Smuzhiyun pinmux = <PIN_PB20__TIOB3>; 564*4882a593Smuzhiyun bias-disable; 565*4882a593Smuzhiyun }; 566*4882a593Smuzhiyun 567*4882a593Smuzhiyun pinctrl_mikrobus3_int: mikrobus3_int { 568*4882a593Smuzhiyun pinmux = <PIN_PB18__GPIO>; 569*4882a593Smuzhiyun bias-disable; 570*4882a593Smuzhiyun }; 571*4882a593Smuzhiyun 572*4882a593Smuzhiyun pinctrl_mikrobus3_uart: mikrobus3_uart { 573*4882a593Smuzhiyun pinmux = <PIN_PC7__URXD1>, 574*4882a593Smuzhiyun <PIN_PC8__UTXD1>; 575*4882a593Smuzhiyun bias-disable; 576*4882a593Smuzhiyun }; 577*4882a593Smuzhiyun 578*4882a593Smuzhiyun pinctrl_usb_default: usb_default { 579*4882a593Smuzhiyun pinmux = <PIN_PC17__GPIO>; 580*4882a593Smuzhiyun bias-disable; 581*4882a593Smuzhiyun }; 582*4882a593Smuzhiyun 583*4882a593Smuzhiyun pinctrl_usba_vbus: usba_vbus { 584*4882a593Smuzhiyun pinmux = <PIN_PD23__GPIO>; 585*4882a593Smuzhiyun bias-disable; 586*4882a593Smuzhiyun }; 587*4882a593Smuzhiyun 588*4882a593Smuzhiyun pinctrl_pwm0_pwm2_default: pwm0_pwm2_default { 589*4882a593Smuzhiyun pinmux = <PIN_PB5__PWMH2>, 590*4882a593Smuzhiyun <PIN_PB6__PWML2>; 591*4882a593Smuzhiyun bias-pull-up; 592*4882a593Smuzhiyun }; 593*4882a593Smuzhiyun 594*4882a593Smuzhiyun pinctrl_macb0_default: macb0_default { 595*4882a593Smuzhiyun pinmux = <PIN_PD1__GRXCK>, 596*4882a593Smuzhiyun <PIN_PD2__GTXER>, 597*4882a593Smuzhiyun <PIN_PD5__GRX2>, 598*4882a593Smuzhiyun <PIN_PD6__GRX3>, 599*4882a593Smuzhiyun <PIN_PD7__GTX2>, 600*4882a593Smuzhiyun <PIN_PD8__GTX3>, 601*4882a593Smuzhiyun <PIN_PD9__GTXCK>, 602*4882a593Smuzhiyun <PIN_PD10__GTXEN>, 603*4882a593Smuzhiyun <PIN_PD11__GRXDV>, 604*4882a593Smuzhiyun <PIN_PD12__GRXER>, 605*4882a593Smuzhiyun <PIN_PD13__GRX0>, 606*4882a593Smuzhiyun <PIN_PD14__GRX1>, 607*4882a593Smuzhiyun <PIN_PD15__GTX0>, 608*4882a593Smuzhiyun <PIN_PD16__GTX1>, 609*4882a593Smuzhiyun <PIN_PD17__GMDC>, 610*4882a593Smuzhiyun <PIN_PD18__GMDIO>; 611*4882a593Smuzhiyun bias-disable; 612*4882a593Smuzhiyun }; 613*4882a593Smuzhiyun 614*4882a593Smuzhiyun pinctrl_macb0_phy_irq: macb0_phy_irq { 615*4882a593Smuzhiyun pinmux = <PIN_PD3__GPIO>; 616*4882a593Smuzhiyun bias-disable; 617*4882a593Smuzhiyun }; 618*4882a593Smuzhiyun 619*4882a593Smuzhiyun pinctrl_macb0_rst: macb0_sw_rst { 620*4882a593Smuzhiyun pinmux = <PIN_PD4__GPIO>; 621*4882a593Smuzhiyun bias-disable; 622*4882a593Smuzhiyun }; 623*4882a593Smuzhiyun 624*4882a593Smuzhiyun pinctrl_flx2_default: flx2_default { 625*4882a593Smuzhiyun pinmux = <PIN_PA6__FLEXCOM2_IO0>, 626*4882a593Smuzhiyun <PIN_PA7__FLEXCOM2_IO1>, 627*4882a593Smuzhiyun <PIN_PA9__FLEXCOM2_IO3>, 628*4882a593Smuzhiyun <PIN_PA10__FLEXCOM2_IO4>; 629*4882a593Smuzhiyun bias-disable; 630*4882a593Smuzhiyun }; 631*4882a593Smuzhiyun}; 632*4882a593Smuzhiyun 633*4882a593Smuzhiyun&pwm0 { 634*4882a593Smuzhiyun pinctrl-names = "default"; 635*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_pwm0_pwm2_default>; 636*4882a593Smuzhiyun status = "disabled"; /* conflict with leds, HSIC */ 637*4882a593Smuzhiyun}; 638*4882a593Smuzhiyun 639*4882a593Smuzhiyun&qspi1 { 640*4882a593Smuzhiyun pinctrl-names = "default"; 641*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_qspi1_default>; 642*4882a593Smuzhiyun status = "disabled"; /* Conflict with wilc_pwrseq, flx2 */ 643*4882a593Smuzhiyun 644*4882a593Smuzhiyun flash@0 { 645*4882a593Smuzhiyun #address-cells = <1>; 646*4882a593Smuzhiyun #size-cells = <1>; 647*4882a593Smuzhiyun compatible = "jedec,spi-nor"; 648*4882a593Smuzhiyun reg = <0>; 649*4882a593Smuzhiyun spi-max-frequency = <80000000>; 650*4882a593Smuzhiyun spi-tx-bus-width = <4>; 651*4882a593Smuzhiyun spi-rx-bus-width = <4>; 652*4882a593Smuzhiyun m25p,fast-read; 653*4882a593Smuzhiyun 654*4882a593Smuzhiyun at91bootstrap@0 { 655*4882a593Smuzhiyun label = "qspi: at91bootstrap"; 656*4882a593Smuzhiyun reg = <0x00000000 0x00040000>; 657*4882a593Smuzhiyun }; 658*4882a593Smuzhiyun 659*4882a593Smuzhiyun bootloader@40000 { 660*4882a593Smuzhiyun label = "qspi: bootloader"; 661*4882a593Smuzhiyun reg = <0x00040000 0x000c0000>; 662*4882a593Smuzhiyun }; 663*4882a593Smuzhiyun 664*4882a593Smuzhiyun bootloaderenvred@100000 { 665*4882a593Smuzhiyun label = "qspi: bootloader env redundant"; 666*4882a593Smuzhiyun reg = <0x00100000 0x00040000>; 667*4882a593Smuzhiyun }; 668*4882a593Smuzhiyun 669*4882a593Smuzhiyun bootloaderenv@140000 { 670*4882a593Smuzhiyun label = "qspi: bootloader env"; 671*4882a593Smuzhiyun reg = <0x00140000 0x00040000>; 672*4882a593Smuzhiyun }; 673*4882a593Smuzhiyun 674*4882a593Smuzhiyun dtb@180000 { 675*4882a593Smuzhiyun label = "qspi: device tree"; 676*4882a593Smuzhiyun reg = <0x00180000 0x00080000>; 677*4882a593Smuzhiyun }; 678*4882a593Smuzhiyun 679*4882a593Smuzhiyun kernel@200000 { 680*4882a593Smuzhiyun label = "qspi: kernel"; 681*4882a593Smuzhiyun reg = <0x00200000 0x00600000>; 682*4882a593Smuzhiyun }; 683*4882a593Smuzhiyun }; 684*4882a593Smuzhiyun}; 685*4882a593Smuzhiyun 686*4882a593Smuzhiyun&sdmmc0 { 687*4882a593Smuzhiyun no-1-8-v; 688*4882a593Smuzhiyun bus-width = <4>; 689*4882a593Smuzhiyun pinctrl-names = "default"; 690*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_sdmmc0_default>; 691*4882a593Smuzhiyun status = "okay"; 692*4882a593Smuzhiyun}; 693*4882a593Smuzhiyun 694*4882a593Smuzhiyun&shutdown_controller { 695*4882a593Smuzhiyun debounce-delay-us = <976>; 696*4882a593Smuzhiyun atmel,wakeup-rtc-timer; 697*4882a593Smuzhiyun 698*4882a593Smuzhiyun input@0 { 699*4882a593Smuzhiyun reg = <0>; 700*4882a593Smuzhiyun atmel,wakeup-type = "low"; 701*4882a593Smuzhiyun }; 702*4882a593Smuzhiyun}; 703*4882a593Smuzhiyun 704*4882a593Smuzhiyun&spi0 { /* mikrobus3 spi */ 705*4882a593Smuzhiyun pinctrl-names = "default"; 706*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_mikrobus3_spi &pinctrl_mikrobus3_spi_cs>; 707*4882a593Smuzhiyun status = "okay"; 708*4882a593Smuzhiyun}; 709*4882a593Smuzhiyun 710*4882a593Smuzhiyun&tcb0 { 711*4882a593Smuzhiyun timer0: timer@0 { 712*4882a593Smuzhiyun compatible = "atmel,tcb-timer"; 713*4882a593Smuzhiyun reg = <0>; 714*4882a593Smuzhiyun }; 715*4882a593Smuzhiyun 716*4882a593Smuzhiyun timer1: timer@1 { 717*4882a593Smuzhiyun compatible = "atmel,tcb-timer"; 718*4882a593Smuzhiyun reg = <1>; 719*4882a593Smuzhiyun }; 720*4882a593Smuzhiyun}; 721*4882a593Smuzhiyun 722*4882a593Smuzhiyun&uart0 { 723*4882a593Smuzhiyun pinctrl-names = "default"; 724*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_mikrobus1_uart>; 725*4882a593Smuzhiyun atmel,use-dma-rx; 726*4882a593Smuzhiyun atmel,use-dma-tx; 727*4882a593Smuzhiyun status = "okay"; 728*4882a593Smuzhiyun}; 729*4882a593Smuzhiyun 730*4882a593Smuzhiyun&uart1 { 731*4882a593Smuzhiyun pinctrl-names = "default"; 732*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_mikrobus3_uart>; 733*4882a593Smuzhiyun atmel,use-dma-rx; 734*4882a593Smuzhiyun atmel,use-dma-tx; 735*4882a593Smuzhiyun status = "okay"; 736*4882a593Smuzhiyun}; 737*4882a593Smuzhiyun 738*4882a593Smuzhiyun&uart3 { 739*4882a593Smuzhiyun pinctrl-names = "default"; 740*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_mikrobus2_uart>; 741*4882a593Smuzhiyun atmel,use-dma-rx; 742*4882a593Smuzhiyun atmel,use-dma-tx; 743*4882a593Smuzhiyun status = "okay"; 744*4882a593Smuzhiyun}; 745*4882a593Smuzhiyun 746*4882a593Smuzhiyun&usb0 { 747*4882a593Smuzhiyun atmel,vbus-gpio = <&pioA PIN_PD23 GPIO_ACTIVE_HIGH>; 748*4882a593Smuzhiyun pinctrl-names = "default"; 749*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_usba_vbus>; 750*4882a593Smuzhiyun status = "okay"; 751*4882a593Smuzhiyun}; 752*4882a593Smuzhiyun 753*4882a593Smuzhiyun&usb1 { 754*4882a593Smuzhiyun num-ports = <3>; 755*4882a593Smuzhiyun pinctrl-names = "default"; 756*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_usb_default>; 757*4882a593Smuzhiyun status = "okay"; 758*4882a593Smuzhiyun}; 759*4882a593Smuzhiyun 760*4882a593Smuzhiyun&usb2 { 761*4882a593Smuzhiyun phy_type = "hsic"; 762*4882a593Smuzhiyun status = "okay"; 763*4882a593Smuzhiyun}; 764*4882a593Smuzhiyun 765*4882a593Smuzhiyun&watchdog { 766*4882a593Smuzhiyun status = "okay"; 767*4882a593Smuzhiyun}; 768