xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/at91-sama5d27_som1.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * at91-sama5d27_som1.dtsi - Device Tree file for SAMA5D27 SoM1 board
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun *  Copyright (c) 2017, Microchip Technology Inc.
6*4882a593Smuzhiyun *                2017 Cristian Birsan <cristian.birsan@microchip.com>
7*4882a593Smuzhiyun *                2017 Claudiu Beznea <claudiu.beznea@microchip.com>
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun#include "sama5d2.dtsi"
10*4882a593Smuzhiyun#include "sama5d2-pinfunc.h"
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun/ {
13*4882a593Smuzhiyun	model = "Atmel SAMA5D27 SoM1";
14*4882a593Smuzhiyun	compatible = "atmel,sama5d27-som1", "atmel,sama5d27", "atmel,sama5d2", "atmel,sama5";
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun	aliases {
17*4882a593Smuzhiyun		i2c0	= &i2c0;
18*4882a593Smuzhiyun	};
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun	clocks {
21*4882a593Smuzhiyun		slow_xtal {
22*4882a593Smuzhiyun			clock-frequency = <32768>;
23*4882a593Smuzhiyun		};
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun		main_xtal {
26*4882a593Smuzhiyun			clock-frequency = <24000000>;
27*4882a593Smuzhiyun		};
28*4882a593Smuzhiyun	};
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun	ahb {
31*4882a593Smuzhiyun		sdmmc0: sdio-host@a0000000 {
32*4882a593Smuzhiyun			microchip,sdcal-inverted;
33*4882a593Smuzhiyun		};
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun		apb {
36*4882a593Smuzhiyun			qspi1: spi@f0024000 {
37*4882a593Smuzhiyun				pinctrl-names = "default";
38*4882a593Smuzhiyun				pinctrl-0 = <&pinctrl_qspi1_default>;
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun				flash@0 {
41*4882a593Smuzhiyun					#address-cells = <1>;
42*4882a593Smuzhiyun					#size-cells = <1>;
43*4882a593Smuzhiyun					compatible = "jedec,spi-nor";
44*4882a593Smuzhiyun					reg = <0>;
45*4882a593Smuzhiyun					spi-max-frequency = <80000000>;
46*4882a593Smuzhiyun					spi-tx-bus-width = <4>;
47*4882a593Smuzhiyun					spi-rx-bus-width = <4>;
48*4882a593Smuzhiyun					m25p,fast-read;
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun					at91bootstrap@00000000 {
51*4882a593Smuzhiyun						label = "at91bootstrap";
52*4882a593Smuzhiyun						reg = <0x00000000 0x00040000>;
53*4882a593Smuzhiyun					};
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun					bootloader@00040000 {
56*4882a593Smuzhiyun						label = "bootloader";
57*4882a593Smuzhiyun						reg = <0x00040000 0x000c0000>;
58*4882a593Smuzhiyun					};
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun					bootloaderenvred@00100000 {
61*4882a593Smuzhiyun						label = "bootloader env redundant";
62*4882a593Smuzhiyun						reg = <0x00100000 0x00040000>;
63*4882a593Smuzhiyun					};
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun					bootloaderenv@00140000 {
66*4882a593Smuzhiyun						label = "bootloader env";
67*4882a593Smuzhiyun						reg = <0x00140000 0x00040000>;
68*4882a593Smuzhiyun					};
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun					dtb@00180000 {
71*4882a593Smuzhiyun						label = "device tree";
72*4882a593Smuzhiyun						reg = <0x00180000 0x00080000>;
73*4882a593Smuzhiyun					};
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun					kernel@00200000 {
76*4882a593Smuzhiyun						label = "kernel";
77*4882a593Smuzhiyun						reg = <0x00200000 0x00600000>;
78*4882a593Smuzhiyun					};
79*4882a593Smuzhiyun				};
80*4882a593Smuzhiyun			};
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun			macb0: ethernet@f8008000 {
83*4882a593Smuzhiyun				pinctrl-names = "default";
84*4882a593Smuzhiyun				pinctrl-0 = <&pinctrl_macb0_default>;
85*4882a593Smuzhiyun				phy-mode = "rmii";
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun				ethernet-phy@7 {
88*4882a593Smuzhiyun					reg = <0x7>;
89*4882a593Smuzhiyun					interrupt-parent = <&pioA>;
90*4882a593Smuzhiyun					interrupts = <PIN_PD31 IRQ_TYPE_LEVEL_LOW>;
91*4882a593Smuzhiyun					pinctrl-names = "default";
92*4882a593Smuzhiyun					pinctrl-0 = <&pinctrl_macb0_phy_irq>;
93*4882a593Smuzhiyun				};
94*4882a593Smuzhiyun			};
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun			i2c0: i2c@f8028000 {
97*4882a593Smuzhiyun				dmas = <0>, <0>;
98*4882a593Smuzhiyun				pinctrl-names = "default";
99*4882a593Smuzhiyun				pinctrl-0 = <&pinctrl_i2c0_default>;
100*4882a593Smuzhiyun				status = "okay";
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun				at24@50 {
103*4882a593Smuzhiyun					compatible = "24c02";
104*4882a593Smuzhiyun					reg = <0x50>;
105*4882a593Smuzhiyun					pagesize = <8>;
106*4882a593Smuzhiyun				};
107*4882a593Smuzhiyun			};
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun			pinctrl@fc038000 {
110*4882a593Smuzhiyun				pinctrl_i2c0_default: i2c0_default {
111*4882a593Smuzhiyun					pinmux = <PIN_PD21__TWD0>,
112*4882a593Smuzhiyun						 <PIN_PD22__TWCK0>;
113*4882a593Smuzhiyun					bias-disable;
114*4882a593Smuzhiyun				};
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun				pinctrl_qspi1_default: qspi1_default {
117*4882a593Smuzhiyun					sck_cs {
118*4882a593Smuzhiyun						pinmux = <PIN_PB5__QSPI1_SCK>,
119*4882a593Smuzhiyun							 <PIN_PB6__QSPI1_CS>;
120*4882a593Smuzhiyun						bias-disable;
121*4882a593Smuzhiyun					};
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun					data {
124*4882a593Smuzhiyun						pinmux = <PIN_PB7__QSPI1_IO0>,
125*4882a593Smuzhiyun							 <PIN_PB8__QSPI1_IO1>,
126*4882a593Smuzhiyun							 <PIN_PB9__QSPI1_IO2>,
127*4882a593Smuzhiyun							 <PIN_PB10__QSPI1_IO3>;
128*4882a593Smuzhiyun						bias-pull-up;
129*4882a593Smuzhiyun					};
130*4882a593Smuzhiyun				};
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun				pinctrl_macb0_default: macb0_default {
133*4882a593Smuzhiyun					pinmux = <PIN_PD9__GTXCK>,
134*4882a593Smuzhiyun						 <PIN_PD10__GTXEN>,
135*4882a593Smuzhiyun						 <PIN_PD11__GRXDV>,
136*4882a593Smuzhiyun						 <PIN_PD12__GRXER>,
137*4882a593Smuzhiyun						 <PIN_PD13__GRX0>,
138*4882a593Smuzhiyun						 <PIN_PD14__GRX1>,
139*4882a593Smuzhiyun						 <PIN_PD15__GTX0>,
140*4882a593Smuzhiyun						 <PIN_PD16__GTX1>,
141*4882a593Smuzhiyun						 <PIN_PD17__GMDC>,
142*4882a593Smuzhiyun						 <PIN_PD18__GMDIO>;
143*4882a593Smuzhiyun					bias-disable;
144*4882a593Smuzhiyun				};
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun				pinctrl_macb0_phy_irq: macb0_phy_irq {
147*4882a593Smuzhiyun					pinmux = <PIN_PD31__GPIO>;
148*4882a593Smuzhiyun					bias-disable;
149*4882a593Smuzhiyun				};
150*4882a593Smuzhiyun			};
151*4882a593Smuzhiyun		};
152*4882a593Smuzhiyun	};
153*4882a593Smuzhiyun};
154