1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * at91-sam9x60ek.dts - Device Tree file for Microchip SAM9X60-EK board 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2019 Microchip Technology Inc. and its subsidiaries 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * Author: Sandeep Sheriker M <sandeepsheriker.mallikarjun@microchip.com> 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun/dts-v1/; 10*4882a593Smuzhiyun#include "sam9x60.dtsi" 11*4882a593Smuzhiyun#include <dt-bindings/input/input.h> 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun/ { 14*4882a593Smuzhiyun model = "Microchip SAM9X60-EK"; 15*4882a593Smuzhiyun compatible = "microchip,sam9x60ek", "microchip,sam9x60", "atmel,at91sam9"; 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun aliases { 18*4882a593Smuzhiyun i2c0 = &i2c0; 19*4882a593Smuzhiyun i2c1 = &i2c1; 20*4882a593Smuzhiyun serial1 = &uart1; 21*4882a593Smuzhiyun }; 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun chosen { 24*4882a593Smuzhiyun stdout-path = "serial0:115200n8"; 25*4882a593Smuzhiyun }; 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun clocks { 28*4882a593Smuzhiyun slow_xtal { 29*4882a593Smuzhiyun clock-frequency = <32768>; 30*4882a593Smuzhiyun }; 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun main_xtal { 33*4882a593Smuzhiyun clock-frequency = <24000000>; 34*4882a593Smuzhiyun }; 35*4882a593Smuzhiyun }; 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun regulators: regulators { 38*4882a593Smuzhiyun compatible = "simple-bus"; 39*4882a593Smuzhiyun #address-cells = <1>; 40*4882a593Smuzhiyun #size-cells = <0>; 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun vdd_1v8: fixed-regulator-vdd_1v8@0 { 43*4882a593Smuzhiyun compatible = "regulator-fixed"; 44*4882a593Smuzhiyun regulator-name = "VDD_1V8"; 45*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 46*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 47*4882a593Smuzhiyun regulator-always-on; 48*4882a593Smuzhiyun status = "okay"; 49*4882a593Smuzhiyun }; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun vdd_1v5: fixed-regulator-vdd_1v5@1 { 52*4882a593Smuzhiyun compatible = "regulator-fixed"; 53*4882a593Smuzhiyun regulator-name = "VDD_1V5"; 54*4882a593Smuzhiyun regulator-min-microvolt = <1500000>; 55*4882a593Smuzhiyun regulator-max-microvolt = <1500000>; 56*4882a593Smuzhiyun regulator-always-on; 57*4882a593Smuzhiyun status = "okay"; 58*4882a593Smuzhiyun }; 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun vdd1_3v3: fixed-regulator-vdd1_3v3@2 { 61*4882a593Smuzhiyun compatible = "regulator-fixed"; 62*4882a593Smuzhiyun regulator-name = "VDD1_3V3"; 63*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 64*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 65*4882a593Smuzhiyun regulator-always-on; 66*4882a593Smuzhiyun status = "okay"; 67*4882a593Smuzhiyun }; 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun vdd2_3v3: regulator-fixed-vdd2_3v3@3 { 70*4882a593Smuzhiyun compatible = "regulator-fixed"; 71*4882a593Smuzhiyun regulator-name = "VDD2_3V3"; 72*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 73*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 74*4882a593Smuzhiyun regulator-always-on; 75*4882a593Smuzhiyun status = "okay"; 76*4882a593Smuzhiyun }; 77*4882a593Smuzhiyun }; 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun gpio_keys { 80*4882a593Smuzhiyun compatible = "gpio-keys"; 81*4882a593Smuzhiyun pinctrl-names = "default"; 82*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_key_gpio_default>; 83*4882a593Smuzhiyun status = "okay"; 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun sw1 { 86*4882a593Smuzhiyun label = "SW1"; 87*4882a593Smuzhiyun gpios = <&pioD 18 GPIO_ACTIVE_LOW>; 88*4882a593Smuzhiyun linux,code=<KEY_PROG1>; 89*4882a593Smuzhiyun wakeup-source; 90*4882a593Smuzhiyun }; 91*4882a593Smuzhiyun }; 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun leds { 94*4882a593Smuzhiyun compatible = "gpio-leds"; 95*4882a593Smuzhiyun pinctrl-names = "default"; 96*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_gpio_leds>; 97*4882a593Smuzhiyun status = "okay"; /* Conflict with pwm0. */ 98*4882a593Smuzhiyun 99*4882a593Smuzhiyun red { 100*4882a593Smuzhiyun label = "red"; 101*4882a593Smuzhiyun gpios = <&pioB 11 GPIO_ACTIVE_HIGH>; 102*4882a593Smuzhiyun }; 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun green { 105*4882a593Smuzhiyun label = "green"; 106*4882a593Smuzhiyun gpios = <&pioB 12 GPIO_ACTIVE_HIGH>; 107*4882a593Smuzhiyun }; 108*4882a593Smuzhiyun 109*4882a593Smuzhiyun blue { 110*4882a593Smuzhiyun label = "blue"; 111*4882a593Smuzhiyun gpios = <&pioB 13 GPIO_ACTIVE_HIGH>; 112*4882a593Smuzhiyun linux,default-trigger = "heartbeat"; 113*4882a593Smuzhiyun }; 114*4882a593Smuzhiyun }; 115*4882a593Smuzhiyun}; 116*4882a593Smuzhiyun 117*4882a593Smuzhiyun&adc { 118*4882a593Smuzhiyun vddana-supply = <&vdd1_3v3>; 119*4882a593Smuzhiyun vref-supply = <&vdd1_3v3>; 120*4882a593Smuzhiyun pinctrl-names = "default"; 121*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_adc_default &pinctrl_adtrg_default>; 122*4882a593Smuzhiyun status = "okay"; 123*4882a593Smuzhiyun}; 124*4882a593Smuzhiyun 125*4882a593Smuzhiyun&can0 { 126*4882a593Smuzhiyun pinctrl-names = "default"; 127*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_can0_rx_tx>; 128*4882a593Smuzhiyun status = "disabled"; /* Conflict with dbgu. */ 129*4882a593Smuzhiyun}; 130*4882a593Smuzhiyun 131*4882a593Smuzhiyun&can1 { 132*4882a593Smuzhiyun pinctrl-names = "default"; 133*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_can1_rx_tx>; 134*4882a593Smuzhiyun status = "okay"; 135*4882a593Smuzhiyun}; 136*4882a593Smuzhiyun 137*4882a593Smuzhiyun&classd { 138*4882a593Smuzhiyun pinctrl-names = "default"; 139*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_classd_default>; 140*4882a593Smuzhiyun atmel,pwm-type = "diff"; 141*4882a593Smuzhiyun atmel,non-overlap-time = <10>; 142*4882a593Smuzhiyun status = "okay"; 143*4882a593Smuzhiyun}; 144*4882a593Smuzhiyun 145*4882a593Smuzhiyun&dbgu { 146*4882a593Smuzhiyun pinctrl-names = "default"; 147*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_dbgu>; 148*4882a593Smuzhiyun status = "okay"; /* Conflict with can0. */ 149*4882a593Smuzhiyun}; 150*4882a593Smuzhiyun 151*4882a593Smuzhiyun&ebi { 152*4882a593Smuzhiyun pinctrl-names = "default"; 153*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_ebi_addr_nand &pinctrl_ebi_data_0_7>; 154*4882a593Smuzhiyun status = "okay"; 155*4882a593Smuzhiyun 156*4882a593Smuzhiyun nand_controller: nand-controller { 157*4882a593Smuzhiyun pinctrl-names = "default"; 158*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_nand_oe_we &pinctrl_nand_cs &pinctrl_nand_rb>; 159*4882a593Smuzhiyun status = "okay"; 160*4882a593Smuzhiyun 161*4882a593Smuzhiyun nand@3 { 162*4882a593Smuzhiyun reg = <0x3 0x0 0x800000>; 163*4882a593Smuzhiyun rb-gpios = <&pioD 5 GPIO_ACTIVE_HIGH>; 164*4882a593Smuzhiyun cs-gpios = <&pioD 4 GPIO_ACTIVE_HIGH>; 165*4882a593Smuzhiyun nand-bus-width = <8>; 166*4882a593Smuzhiyun nand-ecc-mode = "hw"; 167*4882a593Smuzhiyun nand-ecc-strength = <8>; 168*4882a593Smuzhiyun nand-ecc-step-size = <512>; 169*4882a593Smuzhiyun nand-on-flash-bbt; 170*4882a593Smuzhiyun label = "atmel_nand"; 171*4882a593Smuzhiyun 172*4882a593Smuzhiyun partitions { 173*4882a593Smuzhiyun compatible = "fixed-partitions"; 174*4882a593Smuzhiyun #address-cells = <1>; 175*4882a593Smuzhiyun #size-cells = <1>; 176*4882a593Smuzhiyun 177*4882a593Smuzhiyun at91bootstrap@0 { 178*4882a593Smuzhiyun label = "at91bootstrap"; 179*4882a593Smuzhiyun reg = <0x0 0x40000>; 180*4882a593Smuzhiyun }; 181*4882a593Smuzhiyun 182*4882a593Smuzhiyun uboot@40000 { 183*4882a593Smuzhiyun label = "u-boot"; 184*4882a593Smuzhiyun reg = <0x40000 0xc0000>; 185*4882a593Smuzhiyun }; 186*4882a593Smuzhiyun 187*4882a593Smuzhiyun ubootenvred@100000 { 188*4882a593Smuzhiyun label = "U-Boot Env Redundant"; 189*4882a593Smuzhiyun reg = <0x100000 0x40000>; 190*4882a593Smuzhiyun }; 191*4882a593Smuzhiyun 192*4882a593Smuzhiyun ubootenv@140000 { 193*4882a593Smuzhiyun label = "U-Boot Env"; 194*4882a593Smuzhiyun reg = <0x140000 0x40000>; 195*4882a593Smuzhiyun }; 196*4882a593Smuzhiyun 197*4882a593Smuzhiyun dtb@180000 { 198*4882a593Smuzhiyun label = "device tree"; 199*4882a593Smuzhiyun reg = <0x180000 0x80000>; 200*4882a593Smuzhiyun }; 201*4882a593Smuzhiyun 202*4882a593Smuzhiyun kernel@200000 { 203*4882a593Smuzhiyun label = "kernel"; 204*4882a593Smuzhiyun reg = <0x200000 0x600000>; 205*4882a593Smuzhiyun }; 206*4882a593Smuzhiyun 207*4882a593Smuzhiyun rootfs@800000 { 208*4882a593Smuzhiyun label = "rootfs"; 209*4882a593Smuzhiyun reg = <0x800000 0x1f800000>; 210*4882a593Smuzhiyun }; 211*4882a593Smuzhiyun }; 212*4882a593Smuzhiyun }; 213*4882a593Smuzhiyun }; 214*4882a593Smuzhiyun}; 215*4882a593Smuzhiyun 216*4882a593Smuzhiyun&flx0 { 217*4882a593Smuzhiyun atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>; 218*4882a593Smuzhiyun status = "okay"; 219*4882a593Smuzhiyun 220*4882a593Smuzhiyun i2c0: i2c@600 { 221*4882a593Smuzhiyun compatible = "microchip,sam9x60-i2c"; 222*4882a593Smuzhiyun reg = <0x600 0x200>; 223*4882a593Smuzhiyun interrupts = <5 IRQ_TYPE_LEVEL_HIGH 7>; 224*4882a593Smuzhiyun #address-cells = <1>; 225*4882a593Smuzhiyun #size-cells = <0>; 226*4882a593Smuzhiyun clocks = <&pmc PMC_TYPE_PERIPHERAL 5>; 227*4882a593Smuzhiyun pinctrl-names = "default"; 228*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_flx0_default>; 229*4882a593Smuzhiyun atmel,fifo-size = <16>; 230*4882a593Smuzhiyun i2c-analog-filter; 231*4882a593Smuzhiyun i2c-digital-filter; 232*4882a593Smuzhiyun i2c-digital-filter-width-ns = <35>; 233*4882a593Smuzhiyun status = "okay"; 234*4882a593Smuzhiyun 235*4882a593Smuzhiyun eeprom@53 { 236*4882a593Smuzhiyun compatible = "atmel,24c02"; 237*4882a593Smuzhiyun reg = <0x53>; 238*4882a593Smuzhiyun pagesize = <16>; 239*4882a593Smuzhiyun status = "okay"; 240*4882a593Smuzhiyun }; 241*4882a593Smuzhiyun }; 242*4882a593Smuzhiyun}; 243*4882a593Smuzhiyun 244*4882a593Smuzhiyun&flx4 { 245*4882a593Smuzhiyun atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_SPI>; 246*4882a593Smuzhiyun status = "disabled"; 247*4882a593Smuzhiyun 248*4882a593Smuzhiyun spi0: spi@400 { 249*4882a593Smuzhiyun compatible = "microchip,sam9x60-spi", "atmel,at91rm9200-spi"; 250*4882a593Smuzhiyun reg = <0x400 0x200>; 251*4882a593Smuzhiyun interrupts = <13 IRQ_TYPE_LEVEL_HIGH 7>; 252*4882a593Smuzhiyun clocks = <&pmc PMC_TYPE_PERIPHERAL 13>; 253*4882a593Smuzhiyun clock-names = "spi_clk"; 254*4882a593Smuzhiyun pinctrl-names = "default"; 255*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_flx4_default>; 256*4882a593Smuzhiyun atmel,fifo-size = <16>; 257*4882a593Smuzhiyun #address-cells = <1>; 258*4882a593Smuzhiyun #size-cells = <0>; 259*4882a593Smuzhiyun status = "disabled"; 260*4882a593Smuzhiyun }; 261*4882a593Smuzhiyun}; 262*4882a593Smuzhiyun 263*4882a593Smuzhiyun&flx5 { 264*4882a593Smuzhiyun atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>; 265*4882a593Smuzhiyun status = "okay"; 266*4882a593Smuzhiyun 267*4882a593Smuzhiyun uart1: serial@200 { 268*4882a593Smuzhiyun compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; 269*4882a593Smuzhiyun reg = <0x200 0x200>; 270*4882a593Smuzhiyun interrupts = <14 IRQ_TYPE_LEVEL_HIGH 7>; 271*4882a593Smuzhiyun dmas = <&dma0 272*4882a593Smuzhiyun (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | 273*4882a593Smuzhiyun AT91_XDMAC_DT_PERID(10))>, 274*4882a593Smuzhiyun <&dma0 275*4882a593Smuzhiyun (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | 276*4882a593Smuzhiyun AT91_XDMAC_DT_PERID(11))>; 277*4882a593Smuzhiyun dma-names = "tx", "rx"; 278*4882a593Smuzhiyun clocks = <&pmc PMC_TYPE_PERIPHERAL 14>; 279*4882a593Smuzhiyun clock-names = "usart"; 280*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_flx5_default>; 281*4882a593Smuzhiyun pinctrl-names = "default"; 282*4882a593Smuzhiyun atmel,use-dma-rx; 283*4882a593Smuzhiyun atmel,use-dma-tx; 284*4882a593Smuzhiyun status = "okay"; 285*4882a593Smuzhiyun }; 286*4882a593Smuzhiyun}; 287*4882a593Smuzhiyun 288*4882a593Smuzhiyun&flx6 { 289*4882a593Smuzhiyun atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>; 290*4882a593Smuzhiyun status = "okay"; 291*4882a593Smuzhiyun 292*4882a593Smuzhiyun i2c1: i2c@600 { 293*4882a593Smuzhiyun compatible = "microchip,sam9x60-i2c"; 294*4882a593Smuzhiyun reg = <0x600 0x200>; 295*4882a593Smuzhiyun interrupts = <9 IRQ_TYPE_LEVEL_HIGH 7>; 296*4882a593Smuzhiyun #address-cells = <1>; 297*4882a593Smuzhiyun #size-cells = <0>; 298*4882a593Smuzhiyun clocks = <&pmc PMC_TYPE_PERIPHERAL 9>; 299*4882a593Smuzhiyun pinctrl-names = "default"; 300*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_flx6_default>; 301*4882a593Smuzhiyun atmel,fifo-size = <16>; 302*4882a593Smuzhiyun i2c-analog-filter; 303*4882a593Smuzhiyun i2c-digital-filter; 304*4882a593Smuzhiyun i2c-digital-filter-width-ns = <35>; 305*4882a593Smuzhiyun status = "okay"; 306*4882a593Smuzhiyun 307*4882a593Smuzhiyun gpio_exp: mcp23008@20 { 308*4882a593Smuzhiyun compatible = "microchip,mcp23008"; 309*4882a593Smuzhiyun reg = <0x20>; 310*4882a593Smuzhiyun }; 311*4882a593Smuzhiyun }; 312*4882a593Smuzhiyun}; 313*4882a593Smuzhiyun 314*4882a593Smuzhiyun&gpbr { 315*4882a593Smuzhiyun status = "okay"; 316*4882a593Smuzhiyun}; 317*4882a593Smuzhiyun 318*4882a593Smuzhiyun&i2s { 319*4882a593Smuzhiyun pinctrl-names = "default"; 320*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_i2s_default>; 321*4882a593Smuzhiyun #sound-dai-cells = <0>; 322*4882a593Smuzhiyun status = "disabled"; /* Conflict with QSPI. */ 323*4882a593Smuzhiyun}; 324*4882a593Smuzhiyun 325*4882a593Smuzhiyun&macb0 { 326*4882a593Smuzhiyun phy-mode = "rmii"; 327*4882a593Smuzhiyun #address-cells = <1>; 328*4882a593Smuzhiyun #size-cells = <0>; 329*4882a593Smuzhiyun pinctrl-names = "default"; 330*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_macb0_rmii>; 331*4882a593Smuzhiyun status = "okay"; 332*4882a593Smuzhiyun 333*4882a593Smuzhiyun ethernet-phy@0 { 334*4882a593Smuzhiyun reg = <0x0>; 335*4882a593Smuzhiyun }; 336*4882a593Smuzhiyun}; 337*4882a593Smuzhiyun 338*4882a593Smuzhiyun&pinctrl { 339*4882a593Smuzhiyun adc { 340*4882a593Smuzhiyun pinctrl_adc_default: adc_default { 341*4882a593Smuzhiyun atmel,pins = <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; 342*4882a593Smuzhiyun }; 343*4882a593Smuzhiyun 344*4882a593Smuzhiyun pinctrl_adtrg_default: adtrg_default { 345*4882a593Smuzhiyun atmel,pins = <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; 346*4882a593Smuzhiyun }; 347*4882a593Smuzhiyun }; 348*4882a593Smuzhiyun 349*4882a593Smuzhiyun dbgu { 350*4882a593Smuzhiyun pinctrl_dbgu: dbgu-0 { 351*4882a593Smuzhiyun atmel,pins = <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP 352*4882a593Smuzhiyun AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; 353*4882a593Smuzhiyun }; 354*4882a593Smuzhiyun }; 355*4882a593Smuzhiyun 356*4882a593Smuzhiyun i2s { 357*4882a593Smuzhiyun pinctrl_i2s_default: i2s { 358*4882a593Smuzhiyun atmel,pins = 359*4882a593Smuzhiyun <AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE /* I2SCK */ 360*4882a593Smuzhiyun AT91_PIOB 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* I2SWS */ 361*4882a593Smuzhiyun AT91_PIOB 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* I2SDIN */ 362*4882a593Smuzhiyun AT91_PIOB 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* I2SDOUT */ 363*4882a593Smuzhiyun AT91_PIOB 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* I2SMCK */ 364*4882a593Smuzhiyun }; 365*4882a593Smuzhiyun }; 366*4882a593Smuzhiyun 367*4882a593Smuzhiyun qspi { 368*4882a593Smuzhiyun pinctrl_qspi: qspi { 369*4882a593Smuzhiyun atmel,pins = 370*4882a593Smuzhiyun <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_SLEWRATE_DIS 371*4882a593Smuzhiyun AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_SLEWRATE_DIS 372*4882a593Smuzhiyun AT91_PIOB 21 AT91_PERIPH_A (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_SLEWRATE_DIS) 373*4882a593Smuzhiyun AT91_PIOB 22 AT91_PERIPH_A (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_SLEWRATE_DIS) 374*4882a593Smuzhiyun AT91_PIOB 23 AT91_PERIPH_A (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_SLEWRATE_DIS) 375*4882a593Smuzhiyun AT91_PIOB 24 AT91_PERIPH_A (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_SLEWRATE_DIS)>; 376*4882a593Smuzhiyun }; 377*4882a593Smuzhiyun }; 378*4882a593Smuzhiyun 379*4882a593Smuzhiyun nand { 380*4882a593Smuzhiyun pinctrl_nand_oe_we: nand-oe-we-0 { 381*4882a593Smuzhiyun atmel,pins = 382*4882a593Smuzhiyun <AT91_PIOD 0 AT91_PERIPH_A (AT91_PINCTRL_NONE | AT91_PINCTRL_SLEWRATE_DIS) 383*4882a593Smuzhiyun AT91_PIOD 1 AT91_PERIPH_A (AT91_PINCTRL_NONE | AT91_PINCTRL_SLEWRATE_DIS)>; 384*4882a593Smuzhiyun }; 385*4882a593Smuzhiyun 386*4882a593Smuzhiyun pinctrl_nand_rb: nand-rb-0 { 387*4882a593Smuzhiyun atmel,pins = 388*4882a593Smuzhiyun <AT91_PIOD 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; 389*4882a593Smuzhiyun }; 390*4882a593Smuzhiyun 391*4882a593Smuzhiyun pinctrl_nand_cs: nand-cs-0 { 392*4882a593Smuzhiyun atmel,pins = 393*4882a593Smuzhiyun <AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; 394*4882a593Smuzhiyun }; 395*4882a593Smuzhiyun }; 396*4882a593Smuzhiyun 397*4882a593Smuzhiyun ebi { 398*4882a593Smuzhiyun pinctrl_ebi_data_0_7: ebi-data-lsb-0 { 399*4882a593Smuzhiyun atmel,pins = 400*4882a593Smuzhiyun <AT91_PIOD 6 AT91_PERIPH_A (AT91_PINCTRL_NONE | AT91_PINCTRL_SLEWRATE_DIS) 401*4882a593Smuzhiyun AT91_PIOD 7 AT91_PERIPH_A (AT91_PINCTRL_NONE | AT91_PINCTRL_SLEWRATE_DIS) 402*4882a593Smuzhiyun AT91_PIOD 8 AT91_PERIPH_A (AT91_PINCTRL_NONE | AT91_PINCTRL_SLEWRATE_DIS) 403*4882a593Smuzhiyun AT91_PIOD 9 AT91_PERIPH_A (AT91_PINCTRL_NONE | AT91_PINCTRL_SLEWRATE_DIS) 404*4882a593Smuzhiyun AT91_PIOD 10 AT91_PERIPH_A (AT91_PINCTRL_NONE | AT91_PINCTRL_SLEWRATE_DIS) 405*4882a593Smuzhiyun AT91_PIOD 11 AT91_PERIPH_A (AT91_PINCTRL_NONE | AT91_PINCTRL_SLEWRATE_DIS) 406*4882a593Smuzhiyun AT91_PIOD 12 AT91_PERIPH_A (AT91_PINCTRL_NONE | AT91_PINCTRL_SLEWRATE_DIS) 407*4882a593Smuzhiyun AT91_PIOD 13 AT91_PERIPH_A (AT91_PINCTRL_NONE | AT91_PINCTRL_SLEWRATE_DIS)>; 408*4882a593Smuzhiyun }; 409*4882a593Smuzhiyun 410*4882a593Smuzhiyun pinctrl_ebi_data_0_15: ebi-data-msb-0 { 411*4882a593Smuzhiyun atmel,pins = 412*4882a593Smuzhiyun <AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE 413*4882a593Smuzhiyun AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE 414*4882a593Smuzhiyun AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_NONE 415*4882a593Smuzhiyun AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE 416*4882a593Smuzhiyun AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE 417*4882a593Smuzhiyun AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE 418*4882a593Smuzhiyun AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE 419*4882a593Smuzhiyun AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE 420*4882a593Smuzhiyun AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE 421*4882a593Smuzhiyun AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE 422*4882a593Smuzhiyun AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE 423*4882a593Smuzhiyun AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE 424*4882a593Smuzhiyun AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE 425*4882a593Smuzhiyun AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE 426*4882a593Smuzhiyun AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE 427*4882a593Smuzhiyun AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; 428*4882a593Smuzhiyun }; 429*4882a593Smuzhiyun 430*4882a593Smuzhiyun pinctrl_ebi_addr_nand: ebi-addr-0 { 431*4882a593Smuzhiyun atmel,pins = 432*4882a593Smuzhiyun <AT91_PIOD 2 AT91_PERIPH_A (AT91_PINCTRL_NONE | AT91_PINCTRL_SLEWRATE_DIS) 433*4882a593Smuzhiyun AT91_PIOD 3 AT91_PERIPH_A (AT91_PINCTRL_NONE | AT91_PINCTRL_SLEWRATE_DIS)>; 434*4882a593Smuzhiyun }; 435*4882a593Smuzhiyun }; 436*4882a593Smuzhiyun 437*4882a593Smuzhiyun flexcom { 438*4882a593Smuzhiyun pinctrl_flx0_default: flx0_twi { 439*4882a593Smuzhiyun atmel,pins = 440*4882a593Smuzhiyun <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP 441*4882a593Smuzhiyun AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; 442*4882a593Smuzhiyun }; 443*4882a593Smuzhiyun 444*4882a593Smuzhiyun pinctrl_flx4_default: flx4_spi { 445*4882a593Smuzhiyun atmel,pins = 446*4882a593Smuzhiyun <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE 447*4882a593Smuzhiyun AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE 448*4882a593Smuzhiyun AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE 449*4882a593Smuzhiyun AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; 450*4882a593Smuzhiyun }; 451*4882a593Smuzhiyun 452*4882a593Smuzhiyun pinctrl_flx5_default: flx_uart { 453*4882a593Smuzhiyun atmel,pins = 454*4882a593Smuzhiyun <AT91_PIOA 7 AT91_PERIPH_C AT91_PINCTRL_NONE 455*4882a593Smuzhiyun AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_NONE 456*4882a593Smuzhiyun AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE 457*4882a593Smuzhiyun AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; 458*4882a593Smuzhiyun }; 459*4882a593Smuzhiyun 460*4882a593Smuzhiyun pinctrl_flx6_default: flx6_twi { 461*4882a593Smuzhiyun atmel,pins = 462*4882a593Smuzhiyun <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP 463*4882a593Smuzhiyun AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; 464*4882a593Smuzhiyun }; 465*4882a593Smuzhiyun }; 466*4882a593Smuzhiyun 467*4882a593Smuzhiyun classd { 468*4882a593Smuzhiyun pinctrl_classd_default: classd { 469*4882a593Smuzhiyun atmel,pins = 470*4882a593Smuzhiyun <AT91_PIOA 24 AT91_PERIPH_C AT91_PINCTRL_PULL_UP 471*4882a593Smuzhiyun AT91_PIOA 25 AT91_PERIPH_C AT91_PINCTRL_PULL_DOWN 472*4882a593Smuzhiyun AT91_PIOA 26 AT91_PERIPH_C AT91_PINCTRL_PULL_UP 473*4882a593Smuzhiyun AT91_PIOA 27 AT91_PERIPH_C AT91_PINCTRL_PULL_DOWN>; 474*4882a593Smuzhiyun }; 475*4882a593Smuzhiyun }; 476*4882a593Smuzhiyun 477*4882a593Smuzhiyun can0 { 478*4882a593Smuzhiyun pinctrl_can0_rx_tx: can0_rx_tx { 479*4882a593Smuzhiyun atmel,pins = 480*4882a593Smuzhiyun <AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE /* CANRX0 */ 481*4882a593Smuzhiyun AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* CANTX0 */ 482*4882a593Smuzhiyun AT91_PIOD 20 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_DOWN /* Enable CAN0 mux */ 483*4882a593Smuzhiyun AT91_PIOD 21 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_DOWN>; /* Enable CAN Transceivers */ 484*4882a593Smuzhiyun }; 485*4882a593Smuzhiyun }; 486*4882a593Smuzhiyun 487*4882a593Smuzhiyun can1 { 488*4882a593Smuzhiyun pinctrl_can1_rx_tx: can1_rx_tx { 489*4882a593Smuzhiyun atmel,pins = 490*4882a593Smuzhiyun <AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_NONE /* CANRX1 RXD1 */ 491*4882a593Smuzhiyun AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE /* CANTX1 TXD1 */ 492*4882a593Smuzhiyun AT91_PIOD 19 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_DOWN /* Enable CAN1 mux */ 493*4882a593Smuzhiyun AT91_PIOD 21 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_DOWN>; /* Enable CAN Transceivers */ 494*4882a593Smuzhiyun }; 495*4882a593Smuzhiyun }; 496*4882a593Smuzhiyun 497*4882a593Smuzhiyun macb0 { 498*4882a593Smuzhiyun pinctrl_macb0_rmii: macb0_rmii-0 { 499*4882a593Smuzhiyun atmel,pins = 500*4882a593Smuzhiyun <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A */ 501*4882a593Smuzhiyun AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A */ 502*4882a593Smuzhiyun AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB2 periph A */ 503*4882a593Smuzhiyun AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB3 periph A */ 504*4882a593Smuzhiyun AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A */ 505*4882a593Smuzhiyun AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB5 periph A */ 506*4882a593Smuzhiyun AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */ 507*4882a593Smuzhiyun AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */ 508*4882a593Smuzhiyun AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */ 509*4882a593Smuzhiyun AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB10 periph A */ 510*4882a593Smuzhiyun }; 511*4882a593Smuzhiyun }; 512*4882a593Smuzhiyun 513*4882a593Smuzhiyun pwm0 { 514*4882a593Smuzhiyun pinctrl_pwm0_0: pwm0_0 { 515*4882a593Smuzhiyun atmel,pins = <AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; 516*4882a593Smuzhiyun }; 517*4882a593Smuzhiyun 518*4882a593Smuzhiyun pinctrl_pwm0_1: pwm0_1 { 519*4882a593Smuzhiyun atmel,pins = <AT91_PIOB 12 AT91_PERIPH_B AT91_PINCTRL_NONE>; 520*4882a593Smuzhiyun }; 521*4882a593Smuzhiyun 522*4882a593Smuzhiyun pinctrl_pwm0_2: pwm0_2 { 523*4882a593Smuzhiyun atmel,pins = <AT91_PIOB 13 AT91_PERIPH_B AT91_PINCTRL_NONE>; 524*4882a593Smuzhiyun }; 525*4882a593Smuzhiyun 526*4882a593Smuzhiyun pinctrl_pwm0_3: pwm0_3 { 527*4882a593Smuzhiyun atmel,pins = <AT91_PIOB 14 AT91_PERIPH_B AT91_PINCTRL_NONE>; 528*4882a593Smuzhiyun }; 529*4882a593Smuzhiyun }; 530*4882a593Smuzhiyun 531*4882a593Smuzhiyun sdmmc0 { 532*4882a593Smuzhiyun pinctrl_sdmmc0_default: sdmmc0 { 533*4882a593Smuzhiyun atmel,pins = 534*4882a593Smuzhiyun <AT91_PIOA 17 AT91_PERIPH_A (AT91_PINCTRL_DRIVE_STRENGTH_HI) /* PA17 CK periph A with pullup */ 535*4882a593Smuzhiyun AT91_PIOA 16 AT91_PERIPH_A (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI) /* PA16 CMD periph A with pullup */ 536*4882a593Smuzhiyun AT91_PIOA 15 AT91_PERIPH_A (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI) /* PA15 DAT0 periph A */ 537*4882a593Smuzhiyun AT91_PIOA 18 AT91_PERIPH_A (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI) /* PA18 DAT1 periph A with pullup */ 538*4882a593Smuzhiyun AT91_PIOA 19 AT91_PERIPH_A (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI) /* PA19 DAT2 periph A with pullup */ 539*4882a593Smuzhiyun AT91_PIOA 20 AT91_PERIPH_A (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI)>; /* PA20 DAT3 periph A with pullup */ 540*4882a593Smuzhiyun }; 541*4882a593Smuzhiyun pinctrl_sdmmc0_cd: sdmmc0_cd { 542*4882a593Smuzhiyun atmel,pins = 543*4882a593Smuzhiyun <AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; 544*4882a593Smuzhiyun }; 545*4882a593Smuzhiyun }; 546*4882a593Smuzhiyun 547*4882a593Smuzhiyun sdmmc1 { 548*4882a593Smuzhiyun pinctrl_sdmmc1_default: sdmmc1 { 549*4882a593Smuzhiyun atmel,pins = 550*4882a593Smuzhiyun <AT91_PIOA 13 AT91_PERIPH_B (AT91_PINCTRL_DRIVE_STRENGTH_HI) /* PA13 CK periph B */ 551*4882a593Smuzhiyun AT91_PIOA 12 AT91_PERIPH_B (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI) /* PA12 CMD periph B with pullup */ 552*4882a593Smuzhiyun AT91_PIOA 11 AT91_PERIPH_B (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI) /* PA11 DAT0 periph B with pullup */ 553*4882a593Smuzhiyun AT91_PIOA 2 AT91_PERIPH_B (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI) /* PA2 DAT1 periph B with pullup */ 554*4882a593Smuzhiyun AT91_PIOA 3 AT91_PERIPH_B (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI) /* PA3 DAT2 periph B with pullup */ 555*4882a593Smuzhiyun AT91_PIOA 4 AT91_PERIPH_B (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI)>; /* PA4 DAT3 periph B with pullup */ 556*4882a593Smuzhiyun }; 557*4882a593Smuzhiyun }; 558*4882a593Smuzhiyun 559*4882a593Smuzhiyun gpio_keys { 560*4882a593Smuzhiyun pinctrl_key_gpio_default: pinctrl_key_gpio { 561*4882a593Smuzhiyun atmel,pins = <AT91_PIOD 18 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; 562*4882a593Smuzhiyun }; 563*4882a593Smuzhiyun }; 564*4882a593Smuzhiyun 565*4882a593Smuzhiyun usb0 { 566*4882a593Smuzhiyun pinctrl_usba_vbus: usba_vbus { 567*4882a593Smuzhiyun atmel,pins = <AT91_PIOB 16 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; 568*4882a593Smuzhiyun }; 569*4882a593Smuzhiyun }; 570*4882a593Smuzhiyun 571*4882a593Smuzhiyun usb1 { 572*4882a593Smuzhiyun pinctrl_usb_default: usb_default { 573*4882a593Smuzhiyun atmel,pins = <AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_NONE 574*4882a593Smuzhiyun AT91_PIOD 16 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; 575*4882a593Smuzhiyun }; 576*4882a593Smuzhiyun }; 577*4882a593Smuzhiyun 578*4882a593Smuzhiyun leds { 579*4882a593Smuzhiyun pinctrl_gpio_leds: gpio_leds { 580*4882a593Smuzhiyun atmel,pins = <AT91_PIOB 11 AT91_PERIPH_GPIO AT91_PINCTRL_NONE 581*4882a593Smuzhiyun AT91_PIOB 12 AT91_PERIPH_GPIO AT91_PINCTRL_NONE 582*4882a593Smuzhiyun AT91_PIOB 13 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; 583*4882a593Smuzhiyun }; 584*4882a593Smuzhiyun }; 585*4882a593Smuzhiyun}; /* pinctrl */ 586*4882a593Smuzhiyun 587*4882a593Smuzhiyun&pwm0 { 588*4882a593Smuzhiyun pinctrl-names = "default"; 589*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_pwm0_0 &pinctrl_pwm0_1 &pinctrl_pwm0_2 &pinctrl_pwm0_3>; 590*4882a593Smuzhiyun status = "disabled"; /* Conflict with leds. */ 591*4882a593Smuzhiyun}; 592*4882a593Smuzhiyun 593*4882a593Smuzhiyun&sdmmc0 { 594*4882a593Smuzhiyun bus-width = <4>; 595*4882a593Smuzhiyun pinctrl-names = "default"; 596*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_sdmmc0_default &pinctrl_sdmmc0_cd>; 597*4882a593Smuzhiyun status = "okay"; 598*4882a593Smuzhiyun cd-gpios = <&pioA 23 GPIO_ACTIVE_LOW>; 599*4882a593Smuzhiyun disable-wp; 600*4882a593Smuzhiyun}; 601*4882a593Smuzhiyun 602*4882a593Smuzhiyun&sdmmc1 { 603*4882a593Smuzhiyun bus-width = <4>; 604*4882a593Smuzhiyun pinctrl-names = "default"; 605*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_sdmmc1_default>; 606*4882a593Smuzhiyun no-1-8-v; 607*4882a593Smuzhiyun non-removable; 608*4882a593Smuzhiyun status = "disabled"; /* Conflict with flx4. */ 609*4882a593Smuzhiyun}; 610*4882a593Smuzhiyun 611*4882a593Smuzhiyun&qspi { 612*4882a593Smuzhiyun pinctrl-names = "default"; 613*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_qspi>; 614*4882a593Smuzhiyun status = "okay"; /* Conflict with i2s. */ 615*4882a593Smuzhiyun 616*4882a593Smuzhiyun flash@0 { 617*4882a593Smuzhiyun #address-cells = <1>; 618*4882a593Smuzhiyun #size-cells = <1>; 619*4882a593Smuzhiyun compatible = "jedec,spi-nor"; 620*4882a593Smuzhiyun reg = <0>; 621*4882a593Smuzhiyun spi-max-frequency = <80000000>; 622*4882a593Smuzhiyun spi-tx-bus-width = <4>; 623*4882a593Smuzhiyun spi-rx-bus-width = <4>; 624*4882a593Smuzhiyun m25p,fast-read; 625*4882a593Smuzhiyun 626*4882a593Smuzhiyun at91bootstrap@0 { 627*4882a593Smuzhiyun label = "qspi: at91bootstrap"; 628*4882a593Smuzhiyun reg = <0x0 0x40000>; 629*4882a593Smuzhiyun }; 630*4882a593Smuzhiyun 631*4882a593Smuzhiyun bootloader@40000 { 632*4882a593Smuzhiyun label = "qspi: bootloader"; 633*4882a593Smuzhiyun reg = <0x40000 0xc0000>; 634*4882a593Smuzhiyun }; 635*4882a593Smuzhiyun 636*4882a593Smuzhiyun bootloaderenvred@100000 { 637*4882a593Smuzhiyun label = "qspi: bootloader env redundant"; 638*4882a593Smuzhiyun reg = <0x100000 0x40000>; 639*4882a593Smuzhiyun }; 640*4882a593Smuzhiyun 641*4882a593Smuzhiyun bootloaderenv@140000 { 642*4882a593Smuzhiyun label = "qspi: bootloader env"; 643*4882a593Smuzhiyun reg = <0x140000 0x40000>; 644*4882a593Smuzhiyun }; 645*4882a593Smuzhiyun 646*4882a593Smuzhiyun dtb@180000 { 647*4882a593Smuzhiyun label = "qspi: device tree"; 648*4882a593Smuzhiyun reg = <0x180000 0x80000>; 649*4882a593Smuzhiyun }; 650*4882a593Smuzhiyun 651*4882a593Smuzhiyun kernel@200000 { 652*4882a593Smuzhiyun label = "qspi: kernel"; 653*4882a593Smuzhiyun reg = <0x200000 0x600000>; 654*4882a593Smuzhiyun }; 655*4882a593Smuzhiyun }; 656*4882a593Smuzhiyun}; 657*4882a593Smuzhiyun 658*4882a593Smuzhiyun&rtt { 659*4882a593Smuzhiyun atmel,rtt-rtc-time-reg = <&gpbr 0x0>; 660*4882a593Smuzhiyun status = "okay"; 661*4882a593Smuzhiyun}; 662*4882a593Smuzhiyun 663*4882a593Smuzhiyun&shutdown_controller { 664*4882a593Smuzhiyun debounce-delay-us = <976>; 665*4882a593Smuzhiyun status = "okay"; 666*4882a593Smuzhiyun 667*4882a593Smuzhiyun input@0 { 668*4882a593Smuzhiyun reg = <0>; 669*4882a593Smuzhiyun }; 670*4882a593Smuzhiyun}; 671*4882a593Smuzhiyun 672*4882a593Smuzhiyun&tcb0 { 673*4882a593Smuzhiyun timer0: timer@0 { 674*4882a593Smuzhiyun compatible = "atmel,tcb-timer"; 675*4882a593Smuzhiyun reg = <0>; 676*4882a593Smuzhiyun }; 677*4882a593Smuzhiyun 678*4882a593Smuzhiyun timer1: timer@1 { 679*4882a593Smuzhiyun compatible = "atmel,tcb-timer"; 680*4882a593Smuzhiyun reg = <1>; 681*4882a593Smuzhiyun }; 682*4882a593Smuzhiyun}; 683*4882a593Smuzhiyun 684*4882a593Smuzhiyun&usb0 { 685*4882a593Smuzhiyun atmel,vbus-gpio = <&pioB 16 GPIO_ACTIVE_HIGH>; 686*4882a593Smuzhiyun pinctrl-names = "default"; 687*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_usba_vbus>; 688*4882a593Smuzhiyun status = "okay"; 689*4882a593Smuzhiyun}; 690*4882a593Smuzhiyun 691*4882a593Smuzhiyun&usb1 { 692*4882a593Smuzhiyun num-ports = <3>; 693*4882a593Smuzhiyun atmel,vbus-gpio = <0 694*4882a593Smuzhiyun &pioD 15 GPIO_ACTIVE_HIGH 695*4882a593Smuzhiyun &pioD 16 GPIO_ACTIVE_HIGH>; 696*4882a593Smuzhiyun pinctrl-names = "default"; 697*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_usb_default>; 698*4882a593Smuzhiyun status = "okay"; 699*4882a593Smuzhiyun}; 700*4882a593Smuzhiyun 701*4882a593Smuzhiyun&usb2 { 702*4882a593Smuzhiyun status = "okay"; 703*4882a593Smuzhiyun}; 704*4882a593Smuzhiyun 705*4882a593Smuzhiyun&watchdog { 706*4882a593Smuzhiyun status = "okay"; 707*4882a593Smuzhiyun}; 708*4882a593Smuzhiyun 709