xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/at91-kizbox3_common.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * at91-kizbox3.dts - Device Tree Include file for Overkiz Kizbox 3
4*4882a593Smuzhiyun * family SoC boards
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Copyright (C) 2018 Overkiz SAS
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * Authors: Dorian Rocipon <d.rocipon@overkiz.com>
9*4882a593Smuzhiyun *          Kevin Carli <k.carli@overkiz.com>
10*4882a593Smuzhiyun *          Mickael Gardet <m.gardet@overkiz.com>
11*4882a593Smuzhiyun */
12*4882a593Smuzhiyun/dts-v1/;
13*4882a593Smuzhiyun#include "sama5d2.dtsi"
14*4882a593Smuzhiyun#include "sama5d2-pinfunc.h"
15*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h>
16*4882a593Smuzhiyun#include <dt-bindings/mfd/atmel-flexcom.h>
17*4882a593Smuzhiyun#include <dt-bindings/pinctrl/at91.h>
18*4882a593Smuzhiyun#include <dt-bindings/pwm/pwm.h>
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun/ {
21*4882a593Smuzhiyun	model = "Overkiz Kizbox3";
22*4882a593Smuzhiyun	compatible = "overkiz,kizbox3", "atmel,sama5d2", "atmel,sama5";
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun	aliases {
25*4882a593Smuzhiyun		serial0 = &uart0;
26*4882a593Smuzhiyun		serial1 = &uart1;
27*4882a593Smuzhiyun		serial2 = &uart2;
28*4882a593Smuzhiyun		serial3 = &uart3;
29*4882a593Smuzhiyun		serial4 = &uart4;
30*4882a593Smuzhiyun		serial5 = &uart5;
31*4882a593Smuzhiyun		serial6 = &uart8;
32*4882a593Smuzhiyun	};
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun	chosen {
35*4882a593Smuzhiyun		bootargs = "ubi.mtd=ubi";
36*4882a593Smuzhiyun		stdout-path = "serial1:115200n8";
37*4882a593Smuzhiyun	};
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun	clocks {
40*4882a593Smuzhiyun		slow_xtal {
41*4882a593Smuzhiyun			clock-frequency = <32768>;
42*4882a593Smuzhiyun		};
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun		main_xtal {
45*4882a593Smuzhiyun			clock-frequency = <12000000>;
46*4882a593Smuzhiyun		};
47*4882a593Smuzhiyun	};
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun	vdd_adc_vddana: supply_3v3_ana {
50*4882a593Smuzhiyun		compatible = "regulator-fixed";
51*4882a593Smuzhiyun		regulator-name = "adc-vddana";
52*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
53*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
54*4882a593Smuzhiyun		regulator-always-on;
55*4882a593Smuzhiyun	};
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun	vdd_adc_vref: supply_3v3_ref {
58*4882a593Smuzhiyun		compatible = "regulator-fixed";
59*4882a593Smuzhiyun		regulator-name = "adc-vref";
60*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
61*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
62*4882a593Smuzhiyun		regulator-always-on;
63*4882a593Smuzhiyun	};
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun	pwm_leds {
66*4882a593Smuzhiyun		compatible = "pwm-leds";
67*4882a593Smuzhiyun		pinctrl-names = "default";
68*4882a593Smuzhiyun		pinctrl-0 = <&pinctrl_pwm0_pwm_h0
69*4882a593Smuzhiyun			     &pinctrl_pwm0_pwm_h1
70*4882a593Smuzhiyun			     &pinctrl_pwm0_pwm_h2
71*4882a593Smuzhiyun			     &pinctrl_pwm0_pwm_h3>;
72*4882a593Smuzhiyun		status = "disabled";
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun		red {
75*4882a593Smuzhiyun			label = "pwm:red:user";
76*4882a593Smuzhiyun			pwms = <&pwm0 0 10000000 0>;
77*4882a593Smuzhiyun			max-brightness = <255>;
78*4882a593Smuzhiyun			linux,default-trigger = "default-on";
79*4882a593Smuzhiyun			status = "disabled";
80*4882a593Smuzhiyun		};
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun		green {
83*4882a593Smuzhiyun			label = "pwm:green:user";
84*4882a593Smuzhiyun			pwms = <&pwm0 1 10000000 0>;
85*4882a593Smuzhiyun			max-brightness = <255>;
86*4882a593Smuzhiyun			linux,default-trigger = "default-on";
87*4882a593Smuzhiyun			status = "disabled";
88*4882a593Smuzhiyun		};
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun		blue {
91*4882a593Smuzhiyun			label = "pwm:blue:user";
92*4882a593Smuzhiyun			pwms = <&pwm0 2 10000000 0>;
93*4882a593Smuzhiyun			max-brightness = <255>;
94*4882a593Smuzhiyun			status = "disabled";
95*4882a593Smuzhiyun		};
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun		white {
98*4882a593Smuzhiyun			label = "pwm:white:user";
99*4882a593Smuzhiyun			pwms = <&pwm0 3 10000000 0>;
100*4882a593Smuzhiyun			max-brightness = <255>;
101*4882a593Smuzhiyun			status = "disabled";
102*4882a593Smuzhiyun		};
103*4882a593Smuzhiyun	};
104*4882a593Smuzhiyun};
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun&ebi {
107*4882a593Smuzhiyun	status = "okay";
108*4882a593Smuzhiyun};
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun&nand_controller {
111*4882a593Smuzhiyun	status = "okay";
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun	nand@3 {
114*4882a593Smuzhiyun		pinctrl-0 = <&pinctrl_ebi_nand_addr>;
115*4882a593Smuzhiyun		pinctrl-names = "default";
116*4882a593Smuzhiyun		reg = <0x3 0x0 0x800000>;
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun		atmel,rb = <0>;
119*4882a593Smuzhiyun		nand-bus-width = <8>;
120*4882a593Smuzhiyun		nand-ecc-mode = "hw";
121*4882a593Smuzhiyun		nand-ecc-strength = <4>;
122*4882a593Smuzhiyun		nand-ecc-step-size = <512>;
123*4882a593Smuzhiyun		nand-on-flash-bbt;
124*4882a593Smuzhiyun		label = "atmel_nand";
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun		partitions {
127*4882a593Smuzhiyun			compatible = "fixed-partitions";
128*4882a593Smuzhiyun			#address-cells = <1>;
129*4882a593Smuzhiyun			#size-cells = <1>;
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun			bootstrap@0 {
132*4882a593Smuzhiyun				label = "bootstrap";
133*4882a593Smuzhiyun				reg = <0x0 0x20000>;
134*4882a593Smuzhiyun			};
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun			u-boot@20000 {
137*4882a593Smuzhiyun				label = "u-boot";
138*4882a593Smuzhiyun				reg = <0x20000 0x140000>;
139*4882a593Smuzhiyun			};
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun			u-boot-factory@160000 {
142*4882a593Smuzhiyun				label = "u-boot-factory";
143*4882a593Smuzhiyun				reg = <0x160000 0x140000>;
144*4882a593Smuzhiyun			};
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun			ubi@2A0000 {
147*4882a593Smuzhiyun				label = "ubi";
148*4882a593Smuzhiyun				reg = <0x2A0000 0x7D60000>;
149*4882a593Smuzhiyun			};
150*4882a593Smuzhiyun		};
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun	};
153*4882a593Smuzhiyun};
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun&rtc {
156*4882a593Smuzhiyun	status = "okay";
157*4882a593Smuzhiyun};
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun&pioA {
160*4882a593Smuzhiyun	pinctrl_ebi_nand_addr: ebi-addr-1 {
161*4882a593Smuzhiyun		pinmux = <PIN_PA0__D0>,
162*4882a593Smuzhiyun			<PIN_PA1__D1>,
163*4882a593Smuzhiyun			<PIN_PA2__D2>,
164*4882a593Smuzhiyun			<PIN_PA3__D3>,
165*4882a593Smuzhiyun			<PIN_PA4__D4>,
166*4882a593Smuzhiyun			<PIN_PA5__D5>,
167*4882a593Smuzhiyun			<PIN_PA6__D6>,
168*4882a593Smuzhiyun			<PIN_PA7__D7>,
169*4882a593Smuzhiyun			<PIN_PA8__NWE_NANDWE>,
170*4882a593Smuzhiyun			<PIN_PA9__NCS3>,
171*4882a593Smuzhiyun			<PIN_PA10__A21_NANDALE>,
172*4882a593Smuzhiyun			<PIN_PA11__A22_NANDCLE>,
173*4882a593Smuzhiyun			<PIN_PA21__NANDRDY>;
174*4882a593Smuzhiyun		bias-disable;
175*4882a593Smuzhiyun	};
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun	pinctrl_usart {
178*4882a593Smuzhiyun		pinctrl_usart_0: usart0-0 {
179*4882a593Smuzhiyun			pinmux = < PIN_PB26__URXD0>, <PIN_PB27__UTXD0>;
180*4882a593Smuzhiyun			bias-disable;
181*4882a593Smuzhiyun		};
182*4882a593Smuzhiyun		pinctrl_usart_1: usart1-0 {
183*4882a593Smuzhiyun			pinmux = < PIN_PD2__URXD1>, <PIN_PD3__UTXD1>;
184*4882a593Smuzhiyun			bias-disable;
185*4882a593Smuzhiyun		};
186*4882a593Smuzhiyun		pinctrl_usart_2: usart2-0 {
187*4882a593Smuzhiyun			pinmux = < PIN_PD4__URXD2>, <PIN_PD5__UTXD2>;
188*4882a593Smuzhiyun			bias-disable;
189*4882a593Smuzhiyun		};
190*4882a593Smuzhiyun		pinctrl_usart_3: usart3-0 {
191*4882a593Smuzhiyun			pinmux = < PIN_PC12__URXD3>, <PIN_PC13__UTXD3>;
192*4882a593Smuzhiyun			bias-disable;
193*4882a593Smuzhiyun		};
194*4882a593Smuzhiyun		pinctrl_usart_4: usart4-0 {
195*4882a593Smuzhiyun			pinmux = < PIN_PB3__URXD4>, <PIN_PB4__UTXD4>;
196*4882a593Smuzhiyun			bias-disable;
197*4882a593Smuzhiyun		};
198*4882a593Smuzhiyun		pinctrl_flx0_default: flx0_usart_default {
199*4882a593Smuzhiyun			pinmux = <PIN_PB28__FLEXCOM0_IO0>, //TX
200*4882a593Smuzhiyun			<PIN_PB29__FLEXCOM0_IO1>; //RX
201*4882a593Smuzhiyun			bias-disable;
202*4882a593Smuzhiyun		};
203*4882a593Smuzhiyun		pinctrl_flx3_default: flx3_usart_default {
204*4882a593Smuzhiyun			pinmux = <PIN_PB22__FLEXCOM3_IO1>, //RX
205*4882a593Smuzhiyun			<PIN_PB23__FLEXCOM3_IO0>; //TX
206*4882a593Smuzhiyun			bias-disable;
207*4882a593Smuzhiyun		};
208*4882a593Smuzhiyun	};
209*4882a593Smuzhiyun
210*4882a593Smuzhiyun	pinctrl_flx4_default: flx4_i2c6_default {
211*4882a593Smuzhiyun		pinmux = <PIN_PD12__FLEXCOM4_IO0>, //DATA
212*4882a593Smuzhiyun		<PIN_PD13__FLEXCOM4_IO1>; //CLK
213*4882a593Smuzhiyun		bias-disable;
214*4882a593Smuzhiyun		drive-open-drain = <1>;
215*4882a593Smuzhiyun	};
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun	pinctrl_pwm0 {
218*4882a593Smuzhiyun		pinctrl_pwm0_pwm_h0: pwm0_pwm_h0 {
219*4882a593Smuzhiyun			pinmux = <PIN_PA30__PWMH0>;
220*4882a593Smuzhiyun			bias-disable;
221*4882a593Smuzhiyun		};
222*4882a593Smuzhiyun		pinctrl_pwm0_pwm_h1: pwm0_pwmh1 {
223*4882a593Smuzhiyun			pinmux = <PIN_PB0__PWMH1>;
224*4882a593Smuzhiyun			bias-disable;
225*4882a593Smuzhiyun		};
226*4882a593Smuzhiyun		pinctrl_pwm0_pwm_h2: pwm0_pwm_h2 {
227*4882a593Smuzhiyun			pinmux = <PIN_PB5__PWMH2>;
228*4882a593Smuzhiyun			bias-disable;
229*4882a593Smuzhiyun		};
230*4882a593Smuzhiyun		pinctrl_pwm0_pwm_h3: pwm0_pwm_h3 {
231*4882a593Smuzhiyun			pinmux = <PIN_PB7__PWMH3>;
232*4882a593Smuzhiyun			bias-disable;
233*4882a593Smuzhiyun		};
234*4882a593Smuzhiyun	};
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun	pinctrl_adc {
237*4882a593Smuzhiyun		pinctrl_adc2: adc2 {
238*4882a593Smuzhiyun			pinmux = <PIN_PD21__GPIO>;
239*4882a593Smuzhiyun			bias-disable;
240*4882a593Smuzhiyun		};
241*4882a593Smuzhiyun		pinctrl_adc3: adc3 {
242*4882a593Smuzhiyun			pinmux = <PIN_PD22__GPIO>;
243*4882a593Smuzhiyun			bias-disable;
244*4882a593Smuzhiyun		};
245*4882a593Smuzhiyun		pinctrl_adc4: adc4 {
246*4882a593Smuzhiyun			pinmux = <PIN_PD23__GPIO>;
247*4882a593Smuzhiyun			bias-disable;
248*4882a593Smuzhiyun		};
249*4882a593Smuzhiyun		pinctrl_adc5: adc5 {
250*4882a593Smuzhiyun			pinmux = <PIN_PD24__GPIO>;
251*4882a593Smuzhiyun			bias-disable;
252*4882a593Smuzhiyun		};
253*4882a593Smuzhiyun	};
254*4882a593Smuzhiyun};
255*4882a593Smuzhiyun
256*4882a593Smuzhiyun&uart0 {
257*4882a593Smuzhiyun	pinctrl-names = "default";
258*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_usart_0>;
259*4882a593Smuzhiyun	atmel,use-dma-rx;
260*4882a593Smuzhiyun	atmel,use-dma-tx;
261*4882a593Smuzhiyun	status = "disabled";
262*4882a593Smuzhiyun};
263*4882a593Smuzhiyun
264*4882a593Smuzhiyun/* debug uart */
265*4882a593Smuzhiyun&uart1 {
266*4882a593Smuzhiyun	pinctrl-names = "default";
267*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_usart_1>;
268*4882a593Smuzhiyun	atmel,use-dma-rx;
269*4882a593Smuzhiyun	atmel,use-dma-tx;
270*4882a593Smuzhiyun	status = "disabled";
271*4882a593Smuzhiyun};
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun&uart2 {
274*4882a593Smuzhiyun	pinctrl-names = "default";
275*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_usart_2>;
276*4882a593Smuzhiyun	atmel,use-dma-rx;
277*4882a593Smuzhiyun	atmel,use-dma-tx;
278*4882a593Smuzhiyun	status = "disabled";
279*4882a593Smuzhiyun};
280*4882a593Smuzhiyun
281*4882a593Smuzhiyun&uart3 {
282*4882a593Smuzhiyun	pinctrl-names = "default";
283*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_usart_3>;
284*4882a593Smuzhiyun	atmel,use-dma-rx;
285*4882a593Smuzhiyun	atmel,use-dma-tx;
286*4882a593Smuzhiyun	status = "disabled";
287*4882a593Smuzhiyun};
288*4882a593Smuzhiyun
289*4882a593Smuzhiyun&uart4 {
290*4882a593Smuzhiyun	pinctrl-names = "default";
291*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_usart_4>;
292*4882a593Smuzhiyun	atmel,use-dma-rx;
293*4882a593Smuzhiyun	atmel,use-dma-tx;
294*4882a593Smuzhiyun	status = "disabled";
295*4882a593Smuzhiyun};
296*4882a593Smuzhiyun
297*4882a593Smuzhiyun&flx0 {
298*4882a593Smuzhiyun	atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>;
299*4882a593Smuzhiyun	status = "disabled";
300*4882a593Smuzhiyun
301*4882a593Smuzhiyun	uart5: serial@200  {
302*4882a593Smuzhiyun		pinctrl-names = "default";
303*4882a593Smuzhiyun		pinctrl-0 = <&pinctrl_flx0_default>;
304*4882a593Smuzhiyun		atmel,use-dma-rx;
305*4882a593Smuzhiyun		atmel,use-dma-tx;
306*4882a593Smuzhiyun		status = "disabled";
307*4882a593Smuzhiyun	};
308*4882a593Smuzhiyun};
309*4882a593Smuzhiyun
310*4882a593Smuzhiyun&flx3 {
311*4882a593Smuzhiyun	atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>;
312*4882a593Smuzhiyun	status = "disabled";
313*4882a593Smuzhiyun
314*4882a593Smuzhiyun	uart8: serial@200 {
315*4882a593Smuzhiyun		pinctrl-names = "default";
316*4882a593Smuzhiyun		pinctrl-0 = <&pinctrl_flx3_default>;
317*4882a593Smuzhiyun		atmel,use-dma-rx;
318*4882a593Smuzhiyun		atmel,use-dma-tx;
319*4882a593Smuzhiyun		status = "disabled";
320*4882a593Smuzhiyun	};
321*4882a593Smuzhiyun};
322*4882a593Smuzhiyun
323*4882a593Smuzhiyun&flx4 {
324*4882a593Smuzhiyun	atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>;
325*4882a593Smuzhiyun	status = "disabled";
326*4882a593Smuzhiyun
327*4882a593Smuzhiyun	i2c6: i2c@600 {
328*4882a593Smuzhiyun		pinctrl-names = "default";
329*4882a593Smuzhiyun		pinctrl-0 = <&pinctrl_flx4_default>;
330*4882a593Smuzhiyun		status = "disabled";
331*4882a593Smuzhiyun	};
332*4882a593Smuzhiyun};
333*4882a593Smuzhiyun
334*4882a593Smuzhiyun&pwm0 {
335*4882a593Smuzhiyun	status = "okay";
336*4882a593Smuzhiyun};
337*4882a593Smuzhiyun
338*4882a593Smuzhiyun&shutdown_controller {
339*4882a593Smuzhiyun	debounce-delay-us = <976>;
340*4882a593Smuzhiyun	atmel,wakeup-rtc-timer;
341*4882a593Smuzhiyun
342*4882a593Smuzhiyun	input@0 {
343*4882a593Smuzhiyun		reg = <0>;
344*4882a593Smuzhiyun		atmel,wakeup-type = "low";
345*4882a593Smuzhiyun	};
346*4882a593Smuzhiyun};
347*4882a593Smuzhiyun
348*4882a593Smuzhiyun&watchdog {
349*4882a593Smuzhiyun	status = "okay";
350*4882a593Smuzhiyun};
351*4882a593Smuzhiyun
352*4882a593Smuzhiyun&adc {
353*4882a593Smuzhiyun	pinctrl-names = "default";
354*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_adc2
355*4882a593Smuzhiyun		     &pinctrl_adc3
356*4882a593Smuzhiyun		     &pinctrl_adc4
357*4882a593Smuzhiyun		     &pinctrl_adc5>;
358*4882a593Smuzhiyun
359*4882a593Smuzhiyun	vddana-supply = <&vdd_adc_vddana>;
360*4882a593Smuzhiyun	vref-supply = <&vdd_adc_vref>;
361*4882a593Smuzhiyun	status = "disabled";
362*4882a593Smuzhiyun};
363*4882a593Smuzhiyun
364*4882a593Smuzhiyun&securam {
365*4882a593Smuzhiyun	export;
366*4882a593Smuzhiyun
367*4882a593Smuzhiyun	/* export overkiz u-boot mode/version and factory */
368*4882a593Smuzhiyun	uboot@1400 {
369*4882a593Smuzhiyun		reg = <0x1400 0x20>;
370*4882a593Smuzhiyun		export;
371*4882a593Smuzhiyun	};
372*4882a593Smuzhiyun};
373