xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/at91-kizbox2-common.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * at91-kizbox2_common.dtsi - Device Tree Include file for
4*4882a593Smuzhiyun * Overkiz Kizbox 2 family SoC
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Copyright (C) 2014-2018 Overkiz SAS
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * Authors: Antoine Aubert <a.aubert@overkiz.com>
9*4882a593Smuzhiyun *          Gaël Portay <g.portay@overkiz.com>
10*4882a593Smuzhiyun *          Kévin Raymond <k.raymond@overkiz.com>
11*4882a593Smuzhiyun */
12*4882a593Smuzhiyun#include "sama5d31.dtsi"
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun/ {
15*4882a593Smuzhiyun	chosen {
16*4882a593Smuzhiyun		bootargs = "ubi.mtd=ubi";
17*4882a593Smuzhiyun		stdout-path = &dbgu;
18*4882a593Smuzhiyun	};
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun	memory@20000000 {
21*4882a593Smuzhiyun		reg = <0x20000000 0x10000000>;
22*4882a593Smuzhiyun	};
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun	clocks {
25*4882a593Smuzhiyun		slow_xtal {
26*4882a593Smuzhiyun			clock-frequency = <32768>;
27*4882a593Smuzhiyun		};
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun		main_xtal {
30*4882a593Smuzhiyun			clock-frequency = <12000000>;
31*4882a593Smuzhiyun		};
32*4882a593Smuzhiyun	};
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun	gpio_keys {
35*4882a593Smuzhiyun		compatible = "gpio-keys";
36*4882a593Smuzhiyun		#address-cells = <1>;
37*4882a593Smuzhiyun		#size-cells = <0>;
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun		prog {
40*4882a593Smuzhiyun			label = "PB_PROG";
41*4882a593Smuzhiyun			gpios = <&pioE 27 GPIO_ACTIVE_LOW>;
42*4882a593Smuzhiyun			linux,code = <0x102>;
43*4882a593Smuzhiyun			wakeup-source;
44*4882a593Smuzhiyun		};
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun		reset {
47*4882a593Smuzhiyun			label = "PB_RST";
48*4882a593Smuzhiyun			gpios = <&pioE 29 GPIO_ACTIVE_LOW>;
49*4882a593Smuzhiyun			linux,code = <0x100>;
50*4882a593Smuzhiyun			wakeup-source;
51*4882a593Smuzhiyun		};
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun		user {
54*4882a593Smuzhiyun			label = "PB_USER";
55*4882a593Smuzhiyun			gpios = <&pioE 31 GPIO_ACTIVE_HIGH>;
56*4882a593Smuzhiyun			linux,code = <0x101>;
57*4882a593Smuzhiyun			wakeup-source;
58*4882a593Smuzhiyun		};
59*4882a593Smuzhiyun	};
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun	pwm_leds {
62*4882a593Smuzhiyun		compatible = "pwm-leds";
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun		blue {
65*4882a593Smuzhiyun			label = "pwm:blue:user";
66*4882a593Smuzhiyun			pwms = <&pwm0 2 10000000 0>;
67*4882a593Smuzhiyun			max-brightness = <255>;
68*4882a593Smuzhiyun			linux,default-trigger = "none";
69*4882a593Smuzhiyun		};
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun		green {
72*4882a593Smuzhiyun			label = "pwm:green:user";
73*4882a593Smuzhiyun			pwms = <&pwm0 1 10000000 0>;
74*4882a593Smuzhiyun			max-brightness = <255>;
75*4882a593Smuzhiyun			linux,default-trigger = "default-on";
76*4882a593Smuzhiyun		};
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun		red {
79*4882a593Smuzhiyun			label = "pwm:red:user";
80*4882a593Smuzhiyun			pwms = <&pwm0 0 10000000 0>;
81*4882a593Smuzhiyun			max-brightness = <255>;
82*4882a593Smuzhiyun			linux,default-trigger = "default-on";
83*4882a593Smuzhiyun		};
84*4882a593Smuzhiyun	};
85*4882a593Smuzhiyun};
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun&i2c1 {
88*4882a593Smuzhiyun	status = "okay";
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun	pmic: act8865@5b {
91*4882a593Smuzhiyun		compatible = "active-semi,act8865";
92*4882a593Smuzhiyun		reg = <0x5b>;
93*4882a593Smuzhiyun		status = "okay";
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun		regulators {
96*4882a593Smuzhiyun			vcc_1v8_reg: DCDC_REG1 {
97*4882a593Smuzhiyun				regulator-name = "VCC_1V8";
98*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
99*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
100*4882a593Smuzhiyun				regulator-always-on;
101*4882a593Smuzhiyun			};
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun			vcc_1v2_reg: DCDC_REG2 {
104*4882a593Smuzhiyun				regulator-name = "VCC_1V2";
105*4882a593Smuzhiyun				regulator-min-microvolt = <1200000>;
106*4882a593Smuzhiyun				regulator-max-microvolt = <1200000>;
107*4882a593Smuzhiyun				regulator-always-on;
108*4882a593Smuzhiyun			};
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun			vcc_3v3_reg: DCDC_REG3 {
111*4882a593Smuzhiyun				regulator-name = "VCC_3V3";
112*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
113*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
114*4882a593Smuzhiyun				regulator-always-on;
115*4882a593Smuzhiyun			};
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun			vddfuse_reg: LDO_REG1 {
118*4882a593Smuzhiyun				regulator-name = "FUSE_2V5";
119*4882a593Smuzhiyun				regulator-min-microvolt = <2500000>;
120*4882a593Smuzhiyun				regulator-max-microvolt = <2500000>;
121*4882a593Smuzhiyun			};
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun			vddana_reg: LDO_REG2 {
124*4882a593Smuzhiyun				regulator-name = "VDDANA";
125*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
126*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
127*4882a593Smuzhiyun				regulator-always-on;
128*4882a593Smuzhiyun			};
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun			vled_reg: LDO_REG3 {
131*4882a593Smuzhiyun				regulator-name = "VLED";
132*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
133*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
134*4882a593Smuzhiyun				regulator-always-on;
135*4882a593Smuzhiyun			};
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun			v3v8_rf_reg: LDO_REG4 {
138*4882a593Smuzhiyun				regulator-name = "V3V8_RF";
139*4882a593Smuzhiyun				regulator-min-microvolt = <3800000>;
140*4882a593Smuzhiyun				regulator-max-microvolt = <3800000>;
141*4882a593Smuzhiyun				regulator-always-on;
142*4882a593Smuzhiyun			};
143*4882a593Smuzhiyun		};
144*4882a593Smuzhiyun	};
145*4882a593Smuzhiyun};
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun&usart0 {
148*4882a593Smuzhiyun	atmel,use-dma-rx;
149*4882a593Smuzhiyun	atmel,use-dma-tx;
150*4882a593Smuzhiyun	status = "disabled";
151*4882a593Smuzhiyun};
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun&usart1 {
154*4882a593Smuzhiyun	atmel,use-dma-rx;
155*4882a593Smuzhiyun	atmel,use-dma-tx;
156*4882a593Smuzhiyun	status = "disabled";
157*4882a593Smuzhiyun};
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun&usart2 {
160*4882a593Smuzhiyun	atmel,use-dma-rx;
161*4882a593Smuzhiyun	atmel,use-dma-tx;
162*4882a593Smuzhiyun	status = "disabled";
163*4882a593Smuzhiyun};
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun&pwm0 {
166*4882a593Smuzhiyun	pinctrl-names = "default";
167*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_pwm0_pwmh0_1
168*4882a593Smuzhiyun		     &pinctrl_pwm0_pwmh1_1
169*4882a593Smuzhiyun		     &pinctrl_pwm0_pwmh2_0>;
170*4882a593Smuzhiyun	status = "okay";
171*4882a593Smuzhiyun};
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun&adc0 {
174*4882a593Smuzhiyun	atmel,adc-vref = <3333>;
175*4882a593Smuzhiyun	status = "okay";
176*4882a593Smuzhiyun};
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun&macb1 {
179*4882a593Smuzhiyun	phy-mode = "rmii";
180*4882a593Smuzhiyun	status = "okay";
181*4882a593Smuzhiyun};
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun&dbgu {
184*4882a593Smuzhiyun	status = "okay";
185*4882a593Smuzhiyun};
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun&watchdog {
188*4882a593Smuzhiyun	status = "okay";
189*4882a593Smuzhiyun};
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun&ebi {
192*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_ebi_nand_addr>;
193*4882a593Smuzhiyun	pinctrl-names = "default";
194*4882a593Smuzhiyun	status = "okay";
195*4882a593Smuzhiyun};
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun&nand_controller {
198*4882a593Smuzhiyun	status = "okay";
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun	nand@3 {
201*4882a593Smuzhiyun		reg = <0x3 0x0 0x2>;
202*4882a593Smuzhiyun		atmel,rb = <0>;
203*4882a593Smuzhiyun		nand-bus-width = <8>;
204*4882a593Smuzhiyun		nand-ecc-mode = "hw";
205*4882a593Smuzhiyun		nand-ecc-strength = <4>;
206*4882a593Smuzhiyun		nand-ecc-step-size = <512>;
207*4882a593Smuzhiyun		nand-on-flash-bbt;
208*4882a593Smuzhiyun		label = "atmel_nand";
209*4882a593Smuzhiyun
210*4882a593Smuzhiyun		partitions {
211*4882a593Smuzhiyun			compatible = "fixed-partitions";
212*4882a593Smuzhiyun			#address-cells = <1>;
213*4882a593Smuzhiyun			#size-cells = <1>;
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun			bootstrap@0 {
216*4882a593Smuzhiyun				label = "bootstrap";
217*4882a593Smuzhiyun				reg = <0x0 0x20000>;
218*4882a593Smuzhiyun			};
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun			ubi@20000 {
221*4882a593Smuzhiyun				label = "ubi";
222*4882a593Smuzhiyun				reg = <0x20000 0x7fe0000>;
223*4882a593Smuzhiyun			};
224*4882a593Smuzhiyun		};
225*4882a593Smuzhiyun	};
226*4882a593Smuzhiyun};
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun&usb1 {
229*4882a593Smuzhiyun	status = "okay";
230*4882a593Smuzhiyun};
231*4882a593Smuzhiyun
232*4882a593Smuzhiyun&usb2 {
233*4882a593Smuzhiyun	status = "okay";
234*4882a593Smuzhiyun};
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun/* WMBUS (inverted with IO in the latest schematic) */
237*4882a593Smuzhiyun&pinctrl_usart0 {
238*4882a593Smuzhiyun	atmel,pins =
239*4882a593Smuzhiyun		<AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE
240*4882a593Smuzhiyun		 AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
241*4882a593Smuzhiyun		 AT91_PIOE 2 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
242*4882a593Smuzhiyun};
243*4882a593Smuzhiyun
244*4882a593Smuzhiyun/* RTS */
245*4882a593Smuzhiyun&pinctrl_usart1 {
246*4882a593Smuzhiyun	atmel,pins =
247*4882a593Smuzhiyun		<AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE
248*4882a593Smuzhiyun		 AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
249*4882a593Smuzhiyun		 AT91_PIOE 7 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
250*4882a593Smuzhiyun};
251*4882a593Smuzhiyun
252*4882a593Smuzhiyun/* IO (inverted with WMBUS in the latest schematic) */
253*4882a593Smuzhiyun&pinctrl_usart2 {
254*4882a593Smuzhiyun	atmel,pins =
255*4882a593Smuzhiyun		<AT91_PIOE 25 AT91_PERIPH_B AT91_PINCTRL_NONE
256*4882a593Smuzhiyun		 AT91_PIOE 26 AT91_PERIPH_B AT91_PINCTRL_PULL_UP
257*4882a593Smuzhiyun		 AT91_PIOE 8 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
258*4882a593Smuzhiyun};
259