1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun// Copyright (c) 2017 Facebook Inc. 3*4882a593Smuzhiyun/dts-v1/; 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun#include "aspeed-g5.dtsi" 6*4882a593Smuzhiyun#include <dt-bindings/gpio/aspeed-gpio.h> 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun/ { 9*4882a593Smuzhiyun model = "Portwell Neptune BMC"; 10*4882a593Smuzhiyun compatible = "portwell,neptune-bmc", "aspeed,ast2500"; 11*4882a593Smuzhiyun aliases { 12*4882a593Smuzhiyun serial0 = &uart1; 13*4882a593Smuzhiyun serial4 = &uart5; 14*4882a593Smuzhiyun }; 15*4882a593Smuzhiyun chosen { 16*4882a593Smuzhiyun stdout-path = &uart5; 17*4882a593Smuzhiyun bootargs = "console=ttyS4,115200 earlyprintk"; 18*4882a593Smuzhiyun }; 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun memory@80000000 { 21*4882a593Smuzhiyun reg = <0x80000000 0x20000000>; 22*4882a593Smuzhiyun }; 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun leds { 25*4882a593Smuzhiyun compatible = "gpio-leds"; 26*4882a593Smuzhiyun postcode0 { 27*4882a593Smuzhiyun label="BMC_UP"; 28*4882a593Smuzhiyun gpios = <&gpio ASPEED_GPIO(H, 0) GPIO_ACTIVE_HIGH>; 29*4882a593Smuzhiyun default-state = "on"; 30*4882a593Smuzhiyun }; 31*4882a593Smuzhiyun postcode1 { 32*4882a593Smuzhiyun label="BMC_HB"; 33*4882a593Smuzhiyun gpios = <&gpio ASPEED_GPIO(H, 1) GPIO_ACTIVE_HIGH>; 34*4882a593Smuzhiyun linux,default-trigger = "heartbeat"; 35*4882a593Smuzhiyun }; 36*4882a593Smuzhiyun postcode2 { 37*4882a593Smuzhiyun label="FAULT"; 38*4882a593Smuzhiyun gpios = <&gpio ASPEED_GPIO(H, 2) GPIO_ACTIVE_HIGH>; 39*4882a593Smuzhiyun }; 40*4882a593Smuzhiyun // postcode3-7 are GPIOH3-H7 41*4882a593Smuzhiyun }; 42*4882a593Smuzhiyun}; 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun&fmc { 45*4882a593Smuzhiyun status = "okay"; 46*4882a593Smuzhiyun flash@0 { 47*4882a593Smuzhiyun status = "okay"; 48*4882a593Smuzhiyun m25p,fast-read; 49*4882a593Smuzhiyun#include "openbmc-flash-layout.dtsi" 50*4882a593Smuzhiyun }; 51*4882a593Smuzhiyun}; 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun&spi1 { 54*4882a593Smuzhiyun status = "okay"; 55*4882a593Smuzhiyun pinctrl-names = "default"; 56*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_spi1_default>; 57*4882a593Smuzhiyun flash@0 { 58*4882a593Smuzhiyun status = "okay"; 59*4882a593Smuzhiyun m25p,fast-read; 60*4882a593Smuzhiyun label = "pnor"; 61*4882a593Smuzhiyun }; 62*4882a593Smuzhiyun}; 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun&uart1 { 65*4882a593Smuzhiyun // Host Console 66*4882a593Smuzhiyun status = "okay"; 67*4882a593Smuzhiyun pinctrl-names = "default"; 68*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_txd1_default 69*4882a593Smuzhiyun &pinctrl_rxd1_default>; 70*4882a593Smuzhiyun}; 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun&uart5 { 73*4882a593Smuzhiyun // BMC Console 74*4882a593Smuzhiyun status = "okay"; 75*4882a593Smuzhiyun}; 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun&mac0 { 78*4882a593Smuzhiyun status = "okay"; 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun pinctrl-names = "default"; 81*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_rmii1_default 82*4882a593Smuzhiyun &pinctrl_mdio1_default>; 83*4882a593Smuzhiyun clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>, 84*4882a593Smuzhiyun <&syscon ASPEED_CLK_MAC1RCLK>; 85*4882a593Smuzhiyun clock-names = "MACCLK", "RCLK"; 86*4882a593Smuzhiyun}; 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun&mac1 { 89*4882a593Smuzhiyun status = "okay"; 90*4882a593Smuzhiyun pinctrl-names = "default"; 91*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_rmii2_default>; 92*4882a593Smuzhiyun clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>, 93*4882a593Smuzhiyun <&syscon ASPEED_CLK_MAC2RCLK>; 94*4882a593Smuzhiyun clock-names = "MACCLK", "RCLK"; 95*4882a593Smuzhiyun use-ncsi; 96*4882a593Smuzhiyun}; 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun&i2c1 { 99*4882a593Smuzhiyun status = "okay"; 100*4882a593Smuzhiyun // To PCIe slot SMBUS 101*4882a593Smuzhiyun}; 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun&i2c2 { 104*4882a593Smuzhiyun status = "okay"; 105*4882a593Smuzhiyun // To LAN I210 106*4882a593Smuzhiyun}; 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun&i2c3 { 109*4882a593Smuzhiyun status = "okay"; 110*4882a593Smuzhiyun // SMBus to COMe AB 111*4882a593Smuzhiyun}; 112*4882a593Smuzhiyun 113*4882a593Smuzhiyun&i2c4 { 114*4882a593Smuzhiyun status = "okay"; 115*4882a593Smuzhiyun // I2C to COMe AB 116*4882a593Smuzhiyun}; 117*4882a593Smuzhiyun 118*4882a593Smuzhiyun&i2c5 { 119*4882a593Smuzhiyun status = "okay"; 120*4882a593Smuzhiyun// USB Debug card 121*4882a593Smuzhiyun pca9555@27 { 122*4882a593Smuzhiyun compatible = "nxp,pca9555"; 123*4882a593Smuzhiyun reg = <0x27>; 124*4882a593Smuzhiyun }; 125*4882a593Smuzhiyun}; 126*4882a593Smuzhiyun 127*4882a593Smuzhiyun&i2c6 { 128*4882a593Smuzhiyun status = "okay"; 129*4882a593Smuzhiyun tpm@20 { 130*4882a593Smuzhiyun compatible = "infineon,slb9645tt"; 131*4882a593Smuzhiyun reg = <0x20>; 132*4882a593Smuzhiyun }; 133*4882a593Smuzhiyun tmp421@4e { 134*4882a593Smuzhiyun compatible = "ti,tmp421"; 135*4882a593Smuzhiyun reg = <0x4e>; 136*4882a593Smuzhiyun }; 137*4882a593Smuzhiyun tmp421@4f { 138*4882a593Smuzhiyun compatible = "ti,tmp421"; 139*4882a593Smuzhiyun reg = <0x4f>; 140*4882a593Smuzhiyun }; 141*4882a593Smuzhiyun}; 142*4882a593Smuzhiyun 143*4882a593Smuzhiyun&i2c8 { 144*4882a593Smuzhiyun status = "okay"; 145*4882a593Smuzhiyun eeprom@51 { 146*4882a593Smuzhiyun compatible = "atmel,24c128"; 147*4882a593Smuzhiyun reg = <0x51>; 148*4882a593Smuzhiyun pagesize = <32>; 149*4882a593Smuzhiyun }; 150*4882a593Smuzhiyun}; 151*4882a593Smuzhiyun 152*4882a593Smuzhiyun&pwm_tacho { 153*4882a593Smuzhiyun status = "okay"; 154*4882a593Smuzhiyun pinctrl-names = "default"; 155*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default>; 156*4882a593Smuzhiyun fan@0 { 157*4882a593Smuzhiyun reg = <0x00>; 158*4882a593Smuzhiyun aspeed,fan-tach-ch = /bits/ 8 <0x00>; 159*4882a593Smuzhiyun }; 160*4882a593Smuzhiyun 161*4882a593Smuzhiyun fan@1 { 162*4882a593Smuzhiyun reg = <0x00>; 163*4882a593Smuzhiyun aspeed,fan-tach-ch = /bits/ 8 <0x01>; 164*4882a593Smuzhiyun }; 165*4882a593Smuzhiyun}; 166