1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0+ 2*4882a593Smuzhiyun/dts-v1/; 3*4882a593Smuzhiyun#include "aspeed-g5.dtsi" 4*4882a593Smuzhiyun#include <dt-bindings/gpio/aspeed-gpio.h> 5*4882a593Smuzhiyun#include <dt-bindings/leds/leds-pca955x.h> 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun/ { 8*4882a593Smuzhiyun model = "Witherspoon BMC"; 9*4882a593Smuzhiyun compatible = "ibm,witherspoon-bmc", "aspeed,ast2500"; 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun chosen { 12*4882a593Smuzhiyun stdout-path = &uart5; 13*4882a593Smuzhiyun bootargs = "console=ttyS4,115200 earlyprintk"; 14*4882a593Smuzhiyun }; 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun memory@80000000 { 17*4882a593Smuzhiyun reg = <0x80000000 0x20000000>; 18*4882a593Smuzhiyun }; 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun reserved-memory { 21*4882a593Smuzhiyun #address-cells = <1>; 22*4882a593Smuzhiyun #size-cells = <1>; 23*4882a593Smuzhiyun ranges; 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun flash_memory: region@98000000 { 26*4882a593Smuzhiyun no-map; 27*4882a593Smuzhiyun reg = <0x98000000 0x04000000>; /* 64M */ 28*4882a593Smuzhiyun }; 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun vga_memory: region@9f000000 { 31*4882a593Smuzhiyun no-map; 32*4882a593Smuzhiyun compatible = "shared-dma-pool"; 33*4882a593Smuzhiyun reg = <0x9f000000 0x01000000>; /* 16M */ 34*4882a593Smuzhiyun }; 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun gfx_memory: framebuffer { 37*4882a593Smuzhiyun size = <0x01000000>; 38*4882a593Smuzhiyun alignment = <0x01000000>; 39*4882a593Smuzhiyun compatible = "shared-dma-pool"; 40*4882a593Smuzhiyun reusable; 41*4882a593Smuzhiyun }; 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun video_engine_memory: jpegbuffer { 44*4882a593Smuzhiyun size = <0x02000000>; /* 32MM */ 45*4882a593Smuzhiyun alignment = <0x01000000>; 46*4882a593Smuzhiyun compatible = "shared-dma-pool"; 47*4882a593Smuzhiyun reusable; 48*4882a593Smuzhiyun }; 49*4882a593Smuzhiyun }; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun gpio-keys { 52*4882a593Smuzhiyun compatible = "gpio-keys"; 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun air-water { 55*4882a593Smuzhiyun label = "air-water"; 56*4882a593Smuzhiyun gpios = <&gpio ASPEED_GPIO(B, 5) GPIO_ACTIVE_LOW>; 57*4882a593Smuzhiyun linux,code = <ASPEED_GPIO(B, 5)>; 58*4882a593Smuzhiyun }; 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun checkstop { 61*4882a593Smuzhiyun label = "checkstop"; 62*4882a593Smuzhiyun gpios = <&gpio ASPEED_GPIO(J, 2) GPIO_ACTIVE_LOW>; 63*4882a593Smuzhiyun linux,code = <ASPEED_GPIO(J, 2)>; 64*4882a593Smuzhiyun }; 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun ps0-presence { 67*4882a593Smuzhiyun label = "ps0-presence"; 68*4882a593Smuzhiyun gpios = <&gpio ASPEED_GPIO(P, 7) GPIO_ACTIVE_LOW>; 69*4882a593Smuzhiyun linux,code = <ASPEED_GPIO(P, 7)>; 70*4882a593Smuzhiyun }; 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun ps1-presence { 73*4882a593Smuzhiyun label = "ps1-presence"; 74*4882a593Smuzhiyun gpios = <&gpio ASPEED_GPIO(N, 0) GPIO_ACTIVE_LOW>; 75*4882a593Smuzhiyun linux,code = <ASPEED_GPIO(N, 0)>; 76*4882a593Smuzhiyun }; 77*4882a593Smuzhiyun }; 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun iio-hwmon-battery { 80*4882a593Smuzhiyun compatible = "iio-hwmon"; 81*4882a593Smuzhiyun io-channels = <&adc 12>; 82*4882a593Smuzhiyun }; 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun gpio-keys-polled { 85*4882a593Smuzhiyun compatible = "gpio-keys-polled"; 86*4882a593Smuzhiyun poll-interval = <1000>; 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun fan0-presence { 89*4882a593Smuzhiyun label = "fan0-presence"; 90*4882a593Smuzhiyun gpios = <&pca0 4 GPIO_ACTIVE_LOW>; 91*4882a593Smuzhiyun linux,code = <4>; 92*4882a593Smuzhiyun }; 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun fan1-presence { 95*4882a593Smuzhiyun label = "fan1-presence"; 96*4882a593Smuzhiyun gpios = <&pca0 5 GPIO_ACTIVE_LOW>; 97*4882a593Smuzhiyun linux,code = <5>; 98*4882a593Smuzhiyun }; 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun fan2-presence { 101*4882a593Smuzhiyun label = "fan2-presence"; 102*4882a593Smuzhiyun gpios = <&pca0 6 GPIO_ACTIVE_LOW>; 103*4882a593Smuzhiyun linux,code = <6>; 104*4882a593Smuzhiyun }; 105*4882a593Smuzhiyun 106*4882a593Smuzhiyun fan3-presence { 107*4882a593Smuzhiyun label = "fan3-presence"; 108*4882a593Smuzhiyun gpios = <&pca0 7 GPIO_ACTIVE_LOW>; 109*4882a593Smuzhiyun linux,code = <7>; 110*4882a593Smuzhiyun }; 111*4882a593Smuzhiyun }; 112*4882a593Smuzhiyun 113*4882a593Smuzhiyun leds { 114*4882a593Smuzhiyun compatible = "gpio-leds"; 115*4882a593Smuzhiyun 116*4882a593Smuzhiyun fan0 { 117*4882a593Smuzhiyun retain-state-shutdown; 118*4882a593Smuzhiyun default-state = "keep"; 119*4882a593Smuzhiyun gpios = <&pca0 0 GPIO_ACTIVE_LOW>; 120*4882a593Smuzhiyun }; 121*4882a593Smuzhiyun 122*4882a593Smuzhiyun fan1 { 123*4882a593Smuzhiyun retain-state-shutdown; 124*4882a593Smuzhiyun default-state = "keep"; 125*4882a593Smuzhiyun gpios = <&pca0 1 GPIO_ACTIVE_LOW>; 126*4882a593Smuzhiyun }; 127*4882a593Smuzhiyun 128*4882a593Smuzhiyun fan2 { 129*4882a593Smuzhiyun retain-state-shutdown; 130*4882a593Smuzhiyun default-state = "keep"; 131*4882a593Smuzhiyun gpios = <&pca0 2 GPIO_ACTIVE_LOW>; 132*4882a593Smuzhiyun }; 133*4882a593Smuzhiyun 134*4882a593Smuzhiyun fan3 { 135*4882a593Smuzhiyun retain-state-shutdown; 136*4882a593Smuzhiyun default-state = "keep"; 137*4882a593Smuzhiyun gpios = <&pca0 3 GPIO_ACTIVE_LOW>; 138*4882a593Smuzhiyun }; 139*4882a593Smuzhiyun 140*4882a593Smuzhiyun front-fault { 141*4882a593Smuzhiyun retain-state-shutdown; 142*4882a593Smuzhiyun default-state = "keep"; 143*4882a593Smuzhiyun gpios = <&pca0 13 GPIO_ACTIVE_LOW>; 144*4882a593Smuzhiyun }; 145*4882a593Smuzhiyun 146*4882a593Smuzhiyun front-power { 147*4882a593Smuzhiyun retain-state-shutdown; 148*4882a593Smuzhiyun default-state = "keep"; 149*4882a593Smuzhiyun gpios = <&pca0 14 GPIO_ACTIVE_LOW>; 150*4882a593Smuzhiyun }; 151*4882a593Smuzhiyun 152*4882a593Smuzhiyun front-id { 153*4882a593Smuzhiyun retain-state-shutdown; 154*4882a593Smuzhiyun default-state = "keep"; 155*4882a593Smuzhiyun gpios = <&pca0 15 GPIO_ACTIVE_LOW>; 156*4882a593Smuzhiyun }; 157*4882a593Smuzhiyun 158*4882a593Smuzhiyun rear-fault { 159*4882a593Smuzhiyun gpios = <&gpio ASPEED_GPIO(N, 2) GPIO_ACTIVE_LOW>; 160*4882a593Smuzhiyun }; 161*4882a593Smuzhiyun 162*4882a593Smuzhiyun rear-id { 163*4882a593Smuzhiyun gpios = <&gpio ASPEED_GPIO(N, 4) GPIO_ACTIVE_LOW>; 164*4882a593Smuzhiyun }; 165*4882a593Smuzhiyun 166*4882a593Smuzhiyun rear-power { 167*4882a593Smuzhiyun gpios = <&gpio ASPEED_GPIO(N, 3) GPIO_ACTIVE_LOW>; 168*4882a593Smuzhiyun }; 169*4882a593Smuzhiyun 170*4882a593Smuzhiyun power-button { 171*4882a593Smuzhiyun gpios = <&gpio ASPEED_GPIO(R, 5) GPIO_ACTIVE_LOW>; 172*4882a593Smuzhiyun }; 173*4882a593Smuzhiyun }; 174*4882a593Smuzhiyun 175*4882a593Smuzhiyun fsi: gpio-fsi { 176*4882a593Smuzhiyun compatible = "fsi-master-gpio", "fsi-master"; 177*4882a593Smuzhiyun #address-cells = <2>; 178*4882a593Smuzhiyun #size-cells = <0>; 179*4882a593Smuzhiyun no-gpio-delays; 180*4882a593Smuzhiyun 181*4882a593Smuzhiyun clock-gpios = <&gpio ASPEED_GPIO(AA, 0) GPIO_ACTIVE_HIGH>; 182*4882a593Smuzhiyun data-gpios = <&gpio ASPEED_GPIO(E, 0) GPIO_ACTIVE_HIGH>; 183*4882a593Smuzhiyun mux-gpios = <&gpio ASPEED_GPIO(A, 6) GPIO_ACTIVE_HIGH>; 184*4882a593Smuzhiyun enable-gpios = <&gpio ASPEED_GPIO(D, 0) GPIO_ACTIVE_HIGH>; 185*4882a593Smuzhiyun trans-gpios = <&gpio ASPEED_GPIO(R, 2) GPIO_ACTIVE_HIGH>; 186*4882a593Smuzhiyun }; 187*4882a593Smuzhiyun 188*4882a593Smuzhiyun iio-hwmon-dps310 { 189*4882a593Smuzhiyun compatible = "iio-hwmon"; 190*4882a593Smuzhiyun io-channels = <&dps 0>; 191*4882a593Smuzhiyun }; 192*4882a593Smuzhiyun 193*4882a593Smuzhiyun iio-hwmon-bmp280 { 194*4882a593Smuzhiyun compatible = "iio-hwmon"; 195*4882a593Smuzhiyun io-channels = <&bmp 1>; 196*4882a593Smuzhiyun }; 197*4882a593Smuzhiyun 198*4882a593Smuzhiyun}; 199*4882a593Smuzhiyun 200*4882a593Smuzhiyun&gpio { 201*4882a593Smuzhiyun gpio-line-names = 202*4882a593Smuzhiyun /*A0-A7*/ "","cfam-reset","","","","","fsi-mux","", 203*4882a593Smuzhiyun /*B0-B7*/ "","","","","","air-water","","", 204*4882a593Smuzhiyun /*C0-C7*/ "","","","","","","","", 205*4882a593Smuzhiyun /*D0-D7*/ "fsi-enable","","","","","","","", 206*4882a593Smuzhiyun /*E0-E7*/ "fsi-data","","","","","","","", 207*4882a593Smuzhiyun /*F0-F7*/ "","","","","","","","", 208*4882a593Smuzhiyun /*G0-G7*/ "","","","","","","","", 209*4882a593Smuzhiyun /*H0-H7*/ "","","","","","","","", 210*4882a593Smuzhiyun /*I0-I7*/ "","","","","","","","", 211*4882a593Smuzhiyun /*J0-J7*/ "","","checkstop","","","","","", 212*4882a593Smuzhiyun /*K0-K7*/ "","","","","","","","", 213*4882a593Smuzhiyun /*L0-L7*/ "","","","","","","","", 214*4882a593Smuzhiyun /*M0-M7*/ "","","","","","","","", 215*4882a593Smuzhiyun /*N0-N7*/ "presence-ps1","","led-rear-fault","led-rear-power", 216*4882a593Smuzhiyun "led-rear-id","","","", 217*4882a593Smuzhiyun /*O0-O7*/ "","","","","","","","", 218*4882a593Smuzhiyun /*P0-P7*/ "","","","","","","","presence-ps0", 219*4882a593Smuzhiyun /*Q0-Q7*/ "","","","","","","","", 220*4882a593Smuzhiyun /*R0-R7*/ "","","fsi-trans","","","power-button","","", 221*4882a593Smuzhiyun /*S0-S7*/ "","","","","","","","", 222*4882a593Smuzhiyun /*T0-T7*/ "","","","","","","","", 223*4882a593Smuzhiyun /*U0-U7*/ "","","","","","","","", 224*4882a593Smuzhiyun /*V0-V7*/ "","","","","","","","", 225*4882a593Smuzhiyun /*W0-W7*/ "","","","","","","","", 226*4882a593Smuzhiyun /*X0-X7*/ "","","","","","","","", 227*4882a593Smuzhiyun /*Y0-Y7*/ "","","","","","","","", 228*4882a593Smuzhiyun /*Z0-Z7*/ "","","","","","","","", 229*4882a593Smuzhiyun /*AA0-AA7*/ "fsi-clock","","","","","","","", 230*4882a593Smuzhiyun /*AB0-AB7*/ "","","","","","","","", 231*4882a593Smuzhiyun /*AC0-AC7*/ "","","","","","","",""; 232*4882a593Smuzhiyun}; 233*4882a593Smuzhiyun 234*4882a593Smuzhiyun&fmc { 235*4882a593Smuzhiyun status = "okay"; 236*4882a593Smuzhiyun 237*4882a593Smuzhiyun flash@0 { 238*4882a593Smuzhiyun status = "okay"; 239*4882a593Smuzhiyun label = "bmc"; 240*4882a593Smuzhiyun m25p,fast-read; 241*4882a593Smuzhiyun spi-max-frequency = <50000000>; 242*4882a593Smuzhiyun 243*4882a593Smuzhiyun partitions { 244*4882a593Smuzhiyun #address-cells = < 1 >; 245*4882a593Smuzhiyun #size-cells = < 1 >; 246*4882a593Smuzhiyun compatible = "fixed-partitions"; 247*4882a593Smuzhiyun u-boot@0 { 248*4882a593Smuzhiyun reg = < 0 0x60000 >; 249*4882a593Smuzhiyun label = "u-boot"; 250*4882a593Smuzhiyun }; 251*4882a593Smuzhiyun u-boot-env@60000 { 252*4882a593Smuzhiyun reg = < 0x60000 0x20000 >; 253*4882a593Smuzhiyun label = "u-boot-env"; 254*4882a593Smuzhiyun }; 255*4882a593Smuzhiyun obmc-ubi@80000 { 256*4882a593Smuzhiyun reg = < 0x80000 0x1F80000 >; 257*4882a593Smuzhiyun label = "obmc-ubi"; 258*4882a593Smuzhiyun }; 259*4882a593Smuzhiyun }; 260*4882a593Smuzhiyun }; 261*4882a593Smuzhiyun 262*4882a593Smuzhiyun flash@1 { 263*4882a593Smuzhiyun status = "okay"; 264*4882a593Smuzhiyun label = "alt-bmc"; 265*4882a593Smuzhiyun m25p,fast-read; 266*4882a593Smuzhiyun spi-max-frequency = <50000000>; 267*4882a593Smuzhiyun 268*4882a593Smuzhiyun partitions { 269*4882a593Smuzhiyun #address-cells = < 1 >; 270*4882a593Smuzhiyun #size-cells = < 1 >; 271*4882a593Smuzhiyun compatible = "fixed-partitions"; 272*4882a593Smuzhiyun u-boot@0 { 273*4882a593Smuzhiyun reg = < 0 0x60000 >; 274*4882a593Smuzhiyun label = "alt-u-boot"; 275*4882a593Smuzhiyun }; 276*4882a593Smuzhiyun u-boot-env@60000 { 277*4882a593Smuzhiyun reg = < 0x60000 0x20000 >; 278*4882a593Smuzhiyun label = "alt-u-boot-env"; 279*4882a593Smuzhiyun }; 280*4882a593Smuzhiyun obmc-ubi@80000 { 281*4882a593Smuzhiyun reg = < 0x80000 0x1F80000 >; 282*4882a593Smuzhiyun label = "alt-obmc-ubi"; 283*4882a593Smuzhiyun }; 284*4882a593Smuzhiyun }; 285*4882a593Smuzhiyun }; 286*4882a593Smuzhiyun}; 287*4882a593Smuzhiyun 288*4882a593Smuzhiyun&spi1 { 289*4882a593Smuzhiyun status = "okay"; 290*4882a593Smuzhiyun pinctrl-names = "default"; 291*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_spi1_default>; 292*4882a593Smuzhiyun 293*4882a593Smuzhiyun flash@0 { 294*4882a593Smuzhiyun status = "okay"; 295*4882a593Smuzhiyun label = "pnor"; 296*4882a593Smuzhiyun m25p,fast-read; 297*4882a593Smuzhiyun spi-max-frequency = <100000000>; 298*4882a593Smuzhiyun }; 299*4882a593Smuzhiyun}; 300*4882a593Smuzhiyun 301*4882a593Smuzhiyun&uart1 { 302*4882a593Smuzhiyun /* Rear RS-232 connector */ 303*4882a593Smuzhiyun status = "okay"; 304*4882a593Smuzhiyun pinctrl-names = "default"; 305*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_txd1_default 306*4882a593Smuzhiyun &pinctrl_rxd1_default 307*4882a593Smuzhiyun &pinctrl_nrts1_default 308*4882a593Smuzhiyun &pinctrl_ndtr1_default 309*4882a593Smuzhiyun &pinctrl_ndsr1_default 310*4882a593Smuzhiyun &pinctrl_ncts1_default 311*4882a593Smuzhiyun &pinctrl_ndcd1_default 312*4882a593Smuzhiyun &pinctrl_nri1_default>; 313*4882a593Smuzhiyun}; 314*4882a593Smuzhiyun 315*4882a593Smuzhiyun&uart2 { 316*4882a593Smuzhiyun /* APSS */ 317*4882a593Smuzhiyun status = "okay"; 318*4882a593Smuzhiyun pinctrl-names = "default"; 319*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>; 320*4882a593Smuzhiyun}; 321*4882a593Smuzhiyun 322*4882a593Smuzhiyun&uart5 { 323*4882a593Smuzhiyun status = "okay"; 324*4882a593Smuzhiyun}; 325*4882a593Smuzhiyun 326*4882a593Smuzhiyun&lpc_ctrl { 327*4882a593Smuzhiyun status = "okay"; 328*4882a593Smuzhiyun memory-region = <&flash_memory>; 329*4882a593Smuzhiyun flash = <&spi1>; 330*4882a593Smuzhiyun}; 331*4882a593Smuzhiyun 332*4882a593Smuzhiyun&mac0 { 333*4882a593Smuzhiyun status = "okay"; 334*4882a593Smuzhiyun pinctrl-names = "default"; 335*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_rmii1_default>; 336*4882a593Smuzhiyun clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>, 337*4882a593Smuzhiyun <&syscon ASPEED_CLK_MAC1RCLK>; 338*4882a593Smuzhiyun clock-names = "MACCLK", "RCLK"; 339*4882a593Smuzhiyun use-ncsi; 340*4882a593Smuzhiyun}; 341*4882a593Smuzhiyun 342*4882a593Smuzhiyun&i2c2 { 343*4882a593Smuzhiyun status = "okay"; 344*4882a593Smuzhiyun 345*4882a593Smuzhiyun /* MUX -> 346*4882a593Smuzhiyun * Samtec 1 347*4882a593Smuzhiyun * Samtec 2 348*4882a593Smuzhiyun */ 349*4882a593Smuzhiyun}; 350*4882a593Smuzhiyun 351*4882a593Smuzhiyun&i2c3 { 352*4882a593Smuzhiyun status = "okay"; 353*4882a593Smuzhiyun 354*4882a593Smuzhiyun bmp: bmp280@77 { 355*4882a593Smuzhiyun compatible = "bosch,bmp280"; 356*4882a593Smuzhiyun reg = <0x77>; 357*4882a593Smuzhiyun #io-channel-cells = <1>; 358*4882a593Smuzhiyun }; 359*4882a593Smuzhiyun 360*4882a593Smuzhiyun max31785@52 { 361*4882a593Smuzhiyun compatible = "maxim,max31785a"; 362*4882a593Smuzhiyun reg = <0x52>; 363*4882a593Smuzhiyun #address-cells = <1>; 364*4882a593Smuzhiyun #size-cells = <0>; 365*4882a593Smuzhiyun }; 366*4882a593Smuzhiyun 367*4882a593Smuzhiyun dps: dps310@76 { 368*4882a593Smuzhiyun compatible = "infineon,dps310"; 369*4882a593Smuzhiyun reg = <0x76>; 370*4882a593Smuzhiyun #io-channel-cells = <0>; 371*4882a593Smuzhiyun }; 372*4882a593Smuzhiyun 373*4882a593Smuzhiyun pca0: pca9552@60 { 374*4882a593Smuzhiyun compatible = "nxp,pca9552"; 375*4882a593Smuzhiyun reg = <0x60>; 376*4882a593Smuzhiyun #address-cells = <1>; 377*4882a593Smuzhiyun #size-cells = <0>; 378*4882a593Smuzhiyun 379*4882a593Smuzhiyun gpio-controller; 380*4882a593Smuzhiyun #gpio-cells = <2>; 381*4882a593Smuzhiyun 382*4882a593Smuzhiyun gpio@0 { 383*4882a593Smuzhiyun reg = <0>; 384*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 385*4882a593Smuzhiyun }; 386*4882a593Smuzhiyun 387*4882a593Smuzhiyun gpio@1 { 388*4882a593Smuzhiyun reg = <1>; 389*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 390*4882a593Smuzhiyun }; 391*4882a593Smuzhiyun 392*4882a593Smuzhiyun gpio@2 { 393*4882a593Smuzhiyun reg = <2>; 394*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 395*4882a593Smuzhiyun }; 396*4882a593Smuzhiyun 397*4882a593Smuzhiyun gpio@3 { 398*4882a593Smuzhiyun reg = <3>; 399*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 400*4882a593Smuzhiyun }; 401*4882a593Smuzhiyun 402*4882a593Smuzhiyun gpio@4 { 403*4882a593Smuzhiyun reg = <4>; 404*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 405*4882a593Smuzhiyun }; 406*4882a593Smuzhiyun 407*4882a593Smuzhiyun gpio@5 { 408*4882a593Smuzhiyun reg = <5>; 409*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 410*4882a593Smuzhiyun }; 411*4882a593Smuzhiyun 412*4882a593Smuzhiyun gpio@6 { 413*4882a593Smuzhiyun reg = <6>; 414*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 415*4882a593Smuzhiyun }; 416*4882a593Smuzhiyun 417*4882a593Smuzhiyun gpio@7 { 418*4882a593Smuzhiyun reg = <7>; 419*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 420*4882a593Smuzhiyun }; 421*4882a593Smuzhiyun 422*4882a593Smuzhiyun gpio@8 { 423*4882a593Smuzhiyun reg = <8>; 424*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 425*4882a593Smuzhiyun }; 426*4882a593Smuzhiyun 427*4882a593Smuzhiyun gpio@9 { 428*4882a593Smuzhiyun reg = <9>; 429*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 430*4882a593Smuzhiyun }; 431*4882a593Smuzhiyun 432*4882a593Smuzhiyun gpio@10 { 433*4882a593Smuzhiyun reg = <10>; 434*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 435*4882a593Smuzhiyun }; 436*4882a593Smuzhiyun 437*4882a593Smuzhiyun gpio@11 { 438*4882a593Smuzhiyun reg = <11>; 439*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 440*4882a593Smuzhiyun }; 441*4882a593Smuzhiyun 442*4882a593Smuzhiyun gpio@12 { 443*4882a593Smuzhiyun reg = <12>; 444*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 445*4882a593Smuzhiyun }; 446*4882a593Smuzhiyun 447*4882a593Smuzhiyun gpio@13 { 448*4882a593Smuzhiyun reg = <13>; 449*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 450*4882a593Smuzhiyun }; 451*4882a593Smuzhiyun 452*4882a593Smuzhiyun gpio@14 { 453*4882a593Smuzhiyun reg = <14>; 454*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 455*4882a593Smuzhiyun }; 456*4882a593Smuzhiyun 457*4882a593Smuzhiyun gpio@15 { 458*4882a593Smuzhiyun reg = <15>; 459*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 460*4882a593Smuzhiyun }; 461*4882a593Smuzhiyun }; 462*4882a593Smuzhiyun 463*4882a593Smuzhiyun power-supply@68 { 464*4882a593Smuzhiyun compatible = "ibm,cffps1"; 465*4882a593Smuzhiyun reg = <0x68>; 466*4882a593Smuzhiyun }; 467*4882a593Smuzhiyun 468*4882a593Smuzhiyun power-supply@69 { 469*4882a593Smuzhiyun compatible = "ibm,cffps1"; 470*4882a593Smuzhiyun reg = <0x69>; 471*4882a593Smuzhiyun }; 472*4882a593Smuzhiyun}; 473*4882a593Smuzhiyun 474*4882a593Smuzhiyun&i2c4 { 475*4882a593Smuzhiyun status = "okay"; 476*4882a593Smuzhiyun 477*4882a593Smuzhiyun tmp423a@4c { 478*4882a593Smuzhiyun compatible = "ti,tmp423"; 479*4882a593Smuzhiyun reg = <0x4c>; 480*4882a593Smuzhiyun }; 481*4882a593Smuzhiyun 482*4882a593Smuzhiyun ir35221@70 { 483*4882a593Smuzhiyun compatible = "infineon,ir35221"; 484*4882a593Smuzhiyun reg = <0x70>; 485*4882a593Smuzhiyun }; 486*4882a593Smuzhiyun 487*4882a593Smuzhiyun ir35221@71 { 488*4882a593Smuzhiyun compatible = "infineon,ir35221"; 489*4882a593Smuzhiyun reg = <0x71>; 490*4882a593Smuzhiyun }; 491*4882a593Smuzhiyun}; 492*4882a593Smuzhiyun 493*4882a593Smuzhiyun 494*4882a593Smuzhiyun&i2c5 { 495*4882a593Smuzhiyun status = "okay"; 496*4882a593Smuzhiyun 497*4882a593Smuzhiyun tmp423a@4c { 498*4882a593Smuzhiyun compatible = "ti,tmp423"; 499*4882a593Smuzhiyun reg = <0x4c>; 500*4882a593Smuzhiyun }; 501*4882a593Smuzhiyun 502*4882a593Smuzhiyun ir35221@70 { 503*4882a593Smuzhiyun compatible = "infineon,ir35221"; 504*4882a593Smuzhiyun reg = <0x70>; 505*4882a593Smuzhiyun }; 506*4882a593Smuzhiyun 507*4882a593Smuzhiyun ir35221@71 { 508*4882a593Smuzhiyun compatible = "infineon,ir35221"; 509*4882a593Smuzhiyun reg = <0x71>; 510*4882a593Smuzhiyun }; 511*4882a593Smuzhiyun}; 512*4882a593Smuzhiyun 513*4882a593Smuzhiyun&i2c9 { 514*4882a593Smuzhiyun status = "okay"; 515*4882a593Smuzhiyun 516*4882a593Smuzhiyun tmp275@4a { 517*4882a593Smuzhiyun compatible = "ti,tmp275"; 518*4882a593Smuzhiyun reg = <0x4a>; 519*4882a593Smuzhiyun }; 520*4882a593Smuzhiyun}; 521*4882a593Smuzhiyun 522*4882a593Smuzhiyun&i2c10 { 523*4882a593Smuzhiyun /* MUX 524*4882a593Smuzhiyun * -> PCIe Slot 3 525*4882a593Smuzhiyun * -> PCIe Slot 4 526*4882a593Smuzhiyun */ 527*4882a593Smuzhiyun status = "okay"; 528*4882a593Smuzhiyun}; 529*4882a593Smuzhiyun 530*4882a593Smuzhiyun&i2c11 { 531*4882a593Smuzhiyun status = "okay"; 532*4882a593Smuzhiyun 533*4882a593Smuzhiyun pca9552: pca9552@60 { 534*4882a593Smuzhiyun compatible = "nxp,pca9552"; 535*4882a593Smuzhiyun reg = <0x60>; 536*4882a593Smuzhiyun #address-cells = <1>; 537*4882a593Smuzhiyun #size-cells = <0>; 538*4882a593Smuzhiyun gpio-controller; 539*4882a593Smuzhiyun #gpio-cells = <2>; 540*4882a593Smuzhiyun 541*4882a593Smuzhiyun gpio-line-names = "PS_SMBUS_RESET_N", "APSS_RESET_N", 542*4882a593Smuzhiyun "GPU0_TH_OVERT_N_BUFF", "GPU1_TH_OVERT_N_BUFF", 543*4882a593Smuzhiyun "GPU2_TH_OVERT_N_BUFF", "GPU3_TH_OVERT_N_BUFF", 544*4882a593Smuzhiyun "GPU4_TH_OVERT_N_BUFF", "GPU5_TH_OVERT_N_BUFF", 545*4882a593Smuzhiyun "GPU0_PWR_GOOD_BUFF", "GPU1_PWR_GOOD_BUFF", 546*4882a593Smuzhiyun "GPU2_PWR_GOOD_BUFF", "GPU3_PWR_GOOD_BUFF", 547*4882a593Smuzhiyun "GPU4_PWR_GOOD_BUFF", "GPU5_PWR_GOOD_BUFF", 548*4882a593Smuzhiyun "12V_BREAKER_FLT_N", "THROTTLE_UNLATCHED_N"; 549*4882a593Smuzhiyun 550*4882a593Smuzhiyun gpio@0 { 551*4882a593Smuzhiyun reg = <0>; 552*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 553*4882a593Smuzhiyun }; 554*4882a593Smuzhiyun 555*4882a593Smuzhiyun gpio@1 { 556*4882a593Smuzhiyun reg = <1>; 557*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 558*4882a593Smuzhiyun }; 559*4882a593Smuzhiyun 560*4882a593Smuzhiyun gpio@2 { 561*4882a593Smuzhiyun reg = <2>; 562*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 563*4882a593Smuzhiyun }; 564*4882a593Smuzhiyun 565*4882a593Smuzhiyun gpio@3 { 566*4882a593Smuzhiyun reg = <3>; 567*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 568*4882a593Smuzhiyun }; 569*4882a593Smuzhiyun 570*4882a593Smuzhiyun gpio@4 { 571*4882a593Smuzhiyun reg = <4>; 572*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 573*4882a593Smuzhiyun }; 574*4882a593Smuzhiyun 575*4882a593Smuzhiyun gpio@5 { 576*4882a593Smuzhiyun reg = <5>; 577*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 578*4882a593Smuzhiyun }; 579*4882a593Smuzhiyun 580*4882a593Smuzhiyun gpio@6 { 581*4882a593Smuzhiyun reg = <6>; 582*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 583*4882a593Smuzhiyun }; 584*4882a593Smuzhiyun 585*4882a593Smuzhiyun gpio@7 { 586*4882a593Smuzhiyun reg = <7>; 587*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 588*4882a593Smuzhiyun }; 589*4882a593Smuzhiyun 590*4882a593Smuzhiyun gpio@8 { 591*4882a593Smuzhiyun reg = <8>; 592*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 593*4882a593Smuzhiyun }; 594*4882a593Smuzhiyun 595*4882a593Smuzhiyun gpio@9 { 596*4882a593Smuzhiyun reg = <9>; 597*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 598*4882a593Smuzhiyun }; 599*4882a593Smuzhiyun 600*4882a593Smuzhiyun gpio@10 { 601*4882a593Smuzhiyun reg = <10>; 602*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 603*4882a593Smuzhiyun }; 604*4882a593Smuzhiyun 605*4882a593Smuzhiyun gpio@11 { 606*4882a593Smuzhiyun reg = <11>; 607*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 608*4882a593Smuzhiyun }; 609*4882a593Smuzhiyun 610*4882a593Smuzhiyun gpio@12 { 611*4882a593Smuzhiyun reg = <12>; 612*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 613*4882a593Smuzhiyun }; 614*4882a593Smuzhiyun 615*4882a593Smuzhiyun gpio@13 { 616*4882a593Smuzhiyun reg = <13>; 617*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 618*4882a593Smuzhiyun }; 619*4882a593Smuzhiyun 620*4882a593Smuzhiyun gpio@14 { 621*4882a593Smuzhiyun reg = <14>; 622*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 623*4882a593Smuzhiyun }; 624*4882a593Smuzhiyun 625*4882a593Smuzhiyun gpio@15 { 626*4882a593Smuzhiyun reg = <15>; 627*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 628*4882a593Smuzhiyun }; 629*4882a593Smuzhiyun }; 630*4882a593Smuzhiyun 631*4882a593Smuzhiyun rtc@32 { 632*4882a593Smuzhiyun compatible = "epson,rx8900"; 633*4882a593Smuzhiyun reg = <0x32>; 634*4882a593Smuzhiyun }; 635*4882a593Smuzhiyun 636*4882a593Smuzhiyun eeprom@51 { 637*4882a593Smuzhiyun compatible = "atmel,24c64"; 638*4882a593Smuzhiyun reg = <0x51>; 639*4882a593Smuzhiyun }; 640*4882a593Smuzhiyun 641*4882a593Smuzhiyun ucd90160@64 { 642*4882a593Smuzhiyun compatible = "ti,ucd90160"; 643*4882a593Smuzhiyun reg = <0x64>; 644*4882a593Smuzhiyun }; 645*4882a593Smuzhiyun}; 646*4882a593Smuzhiyun 647*4882a593Smuzhiyun&i2c12 { 648*4882a593Smuzhiyun status = "okay"; 649*4882a593Smuzhiyun}; 650*4882a593Smuzhiyun 651*4882a593Smuzhiyun&i2c13 { 652*4882a593Smuzhiyun status = "okay"; 653*4882a593Smuzhiyun}; 654*4882a593Smuzhiyun 655*4882a593Smuzhiyun&vuart { 656*4882a593Smuzhiyun status = "okay"; 657*4882a593Smuzhiyun}; 658*4882a593Smuzhiyun 659*4882a593Smuzhiyun&gfx { 660*4882a593Smuzhiyun status = "okay"; 661*4882a593Smuzhiyun memory-region = <&gfx_memory>; 662*4882a593Smuzhiyun}; 663*4882a593Smuzhiyun 664*4882a593Smuzhiyun&pinctrl { 665*4882a593Smuzhiyun aspeed,external-nodes = <&gfx &lhc>; 666*4882a593Smuzhiyun}; 667*4882a593Smuzhiyun 668*4882a593Smuzhiyun&wdt1 { 669*4882a593Smuzhiyun aspeed,reset-type = "none"; 670*4882a593Smuzhiyun aspeed,external-signal; 671*4882a593Smuzhiyun aspeed,ext-push-pull; 672*4882a593Smuzhiyun aspeed,ext-active-high; 673*4882a593Smuzhiyun 674*4882a593Smuzhiyun pinctrl-names = "default"; 675*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_wdtrst1_default>; 676*4882a593Smuzhiyun}; 677*4882a593Smuzhiyun 678*4882a593Smuzhiyun&wdt2 { 679*4882a593Smuzhiyun aspeed,alt-boot; 680*4882a593Smuzhiyun}; 681*4882a593Smuzhiyun 682*4882a593Smuzhiyun&ibt { 683*4882a593Smuzhiyun status = "okay"; 684*4882a593Smuzhiyun}; 685*4882a593Smuzhiyun 686*4882a593Smuzhiyun&adc { 687*4882a593Smuzhiyun status = "okay"; 688*4882a593Smuzhiyun}; 689*4882a593Smuzhiyun 690*4882a593Smuzhiyun&vhub { 691*4882a593Smuzhiyun status = "okay"; 692*4882a593Smuzhiyun}; 693*4882a593Smuzhiyun 694*4882a593Smuzhiyun&video { 695*4882a593Smuzhiyun status = "okay"; 696*4882a593Smuzhiyun memory-region = <&video_engine_memory>; 697*4882a593Smuzhiyun}; 698*4882a593Smuzhiyun 699*4882a593Smuzhiyun&xdma { 700*4882a593Smuzhiyun status = "okay"; 701*4882a593Smuzhiyun memory-region = <&vga_memory>; 702*4882a593Smuzhiyun}; 703*4882a593Smuzhiyun 704*4882a593Smuzhiyun#include "ibm-power9-dual.dtsi" 705