1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-or-later 2*4882a593Smuzhiyun// Copyright 2019 IBM Corp. 3*4882a593Smuzhiyun/dts-v1/; 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun#include "aspeed-g6.dtsi" 6*4882a593Smuzhiyun#include <dt-bindings/gpio/aspeed-gpio.h> 7*4882a593Smuzhiyun#include <dt-bindings/i2c/i2c.h> 8*4882a593Smuzhiyun#include <dt-bindings/leds/leds-pca955x.h> 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun/ { 11*4882a593Smuzhiyun model = "Tacoma"; 12*4882a593Smuzhiyun compatible = "ibm,tacoma-bmc", "aspeed,ast2600"; 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun chosen { 15*4882a593Smuzhiyun stdout-path = &uart5; 16*4882a593Smuzhiyun bootargs = "console=ttyS4,115200n8"; 17*4882a593Smuzhiyun }; 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun memory@80000000 { 20*4882a593Smuzhiyun device_type = "memory"; 21*4882a593Smuzhiyun reg = <0x80000000 0x40000000>; 22*4882a593Smuzhiyun }; 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun reserved-memory { 25*4882a593Smuzhiyun #address-cells = <1>; 26*4882a593Smuzhiyun #size-cells = <1>; 27*4882a593Smuzhiyun ranges; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun flash_memory: region@b8000000 { 30*4882a593Smuzhiyun no-map; 31*4882a593Smuzhiyun reg = <0xb8000000 0x4000000>; /* 64M */ 32*4882a593Smuzhiyun }; 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun vga_memory: region@bf000000 { 35*4882a593Smuzhiyun no-map; 36*4882a593Smuzhiyun compatible = "shared-dma-pool"; 37*4882a593Smuzhiyun reg = <0xbf000000 0x01000000>; /* 16M */ 38*4882a593Smuzhiyun }; 39*4882a593Smuzhiyun }; 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun gpio-keys { 42*4882a593Smuzhiyun compatible = "gpio-keys"; 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun ps0-presence { 45*4882a593Smuzhiyun label = "ps0-presence"; 46*4882a593Smuzhiyun gpios = <&gpio0 ASPEED_GPIO(H, 3) GPIO_ACTIVE_LOW>; 47*4882a593Smuzhiyun linux,code = <ASPEED_GPIO(H, 3)>; 48*4882a593Smuzhiyun }; 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun ps1-presence { 51*4882a593Smuzhiyun label = "ps1-presence"; 52*4882a593Smuzhiyun gpios = <&gpio0 ASPEED_GPIO(E, 5) GPIO_ACTIVE_LOW>; 53*4882a593Smuzhiyun linux,code = <ASPEED_GPIO(E, 5)>; 54*4882a593Smuzhiyun }; 55*4882a593Smuzhiyun }; 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun gpio-keys-polled { 58*4882a593Smuzhiyun compatible = "gpio-keys-polled"; 59*4882a593Smuzhiyun #address-cells = <1>; 60*4882a593Smuzhiyun #size-cells = <0>; 61*4882a593Smuzhiyun poll-interval = <1000>; 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun fan0-presence { 64*4882a593Smuzhiyun label = "fan0-presence"; 65*4882a593Smuzhiyun gpios = <&pca0 4 GPIO_ACTIVE_LOW>; 66*4882a593Smuzhiyun linux,code = <4>; 67*4882a593Smuzhiyun }; 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun fan1-presence { 70*4882a593Smuzhiyun label = "fan1-presence"; 71*4882a593Smuzhiyun gpios = <&pca0 5 GPIO_ACTIVE_LOW>; 72*4882a593Smuzhiyun linux,code = <5>; 73*4882a593Smuzhiyun }; 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun fan2-presence { 76*4882a593Smuzhiyun label = "fan2-presence"; 77*4882a593Smuzhiyun gpios = <&pca0 6 GPIO_ACTIVE_LOW>; 78*4882a593Smuzhiyun linux,code = <6>; 79*4882a593Smuzhiyun }; 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun fan3-presence { 82*4882a593Smuzhiyun label = "fan3-presence"; 83*4882a593Smuzhiyun gpios = <&pca0 7 GPIO_ACTIVE_LOW>; 84*4882a593Smuzhiyun linux,code = <7>; 85*4882a593Smuzhiyun }; 86*4882a593Smuzhiyun }; 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun iio-hwmon-dps310 { 89*4882a593Smuzhiyun compatible = "iio-hwmon"; 90*4882a593Smuzhiyun io-channels = <&dps 0>; 91*4882a593Smuzhiyun }; 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun iio-hwmon-bmp280 { 94*4882a593Smuzhiyun compatible = "iio-hwmon"; 95*4882a593Smuzhiyun io-channels = <&bmp 1>; 96*4882a593Smuzhiyun }; 97*4882a593Smuzhiyun}; 98*4882a593Smuzhiyun 99*4882a593Smuzhiyun&ehci1 { 100*4882a593Smuzhiyun status = "okay"; 101*4882a593Smuzhiyun}; 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun&gpio0 { 104*4882a593Smuzhiyun gpio-line-names = 105*4882a593Smuzhiyun /*A0-A7*/ "","","","","","","","", 106*4882a593Smuzhiyun /*B0-B7*/ "fsi-mux","","","","","","","", 107*4882a593Smuzhiyun /*C0-C7*/ "","","","","","","","", 108*4882a593Smuzhiyun /*D0-D7*/ "","","","","","","","", 109*4882a593Smuzhiyun /*E0-E7*/ "power-button","","","checkstop","","presence-ps1","","led-rear-fault", 110*4882a593Smuzhiyun /*F0-F7*/ "","","","","","","","", 111*4882a593Smuzhiyun /*G0-G7*/ "","","","","","","","", 112*4882a593Smuzhiyun /*H0-H7*/ "","","","presence-ps0","","","","", 113*4882a593Smuzhiyun /*I0-I7*/ "","","","","","","","", 114*4882a593Smuzhiyun /*J0-J7*/ "","","","","","","","", 115*4882a593Smuzhiyun /*K0-K7*/ "","","","","","","","", 116*4882a593Smuzhiyun /*L0-L7*/ "","","","","","","","", 117*4882a593Smuzhiyun /*M0-M7*/ "","","","","","","","", 118*4882a593Smuzhiyun /*N0-N7*/ "","","","","","","","", 119*4882a593Smuzhiyun /*O0-O7*/ "led-rear-power","led-rear-id","","usb-power","","","","", 120*4882a593Smuzhiyun /*P0-P7*/ "","","","","","","","", 121*4882a593Smuzhiyun /*Q0-Q7*/ "cfam-reset","","","","","","","fsi-routing", 122*4882a593Smuzhiyun /*R0-R7*/ "","","","","","","","", 123*4882a593Smuzhiyun /*S0-S7*/ "","","","","","","","", 124*4882a593Smuzhiyun /*T0-T7*/ "","","","","","","","", 125*4882a593Smuzhiyun /*U0-U7*/ "","","","","","","","", 126*4882a593Smuzhiyun /*V0-V7*/ "","","","","","","","", 127*4882a593Smuzhiyun /*W0-W7*/ "","","","","","","","", 128*4882a593Smuzhiyun /*X0-X7*/ "","","","","","","","", 129*4882a593Smuzhiyun /*Y0-Y7*/ "","","","","","","","", 130*4882a593Smuzhiyun /*Z0-Z7*/ "","","","","","","",""; 131*4882a593Smuzhiyun}; 132*4882a593Smuzhiyun 133*4882a593Smuzhiyun&fmc { 134*4882a593Smuzhiyun status = "okay"; 135*4882a593Smuzhiyun flash@0 { 136*4882a593Smuzhiyun status = "okay"; 137*4882a593Smuzhiyun m25p,fast-read; 138*4882a593Smuzhiyun label = "bmc"; 139*4882a593Smuzhiyun spi-max-frequency = <50000000>; 140*4882a593Smuzhiyun#include "openbmc-flash-layout-128.dtsi" 141*4882a593Smuzhiyun }; 142*4882a593Smuzhiyun 143*4882a593Smuzhiyun flash@1 { 144*4882a593Smuzhiyun status = "okay"; 145*4882a593Smuzhiyun m25p,fast-read; 146*4882a593Smuzhiyun label = "alt-bmc"; 147*4882a593Smuzhiyun spi-max-frequency = <50000000>; 148*4882a593Smuzhiyun }; 149*4882a593Smuzhiyun}; 150*4882a593Smuzhiyun 151*4882a593Smuzhiyun&spi1 { 152*4882a593Smuzhiyun status = "okay"; 153*4882a593Smuzhiyun pinctrl-names = "default"; 154*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_spi1_default>; 155*4882a593Smuzhiyun 156*4882a593Smuzhiyun flash@0 { 157*4882a593Smuzhiyun status = "okay"; 158*4882a593Smuzhiyun m25p,fast-read; 159*4882a593Smuzhiyun label = "pnor"; 160*4882a593Smuzhiyun spi-max-frequency = <100000000>; 161*4882a593Smuzhiyun }; 162*4882a593Smuzhiyun}; 163*4882a593Smuzhiyun 164*4882a593Smuzhiyun&mac2 { 165*4882a593Smuzhiyun status = "okay"; 166*4882a593Smuzhiyun pinctrl-names = "default"; 167*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_rmii3_default>; 168*4882a593Smuzhiyun clocks = <&syscon ASPEED_CLK_GATE_MAC3CLK>, 169*4882a593Smuzhiyun <&syscon ASPEED_CLK_MAC3RCLK>; 170*4882a593Smuzhiyun clock-names = "MACCLK", "RCLK"; 171*4882a593Smuzhiyun use-ncsi; 172*4882a593Smuzhiyun}; 173*4882a593Smuzhiyun 174*4882a593Smuzhiyun&emmc_controller { 175*4882a593Smuzhiyun status = "okay"; 176*4882a593Smuzhiyun}; 177*4882a593Smuzhiyun 178*4882a593Smuzhiyun&emmc { 179*4882a593Smuzhiyun status = "okay"; 180*4882a593Smuzhiyun clk-phase-mmc-hs200 = <36>, <270>; 181*4882a593Smuzhiyun}; 182*4882a593Smuzhiyun 183*4882a593Smuzhiyun&fsim0 { 184*4882a593Smuzhiyun status = "okay"; 185*4882a593Smuzhiyun 186*4882a593Smuzhiyun #address-cells = <2>; 187*4882a593Smuzhiyun #size-cells = <0>; 188*4882a593Smuzhiyun 189*4882a593Smuzhiyun fsi-routing-gpios = <&gpio0 ASPEED_GPIO(Q, 7) GPIO_ACTIVE_HIGH>; 190*4882a593Smuzhiyun fsi-mux-gpios = <&gpio0 ASPEED_GPIO(B, 0) GPIO_ACTIVE_HIGH>; 191*4882a593Smuzhiyun cfam-reset-gpios = <&gpio0 ASPEED_GPIO(Q, 0) GPIO_ACTIVE_LOW>; 192*4882a593Smuzhiyun 193*4882a593Smuzhiyun cfam@0,0 { 194*4882a593Smuzhiyun reg = <0 0>; 195*4882a593Smuzhiyun #address-cells = <1>; 196*4882a593Smuzhiyun #size-cells = <1>; 197*4882a593Smuzhiyun chip-id = <0>; 198*4882a593Smuzhiyun 199*4882a593Smuzhiyun scom@1000 { 200*4882a593Smuzhiyun compatible = "ibm,fsi2pib"; 201*4882a593Smuzhiyun reg = <0x1000 0x400>; 202*4882a593Smuzhiyun }; 203*4882a593Smuzhiyun 204*4882a593Smuzhiyun i2c@1800 { 205*4882a593Smuzhiyun compatible = "ibm,fsi-i2c-master"; 206*4882a593Smuzhiyun reg = <0x1800 0x400>; 207*4882a593Smuzhiyun #address-cells = <1>; 208*4882a593Smuzhiyun #size-cells = <0>; 209*4882a593Smuzhiyun 210*4882a593Smuzhiyun cfam0_i2c0: i2c-bus@0 { 211*4882a593Smuzhiyun reg = <0>; 212*4882a593Smuzhiyun }; 213*4882a593Smuzhiyun 214*4882a593Smuzhiyun cfam0_i2c1: i2c-bus@1 { 215*4882a593Smuzhiyun reg = <1>; 216*4882a593Smuzhiyun }; 217*4882a593Smuzhiyun 218*4882a593Smuzhiyun cfam0_i2c2: i2c-bus@2 { 219*4882a593Smuzhiyun reg = <2>; 220*4882a593Smuzhiyun }; 221*4882a593Smuzhiyun 222*4882a593Smuzhiyun cfam0_i2c3: i2c-bus@3 { 223*4882a593Smuzhiyun reg = <3>; 224*4882a593Smuzhiyun }; 225*4882a593Smuzhiyun 226*4882a593Smuzhiyun cfam0_i2c4: i2c-bus@4 { 227*4882a593Smuzhiyun reg = <4>; 228*4882a593Smuzhiyun }; 229*4882a593Smuzhiyun 230*4882a593Smuzhiyun cfam0_i2c5: i2c-bus@5 { 231*4882a593Smuzhiyun reg = <5>; 232*4882a593Smuzhiyun }; 233*4882a593Smuzhiyun 234*4882a593Smuzhiyun cfam0_i2c6: i2c-bus@6 { 235*4882a593Smuzhiyun reg = <6>; 236*4882a593Smuzhiyun }; 237*4882a593Smuzhiyun 238*4882a593Smuzhiyun cfam0_i2c7: i2c-bus@7 { 239*4882a593Smuzhiyun reg = <7>; 240*4882a593Smuzhiyun }; 241*4882a593Smuzhiyun 242*4882a593Smuzhiyun cfam0_i2c8: i2c-bus@8 { 243*4882a593Smuzhiyun reg = <8>; 244*4882a593Smuzhiyun }; 245*4882a593Smuzhiyun 246*4882a593Smuzhiyun cfam0_i2c9: i2c-bus@9 { 247*4882a593Smuzhiyun reg = <9>; 248*4882a593Smuzhiyun }; 249*4882a593Smuzhiyun 250*4882a593Smuzhiyun cfam0_i2c10: i2c-bus@a { 251*4882a593Smuzhiyun reg = <10>; 252*4882a593Smuzhiyun }; 253*4882a593Smuzhiyun 254*4882a593Smuzhiyun cfam0_i2c11: i2c-bus@b { 255*4882a593Smuzhiyun reg = <11>; 256*4882a593Smuzhiyun }; 257*4882a593Smuzhiyun 258*4882a593Smuzhiyun cfam0_i2c12: i2c-bus@c { 259*4882a593Smuzhiyun reg = <12>; 260*4882a593Smuzhiyun }; 261*4882a593Smuzhiyun 262*4882a593Smuzhiyun cfam0_i2c13: i2c-bus@d { 263*4882a593Smuzhiyun reg = <13>; 264*4882a593Smuzhiyun }; 265*4882a593Smuzhiyun 266*4882a593Smuzhiyun cfam0_i2c14: i2c-bus@e { 267*4882a593Smuzhiyun reg = <14>; 268*4882a593Smuzhiyun }; 269*4882a593Smuzhiyun }; 270*4882a593Smuzhiyun 271*4882a593Smuzhiyun sbefifo@2400 { 272*4882a593Smuzhiyun compatible = "ibm,p9-sbefifo"; 273*4882a593Smuzhiyun reg = <0x2400 0x400>; 274*4882a593Smuzhiyun #address-cells = <1>; 275*4882a593Smuzhiyun #size-cells = <0>; 276*4882a593Smuzhiyun 277*4882a593Smuzhiyun fsi_occ0: occ { 278*4882a593Smuzhiyun compatible = "ibm,p9-occ"; 279*4882a593Smuzhiyun }; 280*4882a593Smuzhiyun }; 281*4882a593Smuzhiyun 282*4882a593Smuzhiyun fsi_hub0: hub@3400 { 283*4882a593Smuzhiyun compatible = "fsi-master-hub"; 284*4882a593Smuzhiyun reg = <0x3400 0x400>; 285*4882a593Smuzhiyun #address-cells = <2>; 286*4882a593Smuzhiyun #size-cells = <0>; 287*4882a593Smuzhiyun 288*4882a593Smuzhiyun no-scan-on-init; 289*4882a593Smuzhiyun }; 290*4882a593Smuzhiyun }; 291*4882a593Smuzhiyun}; 292*4882a593Smuzhiyun 293*4882a593Smuzhiyun&fsi_hub0 { 294*4882a593Smuzhiyun cfam@1,0 { 295*4882a593Smuzhiyun reg = <1 0>; 296*4882a593Smuzhiyun #address-cells = <1>; 297*4882a593Smuzhiyun #size-cells = <1>; 298*4882a593Smuzhiyun chip-id = <1>; 299*4882a593Smuzhiyun 300*4882a593Smuzhiyun scom@1000 { 301*4882a593Smuzhiyun compatible = "ibm,fsi2pib"; 302*4882a593Smuzhiyun reg = <0x1000 0x400>; 303*4882a593Smuzhiyun }; 304*4882a593Smuzhiyun 305*4882a593Smuzhiyun i2c@1800 { 306*4882a593Smuzhiyun compatible = "ibm,fsi-i2c-master"; 307*4882a593Smuzhiyun reg = <0x1800 0x400>; 308*4882a593Smuzhiyun #address-cells = <1>; 309*4882a593Smuzhiyun #size-cells = <0>; 310*4882a593Smuzhiyun 311*4882a593Smuzhiyun cfam1_i2c0: i2c-bus@0 { 312*4882a593Smuzhiyun reg = <0>; 313*4882a593Smuzhiyun }; 314*4882a593Smuzhiyun 315*4882a593Smuzhiyun cfam1_i2c1: i2c-bus@1 { 316*4882a593Smuzhiyun reg = <1>; 317*4882a593Smuzhiyun }; 318*4882a593Smuzhiyun 319*4882a593Smuzhiyun cfam1_i2c2: i2c-bus@2 { 320*4882a593Smuzhiyun reg = <2>; 321*4882a593Smuzhiyun }; 322*4882a593Smuzhiyun 323*4882a593Smuzhiyun cfam1_i2c3: i2c-bus@3 { 324*4882a593Smuzhiyun reg = <3>; 325*4882a593Smuzhiyun }; 326*4882a593Smuzhiyun 327*4882a593Smuzhiyun cfam1_i2c4: i2c-bus@4 { 328*4882a593Smuzhiyun reg = <4>; 329*4882a593Smuzhiyun }; 330*4882a593Smuzhiyun 331*4882a593Smuzhiyun cfam1_i2c5: i2c-bus@5 { 332*4882a593Smuzhiyun reg = <5>; 333*4882a593Smuzhiyun }; 334*4882a593Smuzhiyun 335*4882a593Smuzhiyun cfam1_i2c6: i2c-bus@6 { 336*4882a593Smuzhiyun reg = <6>; 337*4882a593Smuzhiyun }; 338*4882a593Smuzhiyun 339*4882a593Smuzhiyun cfam1_i2c7: i2c-bus@7 { 340*4882a593Smuzhiyun reg = <7>; 341*4882a593Smuzhiyun }; 342*4882a593Smuzhiyun 343*4882a593Smuzhiyun cfam1_i2c8: i2c-bus@8 { 344*4882a593Smuzhiyun reg = <8>; 345*4882a593Smuzhiyun }; 346*4882a593Smuzhiyun 347*4882a593Smuzhiyun cfam1_i2c9: i2c-bus@9 { 348*4882a593Smuzhiyun reg = <9>; 349*4882a593Smuzhiyun }; 350*4882a593Smuzhiyun 351*4882a593Smuzhiyun cfam1_i2c10: i2c-bus@a { 352*4882a593Smuzhiyun reg = <10>; 353*4882a593Smuzhiyun }; 354*4882a593Smuzhiyun 355*4882a593Smuzhiyun cfam1_i2c11: i2c-bus@b { 356*4882a593Smuzhiyun reg = <11>; 357*4882a593Smuzhiyun }; 358*4882a593Smuzhiyun 359*4882a593Smuzhiyun cfam1_i2c12: i2c-bus@c { 360*4882a593Smuzhiyun reg = <12>; 361*4882a593Smuzhiyun }; 362*4882a593Smuzhiyun 363*4882a593Smuzhiyun cfam1_i2c13: i2c-bus@d { 364*4882a593Smuzhiyun reg = <13>; 365*4882a593Smuzhiyun }; 366*4882a593Smuzhiyun 367*4882a593Smuzhiyun cfam1_i2c14: i2c-bus@e { 368*4882a593Smuzhiyun reg = <14>; 369*4882a593Smuzhiyun }; 370*4882a593Smuzhiyun }; 371*4882a593Smuzhiyun 372*4882a593Smuzhiyun sbefifo@2400 { 373*4882a593Smuzhiyun compatible = "ibm,p9-sbefifo"; 374*4882a593Smuzhiyun reg = <0x2400 0x400>; 375*4882a593Smuzhiyun #address-cells = <1>; 376*4882a593Smuzhiyun #size-cells = <0>; 377*4882a593Smuzhiyun 378*4882a593Smuzhiyun fsi_occ1: occ { 379*4882a593Smuzhiyun compatible = "ibm,p9-occ"; 380*4882a593Smuzhiyun }; 381*4882a593Smuzhiyun }; 382*4882a593Smuzhiyun 383*4882a593Smuzhiyun fsi_hub1: hub@3400 { 384*4882a593Smuzhiyun compatible = "fsi-master-hub"; 385*4882a593Smuzhiyun reg = <0x3400 0x400>; 386*4882a593Smuzhiyun #address-cells = <2>; 387*4882a593Smuzhiyun #size-cells = <0>; 388*4882a593Smuzhiyun 389*4882a593Smuzhiyun no-scan-on-init; 390*4882a593Smuzhiyun }; 391*4882a593Smuzhiyun }; 392*4882a593Smuzhiyun}; 393*4882a593Smuzhiyun 394*4882a593Smuzhiyun/* Legacy OCC numbering (to get rid of when userspace is fixed) */ 395*4882a593Smuzhiyun&fsi_occ0 { 396*4882a593Smuzhiyun reg = <1>; 397*4882a593Smuzhiyun}; 398*4882a593Smuzhiyun 399*4882a593Smuzhiyun&fsi_occ1 { 400*4882a593Smuzhiyun reg = <2>; 401*4882a593Smuzhiyun}; 402*4882a593Smuzhiyun 403*4882a593Smuzhiyun/ { 404*4882a593Smuzhiyun aliases { 405*4882a593Smuzhiyun i2c100 = &cfam0_i2c0; 406*4882a593Smuzhiyun i2c101 = &cfam0_i2c1; 407*4882a593Smuzhiyun i2c102 = &cfam0_i2c2; 408*4882a593Smuzhiyun i2c103 = &cfam0_i2c3; 409*4882a593Smuzhiyun i2c104 = &cfam0_i2c4; 410*4882a593Smuzhiyun i2c105 = &cfam0_i2c5; 411*4882a593Smuzhiyun i2c106 = &cfam0_i2c6; 412*4882a593Smuzhiyun i2c107 = &cfam0_i2c7; 413*4882a593Smuzhiyun i2c108 = &cfam0_i2c8; 414*4882a593Smuzhiyun i2c109 = &cfam0_i2c9; 415*4882a593Smuzhiyun i2c110 = &cfam0_i2c10; 416*4882a593Smuzhiyun i2c111 = &cfam0_i2c11; 417*4882a593Smuzhiyun i2c112 = &cfam0_i2c12; 418*4882a593Smuzhiyun i2c113 = &cfam0_i2c13; 419*4882a593Smuzhiyun i2c114 = &cfam0_i2c14; 420*4882a593Smuzhiyun i2c200 = &cfam1_i2c0; 421*4882a593Smuzhiyun i2c201 = &cfam1_i2c1; 422*4882a593Smuzhiyun i2c202 = &cfam1_i2c2; 423*4882a593Smuzhiyun i2c203 = &cfam1_i2c3; 424*4882a593Smuzhiyun i2c204 = &cfam1_i2c4; 425*4882a593Smuzhiyun i2c205 = &cfam1_i2c5; 426*4882a593Smuzhiyun i2c206 = &cfam1_i2c6; 427*4882a593Smuzhiyun i2c207 = &cfam1_i2c7; 428*4882a593Smuzhiyun i2c208 = &cfam1_i2c8; 429*4882a593Smuzhiyun i2c209 = &cfam1_i2c9; 430*4882a593Smuzhiyun i2c210 = &cfam1_i2c10; 431*4882a593Smuzhiyun i2c211 = &cfam1_i2c11; 432*4882a593Smuzhiyun i2c212 = &cfam1_i2c12; 433*4882a593Smuzhiyun i2c213 = &cfam1_i2c13; 434*4882a593Smuzhiyun i2c214 = &cfam1_i2c14; 435*4882a593Smuzhiyun }; 436*4882a593Smuzhiyun 437*4882a593Smuzhiyun}; 438*4882a593Smuzhiyun 439*4882a593Smuzhiyun&i2c0 { 440*4882a593Smuzhiyun multi-master; 441*4882a593Smuzhiyun status = "okay"; 442*4882a593Smuzhiyun 443*4882a593Smuzhiyun ibm-panel@62 { 444*4882a593Smuzhiyun compatible = "ibm,op-panel"; 445*4882a593Smuzhiyun reg = <(0x62 | I2C_OWN_SLAVE_ADDRESS)>; 446*4882a593Smuzhiyun }; 447*4882a593Smuzhiyun}; 448*4882a593Smuzhiyun 449*4882a593Smuzhiyun&i2c1 { 450*4882a593Smuzhiyun status = "okay"; 451*4882a593Smuzhiyun 452*4882a593Smuzhiyun tpm: tpm@2e { 453*4882a593Smuzhiyun compatible = "tcg,tpm-tis-i2c"; 454*4882a593Smuzhiyun reg = <0x2e>; 455*4882a593Smuzhiyun }; 456*4882a593Smuzhiyun}; 457*4882a593Smuzhiyun 458*4882a593Smuzhiyun&i2c2 { 459*4882a593Smuzhiyun status = "okay"; 460*4882a593Smuzhiyun}; 461*4882a593Smuzhiyun 462*4882a593Smuzhiyun&i2c3 { 463*4882a593Smuzhiyun status = "okay"; 464*4882a593Smuzhiyun 465*4882a593Smuzhiyun bmp: bmp280@77 { 466*4882a593Smuzhiyun compatible = "bosch,bmp280"; 467*4882a593Smuzhiyun reg = <0x77>; 468*4882a593Smuzhiyun #io-channel-cells = <1>; 469*4882a593Smuzhiyun }; 470*4882a593Smuzhiyun 471*4882a593Smuzhiyun max31785@52 { 472*4882a593Smuzhiyun compatible = "maxim,max31785a"; 473*4882a593Smuzhiyun reg = <0x52>; 474*4882a593Smuzhiyun #address-cells = <1>; 475*4882a593Smuzhiyun #size-cells = <0>; 476*4882a593Smuzhiyun 477*4882a593Smuzhiyun fan@0 { 478*4882a593Smuzhiyun compatible = "pmbus-fan"; 479*4882a593Smuzhiyun reg = <0>; 480*4882a593Smuzhiyun tach-pulses = <2>; 481*4882a593Smuzhiyun maxim,fan-rotor-input = "tach"; 482*4882a593Smuzhiyun maxim,fan-pwm-freq = <25000>; 483*4882a593Smuzhiyun maxim,fan-dual-tach; 484*4882a593Smuzhiyun maxim,fan-no-watchdog; 485*4882a593Smuzhiyun maxim,fan-no-fault-ramp; 486*4882a593Smuzhiyun maxim,fan-ramp = <2>; 487*4882a593Smuzhiyun maxim,fan-fault-pin-mon; 488*4882a593Smuzhiyun }; 489*4882a593Smuzhiyun 490*4882a593Smuzhiyun fan@1 { 491*4882a593Smuzhiyun compatible = "pmbus-fan"; 492*4882a593Smuzhiyun reg = <1>; 493*4882a593Smuzhiyun tach-pulses = <2>; 494*4882a593Smuzhiyun maxim,fan-rotor-input = "tach"; 495*4882a593Smuzhiyun maxim,fan-pwm-freq = <25000>; 496*4882a593Smuzhiyun maxim,fan-dual-tach; 497*4882a593Smuzhiyun maxim,fan-no-watchdog; 498*4882a593Smuzhiyun maxim,fan-no-fault-ramp; 499*4882a593Smuzhiyun maxim,fan-ramp = <2>; 500*4882a593Smuzhiyun maxim,fan-fault-pin-mon; 501*4882a593Smuzhiyun }; 502*4882a593Smuzhiyun 503*4882a593Smuzhiyun fan@2 { 504*4882a593Smuzhiyun compatible = "pmbus-fan"; 505*4882a593Smuzhiyun reg = <2>; 506*4882a593Smuzhiyun tach-pulses = <2>; 507*4882a593Smuzhiyun maxim,fan-rotor-input = "tach"; 508*4882a593Smuzhiyun maxim,fan-pwm-freq = <25000>; 509*4882a593Smuzhiyun maxim,fan-dual-tach; 510*4882a593Smuzhiyun maxim,fan-no-watchdog; 511*4882a593Smuzhiyun maxim,fan-no-fault-ramp; 512*4882a593Smuzhiyun maxim,fan-ramp = <2>; 513*4882a593Smuzhiyun maxim,fan-fault-pin-mon; 514*4882a593Smuzhiyun }; 515*4882a593Smuzhiyun 516*4882a593Smuzhiyun fan@3 { 517*4882a593Smuzhiyun compatible = "pmbus-fan"; 518*4882a593Smuzhiyun reg = <3>; 519*4882a593Smuzhiyun tach-pulses = <2>; 520*4882a593Smuzhiyun maxim,fan-rotor-input = "tach"; 521*4882a593Smuzhiyun maxim,fan-pwm-freq = <25000>; 522*4882a593Smuzhiyun maxim,fan-dual-tach; 523*4882a593Smuzhiyun maxim,fan-no-watchdog; 524*4882a593Smuzhiyun maxim,fan-no-fault-ramp; 525*4882a593Smuzhiyun maxim,fan-ramp = <2>; 526*4882a593Smuzhiyun maxim,fan-fault-pin-mon; 527*4882a593Smuzhiyun }; 528*4882a593Smuzhiyun }; 529*4882a593Smuzhiyun 530*4882a593Smuzhiyun dps: dps310@76 { 531*4882a593Smuzhiyun compatible = "infineon,dps310"; 532*4882a593Smuzhiyun reg = <0x76>; 533*4882a593Smuzhiyun #io-channel-cells = <0>; 534*4882a593Smuzhiyun }; 535*4882a593Smuzhiyun 536*4882a593Smuzhiyun pca0: pca9552@60 { 537*4882a593Smuzhiyun compatible = "nxp,pca9552"; 538*4882a593Smuzhiyun reg = <0x60>; 539*4882a593Smuzhiyun #address-cells = <1>; 540*4882a593Smuzhiyun #size-cells = <0>; 541*4882a593Smuzhiyun 542*4882a593Smuzhiyun gpio-controller; 543*4882a593Smuzhiyun #gpio-cells = <2>; 544*4882a593Smuzhiyun 545*4882a593Smuzhiyun gpio@0 { 546*4882a593Smuzhiyun reg = <0>; 547*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 548*4882a593Smuzhiyun }; 549*4882a593Smuzhiyun 550*4882a593Smuzhiyun gpio@1 { 551*4882a593Smuzhiyun reg = <1>; 552*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 553*4882a593Smuzhiyun }; 554*4882a593Smuzhiyun 555*4882a593Smuzhiyun gpio@2 { 556*4882a593Smuzhiyun reg = <2>; 557*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 558*4882a593Smuzhiyun }; 559*4882a593Smuzhiyun 560*4882a593Smuzhiyun gpio@3 { 561*4882a593Smuzhiyun reg = <3>; 562*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 563*4882a593Smuzhiyun }; 564*4882a593Smuzhiyun 565*4882a593Smuzhiyun gpio@4 { 566*4882a593Smuzhiyun reg = <4>; 567*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 568*4882a593Smuzhiyun }; 569*4882a593Smuzhiyun 570*4882a593Smuzhiyun gpio@5 { 571*4882a593Smuzhiyun reg = <5>; 572*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 573*4882a593Smuzhiyun }; 574*4882a593Smuzhiyun 575*4882a593Smuzhiyun gpio@6 { 576*4882a593Smuzhiyun reg = <6>; 577*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 578*4882a593Smuzhiyun }; 579*4882a593Smuzhiyun 580*4882a593Smuzhiyun gpio@7 { 581*4882a593Smuzhiyun reg = <7>; 582*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 583*4882a593Smuzhiyun }; 584*4882a593Smuzhiyun 585*4882a593Smuzhiyun gpio@8 { 586*4882a593Smuzhiyun reg = <8>; 587*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 588*4882a593Smuzhiyun }; 589*4882a593Smuzhiyun 590*4882a593Smuzhiyun gpio@9 { 591*4882a593Smuzhiyun reg = <9>; 592*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 593*4882a593Smuzhiyun }; 594*4882a593Smuzhiyun 595*4882a593Smuzhiyun gpio@10 { 596*4882a593Smuzhiyun reg = <10>; 597*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 598*4882a593Smuzhiyun }; 599*4882a593Smuzhiyun 600*4882a593Smuzhiyun gpio@11 { 601*4882a593Smuzhiyun reg = <11>; 602*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 603*4882a593Smuzhiyun }; 604*4882a593Smuzhiyun 605*4882a593Smuzhiyun gpio@12 { 606*4882a593Smuzhiyun reg = <12>; 607*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 608*4882a593Smuzhiyun }; 609*4882a593Smuzhiyun 610*4882a593Smuzhiyun gpio@13 { 611*4882a593Smuzhiyun reg = <13>; 612*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 613*4882a593Smuzhiyun }; 614*4882a593Smuzhiyun 615*4882a593Smuzhiyun gpio@14 { 616*4882a593Smuzhiyun reg = <14>; 617*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 618*4882a593Smuzhiyun }; 619*4882a593Smuzhiyun 620*4882a593Smuzhiyun gpio@15 { 621*4882a593Smuzhiyun reg = <15>; 622*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 623*4882a593Smuzhiyun }; 624*4882a593Smuzhiyun }; 625*4882a593Smuzhiyun 626*4882a593Smuzhiyun power-supply@68 { 627*4882a593Smuzhiyun compatible = "ibm,cffps1"; 628*4882a593Smuzhiyun reg = <0x68>; 629*4882a593Smuzhiyun }; 630*4882a593Smuzhiyun 631*4882a593Smuzhiyun power-supply@69 { 632*4882a593Smuzhiyun compatible = "ibm,cffps1"; 633*4882a593Smuzhiyun reg = <0x69>; 634*4882a593Smuzhiyun }; 635*4882a593Smuzhiyun}; 636*4882a593Smuzhiyun 637*4882a593Smuzhiyun&i2c4 { 638*4882a593Smuzhiyun status = "okay"; 639*4882a593Smuzhiyun 640*4882a593Smuzhiyun tmp423a@4c { 641*4882a593Smuzhiyun compatible = "ti,tmp423"; 642*4882a593Smuzhiyun reg = <0x4c>; 643*4882a593Smuzhiyun }; 644*4882a593Smuzhiyun 645*4882a593Smuzhiyun ir35221@70 { 646*4882a593Smuzhiyun compatible = "infineon,ir35221"; 647*4882a593Smuzhiyun reg = <0x70>; 648*4882a593Smuzhiyun }; 649*4882a593Smuzhiyun 650*4882a593Smuzhiyun ir35221@71 { 651*4882a593Smuzhiyun compatible = "infineon,ir35221"; 652*4882a593Smuzhiyun reg = <0x71>; 653*4882a593Smuzhiyun }; 654*4882a593Smuzhiyun}; 655*4882a593Smuzhiyun 656*4882a593Smuzhiyun&i2c5 { 657*4882a593Smuzhiyun status = "okay"; 658*4882a593Smuzhiyun 659*4882a593Smuzhiyun tmp423a@4c { 660*4882a593Smuzhiyun compatible = "ti,tmp423"; 661*4882a593Smuzhiyun reg = <0x4c>; 662*4882a593Smuzhiyun }; 663*4882a593Smuzhiyun 664*4882a593Smuzhiyun ir35221@70 { 665*4882a593Smuzhiyun compatible = "infineon,ir35221"; 666*4882a593Smuzhiyun reg = <0x70>; 667*4882a593Smuzhiyun }; 668*4882a593Smuzhiyun 669*4882a593Smuzhiyun ir35221@71 { 670*4882a593Smuzhiyun compatible = "infineon,ir35221"; 671*4882a593Smuzhiyun reg = <0x71>; 672*4882a593Smuzhiyun }; 673*4882a593Smuzhiyun}; 674*4882a593Smuzhiyun 675*4882a593Smuzhiyun&i2c7 { 676*4882a593Smuzhiyun status = "okay"; 677*4882a593Smuzhiyun}; 678*4882a593Smuzhiyun 679*4882a593Smuzhiyun&i2c9 { 680*4882a593Smuzhiyun status = "okay"; 681*4882a593Smuzhiyun 682*4882a593Smuzhiyun tmp275@4a { 683*4882a593Smuzhiyun compatible = "ti,tmp275"; 684*4882a593Smuzhiyun reg = <0x4a>; 685*4882a593Smuzhiyun }; 686*4882a593Smuzhiyun}; 687*4882a593Smuzhiyun 688*4882a593Smuzhiyun&i2c10 { 689*4882a593Smuzhiyun status = "okay"; 690*4882a593Smuzhiyun}; 691*4882a593Smuzhiyun 692*4882a593Smuzhiyun&i2c11 { 693*4882a593Smuzhiyun status = "okay"; 694*4882a593Smuzhiyun 695*4882a593Smuzhiyun pca9552: pca9552@60 { 696*4882a593Smuzhiyun compatible = "nxp,pca9552"; 697*4882a593Smuzhiyun reg = <0x60>; 698*4882a593Smuzhiyun #address-cells = <1>; 699*4882a593Smuzhiyun #size-cells = <0>; 700*4882a593Smuzhiyun gpio-controller; 701*4882a593Smuzhiyun #gpio-cells = <2>; 702*4882a593Smuzhiyun 703*4882a593Smuzhiyun gpio-line-names = "PS_SMBUS_RESET_N", "APSS_RESET_N", 704*4882a593Smuzhiyun "GPU0_TH_OVERT_N_BUFF", "GPU1_TH_OVERT_N_BUFF", 705*4882a593Smuzhiyun "GPU2_TH_OVERT_N_BUFF", "GPU3_TH_OVERT_N_BUFF", 706*4882a593Smuzhiyun "GPU4_TH_OVERT_N_BUFF", "GPU5_TH_OVERT_N_BUFF", 707*4882a593Smuzhiyun "GPU0_PWR_GOOD_BUFF", "GPU1_PWR_GOOD_BUFF", 708*4882a593Smuzhiyun "GPU2_PWR_GOOD_BUFF", "GPU3_PWR_GOOD_BUFF", 709*4882a593Smuzhiyun "GPU4_PWR_GOOD_BUFF", "GPU5_PWR_GOOD_BUFF", 710*4882a593Smuzhiyun "12V_BREAKER_FLT_N", "THROTTLE_UNLATCHED_N"; 711*4882a593Smuzhiyun 712*4882a593Smuzhiyun gpio@0 { 713*4882a593Smuzhiyun reg = <0>; 714*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 715*4882a593Smuzhiyun }; 716*4882a593Smuzhiyun 717*4882a593Smuzhiyun gpio@1 { 718*4882a593Smuzhiyun reg = <1>; 719*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 720*4882a593Smuzhiyun }; 721*4882a593Smuzhiyun 722*4882a593Smuzhiyun gpio@2 { 723*4882a593Smuzhiyun reg = <2>; 724*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 725*4882a593Smuzhiyun }; 726*4882a593Smuzhiyun 727*4882a593Smuzhiyun gpio@3 { 728*4882a593Smuzhiyun reg = <3>; 729*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 730*4882a593Smuzhiyun }; 731*4882a593Smuzhiyun 732*4882a593Smuzhiyun gpio@4 { 733*4882a593Smuzhiyun reg = <4>; 734*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 735*4882a593Smuzhiyun }; 736*4882a593Smuzhiyun 737*4882a593Smuzhiyun gpio@5 { 738*4882a593Smuzhiyun reg = <5>; 739*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 740*4882a593Smuzhiyun }; 741*4882a593Smuzhiyun 742*4882a593Smuzhiyun gpio@6 { 743*4882a593Smuzhiyun reg = <6>; 744*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 745*4882a593Smuzhiyun }; 746*4882a593Smuzhiyun 747*4882a593Smuzhiyun gpio@7 { 748*4882a593Smuzhiyun reg = <7>; 749*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 750*4882a593Smuzhiyun }; 751*4882a593Smuzhiyun 752*4882a593Smuzhiyun gpio@8 { 753*4882a593Smuzhiyun reg = <8>; 754*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 755*4882a593Smuzhiyun }; 756*4882a593Smuzhiyun 757*4882a593Smuzhiyun gpio@9 { 758*4882a593Smuzhiyun reg = <9>; 759*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 760*4882a593Smuzhiyun }; 761*4882a593Smuzhiyun 762*4882a593Smuzhiyun gpio@10 { 763*4882a593Smuzhiyun reg = <10>; 764*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 765*4882a593Smuzhiyun }; 766*4882a593Smuzhiyun 767*4882a593Smuzhiyun gpio@11 { 768*4882a593Smuzhiyun reg = <11>; 769*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 770*4882a593Smuzhiyun }; 771*4882a593Smuzhiyun 772*4882a593Smuzhiyun gpio@12 { 773*4882a593Smuzhiyun reg = <12>; 774*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 775*4882a593Smuzhiyun }; 776*4882a593Smuzhiyun 777*4882a593Smuzhiyun gpio@13 { 778*4882a593Smuzhiyun reg = <13>; 779*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 780*4882a593Smuzhiyun }; 781*4882a593Smuzhiyun 782*4882a593Smuzhiyun gpio@14 { 783*4882a593Smuzhiyun reg = <14>; 784*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 785*4882a593Smuzhiyun }; 786*4882a593Smuzhiyun 787*4882a593Smuzhiyun gpio@15 { 788*4882a593Smuzhiyun reg = <15>; 789*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 790*4882a593Smuzhiyun }; 791*4882a593Smuzhiyun }; 792*4882a593Smuzhiyun 793*4882a593Smuzhiyun rtc@32 { 794*4882a593Smuzhiyun compatible = "epson,rx8900"; 795*4882a593Smuzhiyun reg = <0x32>; 796*4882a593Smuzhiyun }; 797*4882a593Smuzhiyun 798*4882a593Smuzhiyun eeprom@51 { 799*4882a593Smuzhiyun compatible = "atmel,24c64"; 800*4882a593Smuzhiyun reg = <0x51>; 801*4882a593Smuzhiyun }; 802*4882a593Smuzhiyun 803*4882a593Smuzhiyun ucd90160@64 { 804*4882a593Smuzhiyun compatible = "ti,ucd90160"; 805*4882a593Smuzhiyun reg = <0x64>; 806*4882a593Smuzhiyun }; 807*4882a593Smuzhiyun}; 808*4882a593Smuzhiyun 809*4882a593Smuzhiyun&i2c12 { 810*4882a593Smuzhiyun status = "okay"; 811*4882a593Smuzhiyun}; 812*4882a593Smuzhiyun 813*4882a593Smuzhiyun&i2c13 { 814*4882a593Smuzhiyun status = "okay"; 815*4882a593Smuzhiyun}; 816*4882a593Smuzhiyun 817*4882a593Smuzhiyun&ibt { 818*4882a593Smuzhiyun status = "okay"; 819*4882a593Smuzhiyun}; 820*4882a593Smuzhiyun 821*4882a593Smuzhiyun&uart1 { 822*4882a593Smuzhiyun status = "okay"; 823*4882a593Smuzhiyun // Workaround for A0 824*4882a593Smuzhiyun compatible = "snps,dw-apb-uart"; 825*4882a593Smuzhiyun}; 826*4882a593Smuzhiyun 827*4882a593Smuzhiyun&uart5 { 828*4882a593Smuzhiyun // Workaround for A0 829*4882a593Smuzhiyun compatible = "snps,dw-apb-uart"; 830*4882a593Smuzhiyun}; 831*4882a593Smuzhiyun 832*4882a593Smuzhiyun&vuart1 { 833*4882a593Smuzhiyun status = "okay"; 834*4882a593Smuzhiyun}; 835*4882a593Smuzhiyun 836*4882a593Smuzhiyun&vuart2 { 837*4882a593Smuzhiyun status = "okay"; 838*4882a593Smuzhiyun}; 839*4882a593Smuzhiyun 840*4882a593Smuzhiyun&lpc_ctrl { 841*4882a593Smuzhiyun status = "okay"; 842*4882a593Smuzhiyun memory-region = <&flash_memory>; 843*4882a593Smuzhiyun flash = <&spi1>; 844*4882a593Smuzhiyun}; 845*4882a593Smuzhiyun 846*4882a593Smuzhiyun&wdt1 { 847*4882a593Smuzhiyun aspeed,reset-type = "none"; 848*4882a593Smuzhiyun aspeed,external-signal; 849*4882a593Smuzhiyun aspeed,ext-push-pull; 850*4882a593Smuzhiyun aspeed,ext-active-high; 851*4882a593Smuzhiyun 852*4882a593Smuzhiyun pinctrl-names = "default"; 853*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_wdtrst1_default>; 854*4882a593Smuzhiyun}; 855*4882a593Smuzhiyun 856*4882a593Smuzhiyun&wdt2 { 857*4882a593Smuzhiyun status = "okay"; 858*4882a593Smuzhiyun}; 859*4882a593Smuzhiyun 860*4882a593Smuzhiyun&pinctrl { 861*4882a593Smuzhiyun /* Hog these as no driver is probed for the entire LPC block */ 862*4882a593Smuzhiyun pinctrl-names = "default"; 863*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_lpc_default>, 864*4882a593Smuzhiyun <&pinctrl_lsirq_default>; 865*4882a593Smuzhiyun}; 866*4882a593Smuzhiyun 867*4882a593Smuzhiyun&xdma { 868*4882a593Smuzhiyun status = "okay"; 869*4882a593Smuzhiyun memory-region = <&vga_memory>; 870*4882a593Smuzhiyun}; 871