xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/aspeed-bmc-opp-swift.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun/dts-v1/;
3*4882a593Smuzhiyun#include "aspeed-g5.dtsi"
4*4882a593Smuzhiyun#include <dt-bindings/gpio/aspeed-gpio.h>
5*4882a593Smuzhiyun#include <dt-bindings/leds/leds-pca955x.h>
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun/ {
8*4882a593Smuzhiyun	model = "Swift BMC";
9*4882a593Smuzhiyun	compatible = "ibm,swift-bmc", "aspeed,ast2500";
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun	chosen {
12*4882a593Smuzhiyun		stdout-path = &uart5;
13*4882a593Smuzhiyun		bootargs = "console=ttyS4,115200 earlyprintk";
14*4882a593Smuzhiyun	};
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun	memory@80000000 {
17*4882a593Smuzhiyun		reg = <0x80000000 0x20000000>;
18*4882a593Smuzhiyun	};
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun	reserved-memory {
21*4882a593Smuzhiyun		#address-cells = <1>;
22*4882a593Smuzhiyun		#size-cells = <1>;
23*4882a593Smuzhiyun		ranges;
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun		flash_memory: region@98000000 {
26*4882a593Smuzhiyun			no-map;
27*4882a593Smuzhiyun			reg = <0x98000000 0x04000000>; /* 64M */
28*4882a593Smuzhiyun		};
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun		gfx_memory: framebuffer {
31*4882a593Smuzhiyun			size = <0x01000000>;
32*4882a593Smuzhiyun			alignment = <0x01000000>;
33*4882a593Smuzhiyun			compatible = "shared-dma-pool";
34*4882a593Smuzhiyun			reusable;
35*4882a593Smuzhiyun		};
36*4882a593Smuzhiyun	};
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun	gpio-keys {
39*4882a593Smuzhiyun		compatible = "gpio-keys";
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun		air-water {
42*4882a593Smuzhiyun			label = "air-water";
43*4882a593Smuzhiyun			gpios = <&gpio ASPEED_GPIO(B, 5) GPIO_ACTIVE_LOW>;
44*4882a593Smuzhiyun			linux,code = <ASPEED_GPIO(B, 5)>;
45*4882a593Smuzhiyun		};
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun		checkstop {
48*4882a593Smuzhiyun			label = "checkstop";
49*4882a593Smuzhiyun			gpios = <&gpio ASPEED_GPIO(J, 2) GPIO_ACTIVE_LOW>;
50*4882a593Smuzhiyun			linux,code = <ASPEED_GPIO(J, 2)>;
51*4882a593Smuzhiyun		};
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun		ps0-presence {
54*4882a593Smuzhiyun			label = "ps0-presence";
55*4882a593Smuzhiyun			gpios = <&gpio ASPEED_GPIO(R, 7) GPIO_ACTIVE_LOW>;
56*4882a593Smuzhiyun			linux,code = <ASPEED_GPIO(R, 7)>;
57*4882a593Smuzhiyun		};
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun		ps1-presence {
60*4882a593Smuzhiyun			label = "ps1-presence";
61*4882a593Smuzhiyun			gpios = <&gpio ASPEED_GPIO(N, 0) GPIO_ACTIVE_LOW>;
62*4882a593Smuzhiyun			linux,code = <ASPEED_GPIO(N, 0)>;
63*4882a593Smuzhiyun		};
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun		oppanel-presence {
66*4882a593Smuzhiyun			label = "oppanel-presence";
67*4882a593Smuzhiyun			gpios = <&gpio ASPEED_GPIO(A, 7) GPIO_ACTIVE_LOW>;
68*4882a593Smuzhiyun			linux,code = <ASPEED_GPIO(A, 7)>;
69*4882a593Smuzhiyun		};
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun		opencapi-riser-presence {
72*4882a593Smuzhiyun			label = "opencapi-riser-presence";
73*4882a593Smuzhiyun			gpios = <&gpio ASPEED_GPIO(I, 0) GPIO_ACTIVE_LOW>;
74*4882a593Smuzhiyun			linux,code = <ASPEED_GPIO(I, 0)>;
75*4882a593Smuzhiyun		};
76*4882a593Smuzhiyun	};
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun	iio-hwmon-battery {
79*4882a593Smuzhiyun		compatible = "iio-hwmon";
80*4882a593Smuzhiyun		io-channels = <&adc 12>;
81*4882a593Smuzhiyun	};
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun	gpio-keys-polled {
84*4882a593Smuzhiyun		compatible = "gpio-keys-polled";
85*4882a593Smuzhiyun		poll-interval = <1000>;
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun		scm0-presence {
88*4882a593Smuzhiyun			label = "scm0-presence";
89*4882a593Smuzhiyun			gpios = <&pca9552 6 GPIO_ACTIVE_LOW>;
90*4882a593Smuzhiyun			linux,code = <6>;
91*4882a593Smuzhiyun		};
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun		scm1-presence {
94*4882a593Smuzhiyun			label = "scm1-presence";
95*4882a593Smuzhiyun			gpios = <&pca9552 7 GPIO_ACTIVE_LOW>;
96*4882a593Smuzhiyun			linux,code = <7>;
97*4882a593Smuzhiyun		};
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun		cpu0vrm-presence {
100*4882a593Smuzhiyun			label = "cpu0vrm-presence";
101*4882a593Smuzhiyun			gpios = <&pca9552 12 GPIO_ACTIVE_LOW>;
102*4882a593Smuzhiyun			linux,code = <12>;
103*4882a593Smuzhiyun		};
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun		cpu1vrm-presence {
106*4882a593Smuzhiyun			label = "cpu1vrm-presence";
107*4882a593Smuzhiyun			gpios = <&pca9552 13 GPIO_ACTIVE_LOW>;
108*4882a593Smuzhiyun			linux,code = <13>;
109*4882a593Smuzhiyun		};
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun		fan0-presence {
112*4882a593Smuzhiyun			label = "fan0-presence";
113*4882a593Smuzhiyun			gpios = <&pca0 5 GPIO_ACTIVE_LOW>;
114*4882a593Smuzhiyun			linux,code = <5>;
115*4882a593Smuzhiyun		};
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun		fan1-presence {
118*4882a593Smuzhiyun			label = "fan1-presence";
119*4882a593Smuzhiyun			gpios = <&pca0 6 GPIO_ACTIVE_LOW>;
120*4882a593Smuzhiyun			linux,code = <6>;
121*4882a593Smuzhiyun		};
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun		fan2-presence {
124*4882a593Smuzhiyun			label = "fan2-presence";
125*4882a593Smuzhiyun			gpios = <&pca0 7 GPIO_ACTIVE_LOW>;
126*4882a593Smuzhiyun			linux,code = <7>;
127*4882a593Smuzhiyun		};
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun		fan3-presence {
130*4882a593Smuzhiyun			label = "fan3-presence";
131*4882a593Smuzhiyun			gpios = <&pca0 8 GPIO_ACTIVE_LOW>;
132*4882a593Smuzhiyun			linux,code = <8>;
133*4882a593Smuzhiyun		};
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun		fanboost-presence {
136*4882a593Smuzhiyun			label = "fanboost-presence";
137*4882a593Smuzhiyun			gpios = <&pca0 9 GPIO_ACTIVE_LOW>;
138*4882a593Smuzhiyun			linux,code = <9>;
139*4882a593Smuzhiyun		};
140*4882a593Smuzhiyun	};
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun	leds {
143*4882a593Smuzhiyun		compatible = "gpio-leds";
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun		fan0 {
146*4882a593Smuzhiyun			retain-state-shutdown;
147*4882a593Smuzhiyun			default-state = "keep";
148*4882a593Smuzhiyun			gpios = <&pca0 0 GPIO_ACTIVE_LOW>;
149*4882a593Smuzhiyun		};
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun		fan1 {
152*4882a593Smuzhiyun			retain-state-shutdown;
153*4882a593Smuzhiyun			default-state = "keep";
154*4882a593Smuzhiyun			gpios = <&pca0 1 GPIO_ACTIVE_LOW>;
155*4882a593Smuzhiyun		};
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun		fan2 {
158*4882a593Smuzhiyun			retain-state-shutdown;
159*4882a593Smuzhiyun			default-state = "keep";
160*4882a593Smuzhiyun			gpios = <&pca0 2 GPIO_ACTIVE_LOW>;
161*4882a593Smuzhiyun		};
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun		fan3 {
164*4882a593Smuzhiyun			retain-state-shutdown;
165*4882a593Smuzhiyun			default-state = "keep";
166*4882a593Smuzhiyun			gpios = <&pca0 3 GPIO_ACTIVE_LOW>;
167*4882a593Smuzhiyun		};
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun		fanboost {
170*4882a593Smuzhiyun			retain-state-shutdown;
171*4882a593Smuzhiyun			default-state = "keep";
172*4882a593Smuzhiyun			gpios = <&pca0 4 GPIO_ACTIVE_LOW>;
173*4882a593Smuzhiyun		};
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun		front-fault {
176*4882a593Smuzhiyun			retain-state-shutdown;
177*4882a593Smuzhiyun			default-state = "keep";
178*4882a593Smuzhiyun			gpios = <&pca1 2 GPIO_ACTIVE_LOW>;
179*4882a593Smuzhiyun		};
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun		front-power {
182*4882a593Smuzhiyun			retain-state-shutdown;
183*4882a593Smuzhiyun			default-state = "keep";
184*4882a593Smuzhiyun			gpios = <&pca1 3 GPIO_ACTIVE_LOW>;
185*4882a593Smuzhiyun		};
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun		front-id {
188*4882a593Smuzhiyun			retain-state-shutdown;
189*4882a593Smuzhiyun			default-state = "keep";
190*4882a593Smuzhiyun			gpios = <&pca1 0 GPIO_ACTIVE_LOW>;
191*4882a593Smuzhiyun		};
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun		rear-fault {
194*4882a593Smuzhiyun			gpios = <&gpio ASPEED_GPIO(N, 2) GPIO_ACTIVE_LOW>;
195*4882a593Smuzhiyun		};
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun		rear-id {
198*4882a593Smuzhiyun			gpios = <&gpio ASPEED_GPIO(N, 4) GPIO_ACTIVE_LOW>;
199*4882a593Smuzhiyun		};
200*4882a593Smuzhiyun	};
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun	fsi: gpio-fsi {
203*4882a593Smuzhiyun		compatible = "fsi-master-gpio", "fsi-master";
204*4882a593Smuzhiyun		#address-cells = <2>;
205*4882a593Smuzhiyun		#size-cells = <0>;
206*4882a593Smuzhiyun		no-gpio-delays;
207*4882a593Smuzhiyun
208*4882a593Smuzhiyun		clock-gpios = <&gpio ASPEED_GPIO(P, 1) GPIO_ACTIVE_HIGH>;
209*4882a593Smuzhiyun		data-gpios = <&gpio ASPEED_GPIO(P, 2) GPIO_ACTIVE_HIGH>;
210*4882a593Smuzhiyun		mux-gpios = <&gpio ASPEED_GPIO(P, 4) GPIO_ACTIVE_HIGH>;
211*4882a593Smuzhiyun		enable-gpios = <&gpio ASPEED_GPIO(P, 0) GPIO_ACTIVE_HIGH>;
212*4882a593Smuzhiyun		trans-gpios = <&gpio ASPEED_GPIO(P, 3) GPIO_ACTIVE_HIGH>;
213*4882a593Smuzhiyun	};
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun	iio-hwmon-dps310 {
216*4882a593Smuzhiyun		compatible = "iio-hwmon";
217*4882a593Smuzhiyun		io-channels = <&dps 0>;
218*4882a593Smuzhiyun	};
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun};
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun&fmc {
223*4882a593Smuzhiyun	status = "okay";
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun	flash@0 {
226*4882a593Smuzhiyun		status = "okay";
227*4882a593Smuzhiyun		label = "bmc";
228*4882a593Smuzhiyun		m25p,fast-read;
229*4882a593Smuzhiyun		spi-max-frequency = <100000000>;
230*4882a593Smuzhiyun		partitions {
231*4882a593Smuzhiyun			#address-cells = < 1 >;
232*4882a593Smuzhiyun			#size-cells = < 1 >;
233*4882a593Smuzhiyun			compatible = "fixed-partitions";
234*4882a593Smuzhiyun			u-boot@0 {
235*4882a593Smuzhiyun				reg = < 0 0x60000 >;
236*4882a593Smuzhiyun				label = "u-boot";
237*4882a593Smuzhiyun			};
238*4882a593Smuzhiyun			u-boot-env@60000 {
239*4882a593Smuzhiyun				reg = < 0x60000 0x20000 >;
240*4882a593Smuzhiyun				label = "u-boot-env";
241*4882a593Smuzhiyun			};
242*4882a593Smuzhiyun			obmc-ubi@80000 {
243*4882a593Smuzhiyun				reg = < 0x80000 0x7F80000>;
244*4882a593Smuzhiyun				label = "obmc-ubi";
245*4882a593Smuzhiyun			};
246*4882a593Smuzhiyun		};
247*4882a593Smuzhiyun	};
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun	flash@1 {
250*4882a593Smuzhiyun		status = "okay";
251*4882a593Smuzhiyun		label = "alt-bmc";
252*4882a593Smuzhiyun		m25p,fast-read;
253*4882a593Smuzhiyun		spi-max-frequency = <100000000>;
254*4882a593Smuzhiyun		partitions {
255*4882a593Smuzhiyun			#address-cells = < 1 >;
256*4882a593Smuzhiyun			#size-cells = < 1 >;
257*4882a593Smuzhiyun			compatible = "fixed-partitions";
258*4882a593Smuzhiyun			u-boot@0 {
259*4882a593Smuzhiyun				reg = < 0 0x60000 >;
260*4882a593Smuzhiyun				label = "alt-u-boot";
261*4882a593Smuzhiyun			};
262*4882a593Smuzhiyun			u-boot-env@60000 {
263*4882a593Smuzhiyun				reg = < 0x60000 0x20000 >;
264*4882a593Smuzhiyun				label = "alt-u-boot-env";
265*4882a593Smuzhiyun			};
266*4882a593Smuzhiyun			obmc-ubi@80000 {
267*4882a593Smuzhiyun				reg = < 0x80000 0x7F80000>;
268*4882a593Smuzhiyun				label = "alt-obmc-ubi";
269*4882a593Smuzhiyun			};
270*4882a593Smuzhiyun		};
271*4882a593Smuzhiyun	};
272*4882a593Smuzhiyun};
273*4882a593Smuzhiyun
274*4882a593Smuzhiyun&spi1 {
275*4882a593Smuzhiyun	status = "okay";
276*4882a593Smuzhiyun	pinctrl-names = "default";
277*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_spi1_default>;
278*4882a593Smuzhiyun
279*4882a593Smuzhiyun	flash@0 {
280*4882a593Smuzhiyun		status = "okay";
281*4882a593Smuzhiyun		label = "pnor";
282*4882a593Smuzhiyun		m25p,fast-read;
283*4882a593Smuzhiyun		spi-max-frequency = <100000000>;
284*4882a593Smuzhiyun	};
285*4882a593Smuzhiyun};
286*4882a593Smuzhiyun
287*4882a593Smuzhiyun&uart1 {
288*4882a593Smuzhiyun	/* Rear RS-232 connector */
289*4882a593Smuzhiyun	status = "okay";
290*4882a593Smuzhiyun	pinctrl-names = "default";
291*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_txd1_default
292*4882a593Smuzhiyun			&pinctrl_rxd1_default
293*4882a593Smuzhiyun			&pinctrl_nrts1_default
294*4882a593Smuzhiyun			&pinctrl_ndtr1_default
295*4882a593Smuzhiyun			&pinctrl_ndsr1_default
296*4882a593Smuzhiyun			&pinctrl_ncts1_default
297*4882a593Smuzhiyun			&pinctrl_ndcd1_default
298*4882a593Smuzhiyun			&pinctrl_nri1_default>;
299*4882a593Smuzhiyun};
300*4882a593Smuzhiyun
301*4882a593Smuzhiyun&uart2 {
302*4882a593Smuzhiyun	/* APSS */
303*4882a593Smuzhiyun	status = "okay";
304*4882a593Smuzhiyun	pinctrl-names = "default";
305*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>;
306*4882a593Smuzhiyun};
307*4882a593Smuzhiyun
308*4882a593Smuzhiyun&uart5 {
309*4882a593Smuzhiyun	status = "okay";
310*4882a593Smuzhiyun};
311*4882a593Smuzhiyun
312*4882a593Smuzhiyun&lpc_ctrl {
313*4882a593Smuzhiyun	status = "okay";
314*4882a593Smuzhiyun	memory-region = <&flash_memory>;
315*4882a593Smuzhiyun	flash = <&spi1>;
316*4882a593Smuzhiyun};
317*4882a593Smuzhiyun
318*4882a593Smuzhiyun&mac0 {
319*4882a593Smuzhiyun	status = "okay";
320*4882a593Smuzhiyun	pinctrl-names = "default";
321*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_rmii1_default>;
322*4882a593Smuzhiyun	use-ncsi;
323*4882a593Smuzhiyun	clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>,
324*4882a593Smuzhiyun		 <&syscon ASPEED_CLK_MAC1RCLK>;
325*4882a593Smuzhiyun	clock-names = "MACCLK", "RCLK";
326*4882a593Smuzhiyun};
327*4882a593Smuzhiyun
328*4882a593Smuzhiyun&i2c2 {
329*4882a593Smuzhiyun	status = "okay";
330*4882a593Smuzhiyun
331*4882a593Smuzhiyun	/* MUX ->
332*4882a593Smuzhiyun	 *    Samtec 1
333*4882a593Smuzhiyun	 *    Samtec 2
334*4882a593Smuzhiyun	 */
335*4882a593Smuzhiyun};
336*4882a593Smuzhiyun
337*4882a593Smuzhiyun&i2c3 {
338*4882a593Smuzhiyun	status = "okay";
339*4882a593Smuzhiyun
340*4882a593Smuzhiyun	max31785@52 {
341*4882a593Smuzhiyun		compatible = "maxim,max31785a";
342*4882a593Smuzhiyun		reg = <0x52>;
343*4882a593Smuzhiyun		#address-cells = <1>;
344*4882a593Smuzhiyun		#size-cells = <0>;
345*4882a593Smuzhiyun
346*4882a593Smuzhiyun		fan@0 {
347*4882a593Smuzhiyun			compatible = "pmbus-fan";
348*4882a593Smuzhiyun			reg = <0>;
349*4882a593Smuzhiyun			tach-pulses = <2>;
350*4882a593Smuzhiyun			maxim,fan-rotor-input = "tach";
351*4882a593Smuzhiyun			maxim,fan-pwm-freq = <25000>;
352*4882a593Smuzhiyun			maxim,fan-no-watchdog;
353*4882a593Smuzhiyun			maxim,fan-no-fault-ramp;
354*4882a593Smuzhiyun			maxim,fan-ramp = <2>;
355*4882a593Smuzhiyun			maxim,fan-fault-pin-mon;
356*4882a593Smuzhiyun		};
357*4882a593Smuzhiyun
358*4882a593Smuzhiyun		fan@1 {
359*4882a593Smuzhiyun			compatible = "pmbus-fan";
360*4882a593Smuzhiyun			reg = <1>;
361*4882a593Smuzhiyun			tach-pulses = <2>;
362*4882a593Smuzhiyun			maxim,fan-rotor-input = "tach";
363*4882a593Smuzhiyun			maxim,fan-pwm-freq = <25000>;
364*4882a593Smuzhiyun			maxim,fan-no-watchdog;
365*4882a593Smuzhiyun			maxim,fan-no-fault-ramp;
366*4882a593Smuzhiyun			maxim,fan-ramp = <2>;
367*4882a593Smuzhiyun			maxim,fan-fault-pin-mon;
368*4882a593Smuzhiyun		};
369*4882a593Smuzhiyun
370*4882a593Smuzhiyun		fan@2 {
371*4882a593Smuzhiyun			compatible = "pmbus-fan";
372*4882a593Smuzhiyun			reg = <2>;
373*4882a593Smuzhiyun			tach-pulses = <2>;
374*4882a593Smuzhiyun			maxim,fan-rotor-input = "tach";
375*4882a593Smuzhiyun			maxim,fan-pwm-freq = <25000>;
376*4882a593Smuzhiyun			maxim,fan-no-watchdog;
377*4882a593Smuzhiyun			maxim,fan-no-fault-ramp;
378*4882a593Smuzhiyun			maxim,fan-ramp = <2>;
379*4882a593Smuzhiyun			maxim,fan-fault-pin-mon;
380*4882a593Smuzhiyun		};
381*4882a593Smuzhiyun
382*4882a593Smuzhiyun		fan@3 {
383*4882a593Smuzhiyun			compatible = "pmbus-fan";
384*4882a593Smuzhiyun			reg = <3>;
385*4882a593Smuzhiyun			tach-pulses = <2>;
386*4882a593Smuzhiyun			maxim,fan-rotor-input = "tach";
387*4882a593Smuzhiyun			maxim,fan-pwm-freq = <25000>;
388*4882a593Smuzhiyun			maxim,fan-no-watchdog;
389*4882a593Smuzhiyun			maxim,fan-no-fault-ramp;
390*4882a593Smuzhiyun			maxim,fan-ramp = <2>;
391*4882a593Smuzhiyun			maxim,fan-fault-pin-mon;
392*4882a593Smuzhiyun		};
393*4882a593Smuzhiyun
394*4882a593Smuzhiyun		fan@4 {
395*4882a593Smuzhiyun			compatible = "pmbus-fan";
396*4882a593Smuzhiyun			reg = <4>;
397*4882a593Smuzhiyun			tach-pulses = <2>;
398*4882a593Smuzhiyun			maxim,fan-rotor-input = "tach";
399*4882a593Smuzhiyun			maxim,fan-pwm-freq = <25000>;
400*4882a593Smuzhiyun			maxim,fan-no-watchdog;
401*4882a593Smuzhiyun			maxim,fan-no-fault-ramp;
402*4882a593Smuzhiyun			maxim,fan-ramp = <2>;
403*4882a593Smuzhiyun			maxim,fan-fault-pin-mon;
404*4882a593Smuzhiyun		};
405*4882a593Smuzhiyun	};
406*4882a593Smuzhiyun
407*4882a593Smuzhiyun	pca0: pca9552@60 {
408*4882a593Smuzhiyun		compatible = "nxp,pca9552";
409*4882a593Smuzhiyun		reg = <0x60>;
410*4882a593Smuzhiyun		#address-cells = <1>;
411*4882a593Smuzhiyun		#size-cells = <0>;
412*4882a593Smuzhiyun
413*4882a593Smuzhiyun		gpio-controller;
414*4882a593Smuzhiyun		#gpio-cells = <2>;
415*4882a593Smuzhiyun
416*4882a593Smuzhiyun		gpio@0 {
417*4882a593Smuzhiyun			reg = <0>;
418*4882a593Smuzhiyun			type = <PCA955X_TYPE_GPIO>;
419*4882a593Smuzhiyun		};
420*4882a593Smuzhiyun
421*4882a593Smuzhiyun		gpio@1 {
422*4882a593Smuzhiyun			reg = <1>;
423*4882a593Smuzhiyun			type = <PCA955X_TYPE_GPIO>;
424*4882a593Smuzhiyun		};
425*4882a593Smuzhiyun
426*4882a593Smuzhiyun		gpio@2 {
427*4882a593Smuzhiyun			reg = <2>;
428*4882a593Smuzhiyun			type = <PCA955X_TYPE_GPIO>;
429*4882a593Smuzhiyun		};
430*4882a593Smuzhiyun
431*4882a593Smuzhiyun		gpio@3 {
432*4882a593Smuzhiyun			reg = <3>;
433*4882a593Smuzhiyun			type = <PCA955X_TYPE_GPIO>;
434*4882a593Smuzhiyun		};
435*4882a593Smuzhiyun
436*4882a593Smuzhiyun		gpio@4 {
437*4882a593Smuzhiyun			reg = <4>;
438*4882a593Smuzhiyun			type = <PCA955X_TYPE_GPIO>;
439*4882a593Smuzhiyun		};
440*4882a593Smuzhiyun
441*4882a593Smuzhiyun		gpio@5 {
442*4882a593Smuzhiyun			reg = <5>;
443*4882a593Smuzhiyun			type = <PCA955X_TYPE_GPIO>;
444*4882a593Smuzhiyun		};
445*4882a593Smuzhiyun
446*4882a593Smuzhiyun		gpio@6 {
447*4882a593Smuzhiyun			reg = <6>;
448*4882a593Smuzhiyun			type = <PCA955X_TYPE_GPIO>;
449*4882a593Smuzhiyun		};
450*4882a593Smuzhiyun
451*4882a593Smuzhiyun		gpio@7 {
452*4882a593Smuzhiyun			reg = <7>;
453*4882a593Smuzhiyun			type = <PCA955X_TYPE_GPIO>;
454*4882a593Smuzhiyun		};
455*4882a593Smuzhiyun
456*4882a593Smuzhiyun		gpio@8 {
457*4882a593Smuzhiyun			reg = <8>;
458*4882a593Smuzhiyun			type = <PCA955X_TYPE_GPIO>;
459*4882a593Smuzhiyun		};
460*4882a593Smuzhiyun
461*4882a593Smuzhiyun		gpio@9 {
462*4882a593Smuzhiyun			reg = <9>;
463*4882a593Smuzhiyun			type = <PCA955X_TYPE_GPIO>;
464*4882a593Smuzhiyun		};
465*4882a593Smuzhiyun
466*4882a593Smuzhiyun		gpio@10 {
467*4882a593Smuzhiyun			reg = <10>;
468*4882a593Smuzhiyun			type = <PCA955X_TYPE_GPIO>;
469*4882a593Smuzhiyun		};
470*4882a593Smuzhiyun
471*4882a593Smuzhiyun		gpio@11 {
472*4882a593Smuzhiyun			reg = <11>;
473*4882a593Smuzhiyun			type = <PCA955X_TYPE_GPIO>;
474*4882a593Smuzhiyun		};
475*4882a593Smuzhiyun
476*4882a593Smuzhiyun		gpio@12 {
477*4882a593Smuzhiyun			reg = <12>;
478*4882a593Smuzhiyun			type = <PCA955X_TYPE_GPIO>;
479*4882a593Smuzhiyun		};
480*4882a593Smuzhiyun
481*4882a593Smuzhiyun		gpio@13 {
482*4882a593Smuzhiyun			reg = <13>;
483*4882a593Smuzhiyun			type = <PCA955X_TYPE_GPIO>;
484*4882a593Smuzhiyun		};
485*4882a593Smuzhiyun
486*4882a593Smuzhiyun		gpio@14 {
487*4882a593Smuzhiyun			reg = <14>;
488*4882a593Smuzhiyun			type = <PCA955X_TYPE_GPIO>;
489*4882a593Smuzhiyun		};
490*4882a593Smuzhiyun
491*4882a593Smuzhiyun		gpio@15 {
492*4882a593Smuzhiyun			reg = <15>;
493*4882a593Smuzhiyun			type = <PCA955X_TYPE_GPIO>;
494*4882a593Smuzhiyun		};
495*4882a593Smuzhiyun	};
496*4882a593Smuzhiyun
497*4882a593Smuzhiyun	power-supply@68 {
498*4882a593Smuzhiyun		compatible = "ibm,cffps2";
499*4882a593Smuzhiyun		reg = <0x68>;
500*4882a593Smuzhiyun	};
501*4882a593Smuzhiyun
502*4882a593Smuzhiyun	eeprom@50 {
503*4882a593Smuzhiyun		compatible = "atmel,24c64";
504*4882a593Smuzhiyun		reg = <0x50>;
505*4882a593Smuzhiyun	};
506*4882a593Smuzhiyun
507*4882a593Smuzhiyun	power-supply@69 {
508*4882a593Smuzhiyun		compatible = "ibm,cffps2";
509*4882a593Smuzhiyun		reg = <0x69>;
510*4882a593Smuzhiyun	};
511*4882a593Smuzhiyun
512*4882a593Smuzhiyun	eeprom@51 {
513*4882a593Smuzhiyun		compatible = "atmel,24c64";
514*4882a593Smuzhiyun		reg = <0x51>;
515*4882a593Smuzhiyun	};
516*4882a593Smuzhiyun};
517*4882a593Smuzhiyun
518*4882a593Smuzhiyun&i2c7 {
519*4882a593Smuzhiyun	status = "okay";
520*4882a593Smuzhiyun
521*4882a593Smuzhiyun	dps: dps310@76 {
522*4882a593Smuzhiyun		compatible = "infineon,dps310";
523*4882a593Smuzhiyun		reg = <0x76>;
524*4882a593Smuzhiyun		#io-channel-cells = <0>;
525*4882a593Smuzhiyun	};
526*4882a593Smuzhiyun
527*4882a593Smuzhiyun	tmp275@48 {
528*4882a593Smuzhiyun		compatible = "ti,tmp275";
529*4882a593Smuzhiyun		reg = <0x48>;
530*4882a593Smuzhiyun	};
531*4882a593Smuzhiyun
532*4882a593Smuzhiyun	si7021a20@20 {
533*4882a593Smuzhiyun		compatible = "si,si7021a20";
534*4882a593Smuzhiyun		reg = <0x20>;
535*4882a593Smuzhiyun	};
536*4882a593Smuzhiyun
537*4882a593Smuzhiyun	eeprom@50 {
538*4882a593Smuzhiyun		compatible = "atmel,24c64";
539*4882a593Smuzhiyun		reg = <0x50>;
540*4882a593Smuzhiyun	};
541*4882a593Smuzhiyun
542*4882a593Smuzhiyun	pca1: pca9551@60 {
543*4882a593Smuzhiyun		compatible = "nxp,pca9551";
544*4882a593Smuzhiyun		reg = <0x60>;
545*4882a593Smuzhiyun		#address-cells = <1>;
546*4882a593Smuzhiyun		#size-cells = <0>;
547*4882a593Smuzhiyun
548*4882a593Smuzhiyun		gpio-controller;
549*4882a593Smuzhiyun		#gpio-cells = <2>;
550*4882a593Smuzhiyun
551*4882a593Smuzhiyun		gpio@0 {
552*4882a593Smuzhiyun			reg = <0>;
553*4882a593Smuzhiyun			type = <PCA955X_TYPE_GPIO>;
554*4882a593Smuzhiyun		};
555*4882a593Smuzhiyun
556*4882a593Smuzhiyun		gpio@1 {
557*4882a593Smuzhiyun			reg = <1>;
558*4882a593Smuzhiyun			type = <PCA955X_TYPE_GPIO>;
559*4882a593Smuzhiyun		};
560*4882a593Smuzhiyun
561*4882a593Smuzhiyun		gpio@2 {
562*4882a593Smuzhiyun			reg = <2>;
563*4882a593Smuzhiyun			type = <PCA955X_TYPE_GPIO>;
564*4882a593Smuzhiyun		};
565*4882a593Smuzhiyun
566*4882a593Smuzhiyun		gpio@3 {
567*4882a593Smuzhiyun			reg = <3>;
568*4882a593Smuzhiyun			type = <PCA955X_TYPE_GPIO>;
569*4882a593Smuzhiyun		};
570*4882a593Smuzhiyun
571*4882a593Smuzhiyun		gpio@4 {
572*4882a593Smuzhiyun			reg = <4>;
573*4882a593Smuzhiyun			type = <PCA955X_TYPE_GPIO>;
574*4882a593Smuzhiyun		};
575*4882a593Smuzhiyun
576*4882a593Smuzhiyun		gpio@5 {
577*4882a593Smuzhiyun			reg = <5>;
578*4882a593Smuzhiyun			type = <PCA955X_TYPE_GPIO>;
579*4882a593Smuzhiyun		};
580*4882a593Smuzhiyun
581*4882a593Smuzhiyun		gpio@6 {
582*4882a593Smuzhiyun			reg = <6>;
583*4882a593Smuzhiyun			type = <PCA955X_TYPE_GPIO>;
584*4882a593Smuzhiyun		};
585*4882a593Smuzhiyun
586*4882a593Smuzhiyun		gpio@7 {
587*4882a593Smuzhiyun			reg = <7>;
588*4882a593Smuzhiyun			type = <PCA955X_TYPE_GPIO>;
589*4882a593Smuzhiyun		};
590*4882a593Smuzhiyun	};
591*4882a593Smuzhiyun};
592*4882a593Smuzhiyun
593*4882a593Smuzhiyun&i2c8 {
594*4882a593Smuzhiyun	status = "okay";
595*4882a593Smuzhiyun
596*4882a593Smuzhiyun	pca9552: pca9552@60 {
597*4882a593Smuzhiyun		compatible = "nxp,pca9552";
598*4882a593Smuzhiyun		reg = <0x60>;
599*4882a593Smuzhiyun		#address-cells = <1>;
600*4882a593Smuzhiyun		#size-cells = <0>;
601*4882a593Smuzhiyun		gpio-controller;
602*4882a593Smuzhiyun		#gpio-cells = <2>;
603*4882a593Smuzhiyun
604*4882a593Smuzhiyun		gpio-line-names = "PS_SMBUS_RESET_N", "APSS_RESET_N",
605*4882a593Smuzhiyun			"GPU0_TH_OVERT_N_BUFF",	"GPU1_TH_OVERT_N_BUFF",
606*4882a593Smuzhiyun			"GPU2_TH_OVERT_N_BUFF", "GPU3_TH_OVERT_N_BUFF",
607*4882a593Smuzhiyun			"P9_SCM0_PRES",	"P9_SCM1_PRES",
608*4882a593Smuzhiyun			"GPU0_PWR_GOOD_BUFF", "GPU1_PWR_GOOD_BUFF",
609*4882a593Smuzhiyun			"GPU2_PWR_GOOD_BUFF", "GPU3_PWR_GOOD_BUFF",
610*4882a593Smuzhiyun			"PRESENT_VRM_CP0_N", "PRESENT_VRM_CP1_N",
611*4882a593Smuzhiyun			"12V_BREAKER_FLT_N", "THROTTLE_UNLATCHED_N";
612*4882a593Smuzhiyun
613*4882a593Smuzhiyun		gpio@0 {
614*4882a593Smuzhiyun			reg = <0>;
615*4882a593Smuzhiyun			type = <PCA955X_TYPE_GPIO>;
616*4882a593Smuzhiyun		};
617*4882a593Smuzhiyun
618*4882a593Smuzhiyun		gpio@1 {
619*4882a593Smuzhiyun			reg = <1>;
620*4882a593Smuzhiyun			type = <PCA955X_TYPE_GPIO>;
621*4882a593Smuzhiyun		};
622*4882a593Smuzhiyun
623*4882a593Smuzhiyun		gpio@2 {
624*4882a593Smuzhiyun			reg = <2>;
625*4882a593Smuzhiyun			type = <PCA955X_TYPE_GPIO>;
626*4882a593Smuzhiyun		};
627*4882a593Smuzhiyun
628*4882a593Smuzhiyun		gpio@3 {
629*4882a593Smuzhiyun			reg = <3>;
630*4882a593Smuzhiyun			type = <PCA955X_TYPE_GPIO>;
631*4882a593Smuzhiyun		};
632*4882a593Smuzhiyun
633*4882a593Smuzhiyun		gpio@4 {
634*4882a593Smuzhiyun			reg = <4>;
635*4882a593Smuzhiyun			type = <PCA955X_TYPE_GPIO>;
636*4882a593Smuzhiyun		};
637*4882a593Smuzhiyun
638*4882a593Smuzhiyun		gpio@5 {
639*4882a593Smuzhiyun			reg = <5>;
640*4882a593Smuzhiyun			type = <PCA955X_TYPE_GPIO>;
641*4882a593Smuzhiyun		};
642*4882a593Smuzhiyun
643*4882a593Smuzhiyun		gpio@6 {
644*4882a593Smuzhiyun			reg = <6>;
645*4882a593Smuzhiyun			type = <PCA955X_TYPE_GPIO>;
646*4882a593Smuzhiyun		};
647*4882a593Smuzhiyun
648*4882a593Smuzhiyun		gpio@7 {
649*4882a593Smuzhiyun			reg = <7>;
650*4882a593Smuzhiyun			type = <PCA955X_TYPE_GPIO>;
651*4882a593Smuzhiyun		};
652*4882a593Smuzhiyun
653*4882a593Smuzhiyun		gpio@8 {
654*4882a593Smuzhiyun			reg = <8>;
655*4882a593Smuzhiyun			type = <PCA955X_TYPE_GPIO>;
656*4882a593Smuzhiyun		};
657*4882a593Smuzhiyun
658*4882a593Smuzhiyun		gpio@9 {
659*4882a593Smuzhiyun			reg = <9>;
660*4882a593Smuzhiyun			type = <PCA955X_TYPE_GPIO>;
661*4882a593Smuzhiyun		};
662*4882a593Smuzhiyun
663*4882a593Smuzhiyun		gpio@10 {
664*4882a593Smuzhiyun			reg = <10>;
665*4882a593Smuzhiyun			type = <PCA955X_TYPE_GPIO>;
666*4882a593Smuzhiyun		};
667*4882a593Smuzhiyun
668*4882a593Smuzhiyun		gpio@11 {
669*4882a593Smuzhiyun			reg = <11>;
670*4882a593Smuzhiyun			type = <PCA955X_TYPE_GPIO>;
671*4882a593Smuzhiyun		};
672*4882a593Smuzhiyun
673*4882a593Smuzhiyun		gpio@12 {
674*4882a593Smuzhiyun			reg = <12>;
675*4882a593Smuzhiyun			type = <PCA955X_TYPE_GPIO>;
676*4882a593Smuzhiyun		};
677*4882a593Smuzhiyun
678*4882a593Smuzhiyun		gpio@13 {
679*4882a593Smuzhiyun			reg = <13>;
680*4882a593Smuzhiyun			type = <PCA955X_TYPE_GPIO>;
681*4882a593Smuzhiyun		};
682*4882a593Smuzhiyun
683*4882a593Smuzhiyun		gpio@14 {
684*4882a593Smuzhiyun			reg = <14>;
685*4882a593Smuzhiyun			type = <PCA955X_TYPE_GPIO>;
686*4882a593Smuzhiyun		};
687*4882a593Smuzhiyun
688*4882a593Smuzhiyun		gpio@15 {
689*4882a593Smuzhiyun			reg = <15>;
690*4882a593Smuzhiyun			type = <PCA955X_TYPE_GPIO>;
691*4882a593Smuzhiyun		};
692*4882a593Smuzhiyun	};
693*4882a593Smuzhiyun
694*4882a593Smuzhiyun	rtc@32 {
695*4882a593Smuzhiyun		compatible = "epson,rx8900";
696*4882a593Smuzhiyun		reg = <0x32>;
697*4882a593Smuzhiyun	};
698*4882a593Smuzhiyun
699*4882a593Smuzhiyun	eeprom@51 {
700*4882a593Smuzhiyun		compatible = "atmel,24c64";
701*4882a593Smuzhiyun		reg = <0x51>;
702*4882a593Smuzhiyun	};
703*4882a593Smuzhiyun
704*4882a593Smuzhiyun	ucd90160@64 {
705*4882a593Smuzhiyun		compatible = "ti,ucd90160";
706*4882a593Smuzhiyun		reg = <0x64>;
707*4882a593Smuzhiyun	};
708*4882a593Smuzhiyun};
709*4882a593Smuzhiyun
710*4882a593Smuzhiyun&i2c9 {
711*4882a593Smuzhiyun	status = "okay";
712*4882a593Smuzhiyun
713*4882a593Smuzhiyun	eeprom@50 {
714*4882a593Smuzhiyun		compatible = "atmel,24c64";
715*4882a593Smuzhiyun		reg = <0x50>;
716*4882a593Smuzhiyun	};
717*4882a593Smuzhiyun
718*4882a593Smuzhiyun	tmp423a@4c {
719*4882a593Smuzhiyun		compatible = "ti,tmp423";
720*4882a593Smuzhiyun		reg = <0x4c>;
721*4882a593Smuzhiyun	};
722*4882a593Smuzhiyun
723*4882a593Smuzhiyun	ir35221@71 {
724*4882a593Smuzhiyun		compatible = "infineon,ir35221";
725*4882a593Smuzhiyun		reg = <0x71>;
726*4882a593Smuzhiyun	};
727*4882a593Smuzhiyun
728*4882a593Smuzhiyun	ir35221@72 {
729*4882a593Smuzhiyun		compatible = "infineon,ir35221";
730*4882a593Smuzhiyun		reg = <0x72>;
731*4882a593Smuzhiyun	};
732*4882a593Smuzhiyun
733*4882a593Smuzhiyun	pca2: pca9539@74 {
734*4882a593Smuzhiyun		compatible = "nxp,pca9539";
735*4882a593Smuzhiyun		reg = <0x74>;
736*4882a593Smuzhiyun		#address-cells = <1>;
737*4882a593Smuzhiyun		#size-cells = <0>;
738*4882a593Smuzhiyun		gpio-controller;
739*4882a593Smuzhiyun		#gpio-cells = <2>;
740*4882a593Smuzhiyun
741*4882a593Smuzhiyun		gpio@0 {
742*4882a593Smuzhiyun			reg = <0>;
743*4882a593Smuzhiyun		};
744*4882a593Smuzhiyun
745*4882a593Smuzhiyun		gpio@1 {
746*4882a593Smuzhiyun			reg = <1>;
747*4882a593Smuzhiyun		};
748*4882a593Smuzhiyun
749*4882a593Smuzhiyun		gpio@2 {
750*4882a593Smuzhiyun			reg = <2>;
751*4882a593Smuzhiyun		};
752*4882a593Smuzhiyun
753*4882a593Smuzhiyun		gpio@3 {
754*4882a593Smuzhiyun			reg = <3>;
755*4882a593Smuzhiyun		};
756*4882a593Smuzhiyun
757*4882a593Smuzhiyun		gpio@4 {
758*4882a593Smuzhiyun			reg = <4>;
759*4882a593Smuzhiyun		};
760*4882a593Smuzhiyun
761*4882a593Smuzhiyun		gpio@5 {
762*4882a593Smuzhiyun			reg = <5>;
763*4882a593Smuzhiyun		};
764*4882a593Smuzhiyun
765*4882a593Smuzhiyun		gpio@6 {
766*4882a593Smuzhiyun			reg = <6>;
767*4882a593Smuzhiyun		};
768*4882a593Smuzhiyun
769*4882a593Smuzhiyun		gpio@7 {
770*4882a593Smuzhiyun			reg = <7>;
771*4882a593Smuzhiyun		};
772*4882a593Smuzhiyun
773*4882a593Smuzhiyun		gpio@8 {
774*4882a593Smuzhiyun			reg = <8>;
775*4882a593Smuzhiyun		};
776*4882a593Smuzhiyun
777*4882a593Smuzhiyun		gpio@9 {
778*4882a593Smuzhiyun			reg = <9>;
779*4882a593Smuzhiyun		};
780*4882a593Smuzhiyun
781*4882a593Smuzhiyun		gpio@10 {
782*4882a593Smuzhiyun			reg = <10>;
783*4882a593Smuzhiyun		};
784*4882a593Smuzhiyun
785*4882a593Smuzhiyun		gpio@11 {
786*4882a593Smuzhiyun			reg = <11>;
787*4882a593Smuzhiyun		};
788*4882a593Smuzhiyun
789*4882a593Smuzhiyun		gpio@12 {
790*4882a593Smuzhiyun			reg = <12>;
791*4882a593Smuzhiyun		};
792*4882a593Smuzhiyun
793*4882a593Smuzhiyun		gpio@13 {
794*4882a593Smuzhiyun			reg = <13>;
795*4882a593Smuzhiyun		};
796*4882a593Smuzhiyun
797*4882a593Smuzhiyun		gpio@14 {
798*4882a593Smuzhiyun			reg = <14>;
799*4882a593Smuzhiyun		};
800*4882a593Smuzhiyun
801*4882a593Smuzhiyun		gpio@15 {
802*4882a593Smuzhiyun			reg = <15>;
803*4882a593Smuzhiyun		};
804*4882a593Smuzhiyun	};
805*4882a593Smuzhiyun};
806*4882a593Smuzhiyun
807*4882a593Smuzhiyun&i2c10 {
808*4882a593Smuzhiyun	status = "okay";
809*4882a593Smuzhiyun
810*4882a593Smuzhiyun	eeprom@50 {
811*4882a593Smuzhiyun		compatible = "atmel,24c64";
812*4882a593Smuzhiyun		reg = <0x50>;
813*4882a593Smuzhiyun	};
814*4882a593Smuzhiyun
815*4882a593Smuzhiyun	tmp423a@4c {
816*4882a593Smuzhiyun		compatible = "ti,tmp423";
817*4882a593Smuzhiyun		reg = <0x4c>;
818*4882a593Smuzhiyun	};
819*4882a593Smuzhiyun
820*4882a593Smuzhiyun	ir35221@71 {
821*4882a593Smuzhiyun		compatible = "infineon,ir35221";
822*4882a593Smuzhiyun		reg = <0x71>;
823*4882a593Smuzhiyun	};
824*4882a593Smuzhiyun
825*4882a593Smuzhiyun	ir35221@72 {
826*4882a593Smuzhiyun		compatible = "infineon,ir35221";
827*4882a593Smuzhiyun		reg = <0x72>;
828*4882a593Smuzhiyun	};
829*4882a593Smuzhiyun
830*4882a593Smuzhiyun	pca3: pca9539@74 {
831*4882a593Smuzhiyun		compatible = "nxp,pca9539";
832*4882a593Smuzhiyun		reg = <0x74>;
833*4882a593Smuzhiyun		#address-cells = <1>;
834*4882a593Smuzhiyun		#size-cells = <0>;
835*4882a593Smuzhiyun		gpio-controller;
836*4882a593Smuzhiyun		#gpio-cells = <2>;
837*4882a593Smuzhiyun
838*4882a593Smuzhiyun		gpio@0 {
839*4882a593Smuzhiyun			reg = <0>;
840*4882a593Smuzhiyun		};
841*4882a593Smuzhiyun
842*4882a593Smuzhiyun		gpio@1 {
843*4882a593Smuzhiyun			reg = <1>;
844*4882a593Smuzhiyun		};
845*4882a593Smuzhiyun
846*4882a593Smuzhiyun		gpio@2 {
847*4882a593Smuzhiyun			reg = <2>;
848*4882a593Smuzhiyun		};
849*4882a593Smuzhiyun
850*4882a593Smuzhiyun		gpio@3 {
851*4882a593Smuzhiyun			reg = <3>;
852*4882a593Smuzhiyun		};
853*4882a593Smuzhiyun
854*4882a593Smuzhiyun		gpio@4 {
855*4882a593Smuzhiyun			reg = <4>;
856*4882a593Smuzhiyun		};
857*4882a593Smuzhiyun
858*4882a593Smuzhiyun		gpio@5 {
859*4882a593Smuzhiyun			reg = <5>;
860*4882a593Smuzhiyun		};
861*4882a593Smuzhiyun
862*4882a593Smuzhiyun		gpio@6 {
863*4882a593Smuzhiyun			reg = <6>;
864*4882a593Smuzhiyun		};
865*4882a593Smuzhiyun
866*4882a593Smuzhiyun		gpio@7 {
867*4882a593Smuzhiyun			reg = <7>;
868*4882a593Smuzhiyun		};
869*4882a593Smuzhiyun
870*4882a593Smuzhiyun		gpio@8 {
871*4882a593Smuzhiyun			reg = <8>;
872*4882a593Smuzhiyun		};
873*4882a593Smuzhiyun
874*4882a593Smuzhiyun		gpio@9 {
875*4882a593Smuzhiyun			reg = <9>;
876*4882a593Smuzhiyun		};
877*4882a593Smuzhiyun
878*4882a593Smuzhiyun		gpio@10 {
879*4882a593Smuzhiyun			reg = <10>;
880*4882a593Smuzhiyun		};
881*4882a593Smuzhiyun
882*4882a593Smuzhiyun		gpio@11 {
883*4882a593Smuzhiyun			reg = <11>;
884*4882a593Smuzhiyun		};
885*4882a593Smuzhiyun
886*4882a593Smuzhiyun		gpio@12 {
887*4882a593Smuzhiyun			reg = <12>;
888*4882a593Smuzhiyun		};
889*4882a593Smuzhiyun
890*4882a593Smuzhiyun		gpio@13 {
891*4882a593Smuzhiyun			reg = <13>;
892*4882a593Smuzhiyun		};
893*4882a593Smuzhiyun
894*4882a593Smuzhiyun		gpio@14 {
895*4882a593Smuzhiyun			reg = <14>;
896*4882a593Smuzhiyun		};
897*4882a593Smuzhiyun
898*4882a593Smuzhiyun		gpio@15 {
899*4882a593Smuzhiyun			reg = <15>;
900*4882a593Smuzhiyun		};
901*4882a593Smuzhiyun	};
902*4882a593Smuzhiyun};
903*4882a593Smuzhiyun
904*4882a593Smuzhiyun&i2c11 {
905*4882a593Smuzhiyun	/* MUX
906*4882a593Smuzhiyun	 *   -> PCIe Slot 0
907*4882a593Smuzhiyun	 *   -> PCIe Slot 1
908*4882a593Smuzhiyun	 *   -> PCIe Slot 2
909*4882a593Smuzhiyun	 *   -> PCIe Slot 3
910*4882a593Smuzhiyun	 */
911*4882a593Smuzhiyun	status = "okay";
912*4882a593Smuzhiyun};
913*4882a593Smuzhiyun
914*4882a593Smuzhiyun&i2c12 {
915*4882a593Smuzhiyun	status = "okay";
916*4882a593Smuzhiyun
917*4882a593Smuzhiyun	tmp275@48 {
918*4882a593Smuzhiyun		compatible = "ti,tmp275";
919*4882a593Smuzhiyun		reg = <0x48>;
920*4882a593Smuzhiyun	};
921*4882a593Smuzhiyun
922*4882a593Smuzhiyun	tmp275@4a {
923*4882a593Smuzhiyun		compatible = "ti,tmp275";
924*4882a593Smuzhiyun		reg = <0x4a>;
925*4882a593Smuzhiyun	};
926*4882a593Smuzhiyun};
927*4882a593Smuzhiyun
928*4882a593Smuzhiyun&i2c13 {
929*4882a593Smuzhiyun	status = "okay";
930*4882a593Smuzhiyun};
931*4882a593Smuzhiyun
932*4882a593Smuzhiyun&vuart {
933*4882a593Smuzhiyun	status = "okay";
934*4882a593Smuzhiyun};
935*4882a593Smuzhiyun
936*4882a593Smuzhiyun&gfx {
937*4882a593Smuzhiyun	status = "okay";
938*4882a593Smuzhiyun	memory-region = <&gfx_memory>;
939*4882a593Smuzhiyun};
940*4882a593Smuzhiyun
941*4882a593Smuzhiyun&pinctrl {
942*4882a593Smuzhiyun	aspeed,external-nodes = <&gfx &lhc>;
943*4882a593Smuzhiyun};
944*4882a593Smuzhiyun
945*4882a593Smuzhiyun&wdt1 {
946*4882a593Smuzhiyun	aspeed,reset-type = "none";
947*4882a593Smuzhiyun	aspeed,external-signal;
948*4882a593Smuzhiyun	aspeed,ext-push-pull;
949*4882a593Smuzhiyun	aspeed,ext-active-high;
950*4882a593Smuzhiyun
951*4882a593Smuzhiyun	pinctrl-names = "default";
952*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_wdtrst1_default>;
953*4882a593Smuzhiyun};
954*4882a593Smuzhiyun
955*4882a593Smuzhiyun&wdt2 {
956*4882a593Smuzhiyun	aspeed,alt-boot;
957*4882a593Smuzhiyun};
958*4882a593Smuzhiyun
959*4882a593Smuzhiyun&ibt {
960*4882a593Smuzhiyun	status = "okay";
961*4882a593Smuzhiyun};
962*4882a593Smuzhiyun
963*4882a593Smuzhiyun&adc {
964*4882a593Smuzhiyun	status = "okay";
965*4882a593Smuzhiyun};
966*4882a593Smuzhiyun
967*4882a593Smuzhiyun&sdmmc {
968*4882a593Smuzhiyun       status = "okay";
969*4882a593Smuzhiyun};
970*4882a593Smuzhiyun
971*4882a593Smuzhiyun&sdhci1 {
972*4882a593Smuzhiyun       status = "okay";
973*4882a593Smuzhiyun
974*4882a593Smuzhiyun       pinctrl-names = "default";
975*4882a593Smuzhiyun       pinctrl-0 = <&pinctrl_sd2_default>;
976*4882a593Smuzhiyun};
977*4882a593Smuzhiyun
978*4882a593Smuzhiyun#include "ibm-power9-dual.dtsi"
979