1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0+ 2*4882a593Smuzhiyun/dts-v1/; 3*4882a593Smuzhiyun#include "aspeed-g5.dtsi" 4*4882a593Smuzhiyun#include <dt-bindings/gpio/aspeed-gpio.h> 5*4882a593Smuzhiyun#include <dt-bindings/leds/leds-pca955x.h> 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun/ { 8*4882a593Smuzhiyun model = "Mihawk BMC"; 9*4882a593Smuzhiyun compatible = "ibm,mihawk-bmc", "aspeed,ast2500"; 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun aliases { 12*4882a593Smuzhiyun i2c215 = &bus6_mux215; 13*4882a593Smuzhiyun i2c216 = &bus6_mux216; 14*4882a593Smuzhiyun i2c217 = &bus6_mux217; 15*4882a593Smuzhiyun i2c218 = &bus6_mux218; 16*4882a593Smuzhiyun i2c219 = &bus6_mux219; 17*4882a593Smuzhiyun i2c220 = &bus6_mux220; 18*4882a593Smuzhiyun i2c221 = &bus6_mux221; 19*4882a593Smuzhiyun i2c222 = &bus6_mux222; 20*4882a593Smuzhiyun i2c223 = &bus7_mux223; 21*4882a593Smuzhiyun i2c224 = &bus7_mux224; 22*4882a593Smuzhiyun i2c225 = &bus7_mux225; 23*4882a593Smuzhiyun i2c226 = &bus7_mux226; 24*4882a593Smuzhiyun i2c227 = &bus7_mux227; 25*4882a593Smuzhiyun i2c228 = &bus7_mux228; 26*4882a593Smuzhiyun i2c229 = &bus7_mux229; 27*4882a593Smuzhiyun i2c230 = &bus7_mux230; 28*4882a593Smuzhiyun i2c231 = &bus9_mux231; 29*4882a593Smuzhiyun i2c232 = &bus9_mux232; 30*4882a593Smuzhiyun i2c233 = &bus9_mux233; 31*4882a593Smuzhiyun i2c234 = &bus9_mux234; 32*4882a593Smuzhiyun i2c235 = &bus9_mux235; 33*4882a593Smuzhiyun i2c236 = &bus9_mux236; 34*4882a593Smuzhiyun i2c237 = &bus9_mux237; 35*4882a593Smuzhiyun i2c238 = &bus9_mux238; 36*4882a593Smuzhiyun i2c239 = &bus10_mux239; 37*4882a593Smuzhiyun i2c240 = &bus10_mux240; 38*4882a593Smuzhiyun i2c241 = &bus10_mux241; 39*4882a593Smuzhiyun i2c242 = &bus10_mux242; 40*4882a593Smuzhiyun i2c243 = &bus10_mux243; 41*4882a593Smuzhiyun i2c244 = &bus10_mux244; 42*4882a593Smuzhiyun i2c245 = &bus10_mux245; 43*4882a593Smuzhiyun i2c246 = &bus10_mux246; 44*4882a593Smuzhiyun i2c247 = &bus12_mux247; 45*4882a593Smuzhiyun i2c248 = &bus12_mux248; 46*4882a593Smuzhiyun i2c249 = &bus12_mux249; 47*4882a593Smuzhiyun i2c250 = &bus12_mux250; 48*4882a593Smuzhiyun i2c251 = &bus13_mux251; 49*4882a593Smuzhiyun i2c252 = &bus13_mux252; 50*4882a593Smuzhiyun i2c253 = &bus13_mux253; 51*4882a593Smuzhiyun i2c254 = &bus13_mux254; 52*4882a593Smuzhiyun i2c255 = &bus13_mux255; 53*4882a593Smuzhiyun i2c256 = &bus13_mux256; 54*4882a593Smuzhiyun i2c257 = &bus13_mux257; 55*4882a593Smuzhiyun i2c258 = &bus13_mux258; 56*4882a593Smuzhiyun }; 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun chosen { 59*4882a593Smuzhiyun stdout-path = &uart5; 60*4882a593Smuzhiyun bootargs = "console=ttyS4,115200 earlyprintk"; 61*4882a593Smuzhiyun }; 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun memory@80000000 { 64*4882a593Smuzhiyun reg = <0x80000000 0x20000000>; 65*4882a593Smuzhiyun }; 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun reserved-memory { 68*4882a593Smuzhiyun #address-cells = <1>; 69*4882a593Smuzhiyun #size-cells = <1>; 70*4882a593Smuzhiyun ranges; 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun flash_memory: region@98000000 { 73*4882a593Smuzhiyun no-map; 74*4882a593Smuzhiyun reg = <0x98000000 0x04000000>; /* 64M */ 75*4882a593Smuzhiyun }; 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun gfx_memory: framebuffer { 78*4882a593Smuzhiyun size = <0x01000000>; 79*4882a593Smuzhiyun alignment = <0x01000000>; 80*4882a593Smuzhiyun compatible = "shared-dma-pool"; 81*4882a593Smuzhiyun reusable; 82*4882a593Smuzhiyun }; 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun video_engine_memory: jpegbuffer { 85*4882a593Smuzhiyun size = <0x02000000>; 86*4882a593Smuzhiyun alignment = <0x01000000>; 87*4882a593Smuzhiyun compatible = "shared-dma-pool"; 88*4882a593Smuzhiyun reusable; 89*4882a593Smuzhiyun }; 90*4882a593Smuzhiyun }; 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun gpio-keys { 93*4882a593Smuzhiyun compatible = "gpio-keys"; 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun air-water { 96*4882a593Smuzhiyun label = "air-water"; 97*4882a593Smuzhiyun gpios = <&gpio ASPEED_GPIO(F, 6) GPIO_ACTIVE_LOW>; 98*4882a593Smuzhiyun linux,code = <ASPEED_GPIO(F, 6)>; 99*4882a593Smuzhiyun }; 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun checkstop { 102*4882a593Smuzhiyun label = "checkstop"; 103*4882a593Smuzhiyun gpios = <&gpio ASPEED_GPIO(J, 2) GPIO_ACTIVE_LOW>; 104*4882a593Smuzhiyun linux,code = <ASPEED_GPIO(J, 2)>; 105*4882a593Smuzhiyun }; 106*4882a593Smuzhiyun 107*4882a593Smuzhiyun ps0-presence { 108*4882a593Smuzhiyun label = "ps0-presence"; 109*4882a593Smuzhiyun gpios = <&gpio ASPEED_GPIO(Z, 2) GPIO_ACTIVE_LOW>; 110*4882a593Smuzhiyun linux,code = <ASPEED_GPIO(Z, 2)>; 111*4882a593Smuzhiyun }; 112*4882a593Smuzhiyun 113*4882a593Smuzhiyun ps1-presence { 114*4882a593Smuzhiyun label = "ps1-presence"; 115*4882a593Smuzhiyun gpios = <&gpio ASPEED_GPIO(Z, 0) GPIO_ACTIVE_LOW>; 116*4882a593Smuzhiyun linux,code = <ASPEED_GPIO(Z, 0)>; 117*4882a593Smuzhiyun }; 118*4882a593Smuzhiyun id-button { 119*4882a593Smuzhiyun label = "id-button"; 120*4882a593Smuzhiyun gpios = <&gpio ASPEED_GPIO(F, 1) GPIO_ACTIVE_LOW>; 121*4882a593Smuzhiyun linux,code = <ASPEED_GPIO(F, 1)>; 122*4882a593Smuzhiyun }; 123*4882a593Smuzhiyun }; 124*4882a593Smuzhiyun 125*4882a593Smuzhiyun gpio-keys-polled { 126*4882a593Smuzhiyun compatible = "gpio-keys-polled"; 127*4882a593Smuzhiyun poll-interval = <1000>; 128*4882a593Smuzhiyun 129*4882a593Smuzhiyun fan0-presence { 130*4882a593Smuzhiyun label = "fan0-presence"; 131*4882a593Smuzhiyun gpios = <&pca9552 9 GPIO_ACTIVE_LOW>; 132*4882a593Smuzhiyun linux,code = <9>; 133*4882a593Smuzhiyun }; 134*4882a593Smuzhiyun 135*4882a593Smuzhiyun fan1-presence { 136*4882a593Smuzhiyun label = "fan1-presence"; 137*4882a593Smuzhiyun gpios = <&pca9552 10 GPIO_ACTIVE_LOW>; 138*4882a593Smuzhiyun linux,code = <10>; 139*4882a593Smuzhiyun }; 140*4882a593Smuzhiyun 141*4882a593Smuzhiyun fan2-presence { 142*4882a593Smuzhiyun label = "fan2-presence"; 143*4882a593Smuzhiyun gpios = <&pca9552 11 GPIO_ACTIVE_LOW>; 144*4882a593Smuzhiyun linux,code = <11>; 145*4882a593Smuzhiyun }; 146*4882a593Smuzhiyun 147*4882a593Smuzhiyun fan3-presence { 148*4882a593Smuzhiyun label = "fan3-presence"; 149*4882a593Smuzhiyun gpios = <&pca9552 12 GPIO_ACTIVE_LOW>; 150*4882a593Smuzhiyun linux,code = <12>; 151*4882a593Smuzhiyun }; 152*4882a593Smuzhiyun 153*4882a593Smuzhiyun fan4-presence { 154*4882a593Smuzhiyun label = "fan4-presence"; 155*4882a593Smuzhiyun gpios = <&pca9552 13 GPIO_ACTIVE_LOW>; 156*4882a593Smuzhiyun linux,code = <13>; 157*4882a593Smuzhiyun }; 158*4882a593Smuzhiyun 159*4882a593Smuzhiyun fan5-presence { 160*4882a593Smuzhiyun label = "fan5-presence"; 161*4882a593Smuzhiyun gpios = <&pca9552 14 GPIO_ACTIVE_LOW>; 162*4882a593Smuzhiyun linux,code = <14>; 163*4882a593Smuzhiyun }; 164*4882a593Smuzhiyun }; 165*4882a593Smuzhiyun 166*4882a593Smuzhiyun leds { 167*4882a593Smuzhiyun compatible = "gpio-leds"; 168*4882a593Smuzhiyun 169*4882a593Smuzhiyun front-fault { 170*4882a593Smuzhiyun retain-state-shutdown; 171*4882a593Smuzhiyun default-state = "keep"; 172*4882a593Smuzhiyun gpios = <&gpio ASPEED_GPIO(AA, 0) GPIO_ACTIVE_LOW>; 173*4882a593Smuzhiyun }; 174*4882a593Smuzhiyun 175*4882a593Smuzhiyun power-button { 176*4882a593Smuzhiyun retain-state-shutdown; 177*4882a593Smuzhiyun default-state = "keep"; 178*4882a593Smuzhiyun gpios = <&gpio ASPEED_GPIO(AA, 1) GPIO_ACTIVE_LOW>; 179*4882a593Smuzhiyun }; 180*4882a593Smuzhiyun 181*4882a593Smuzhiyun front-id { 182*4882a593Smuzhiyun retain-state-shutdown; 183*4882a593Smuzhiyun default-state = "keep"; 184*4882a593Smuzhiyun gpios = <&gpio ASPEED_GPIO(AA, 2) GPIO_ACTIVE_LOW>; 185*4882a593Smuzhiyun }; 186*4882a593Smuzhiyun 187*4882a593Smuzhiyun 188*4882a593Smuzhiyun fan0 { 189*4882a593Smuzhiyun retain-state-shutdown; 190*4882a593Smuzhiyun default-state = "keep"; 191*4882a593Smuzhiyun gpios = <&pca9552 0 GPIO_ACTIVE_LOW>; 192*4882a593Smuzhiyun }; 193*4882a593Smuzhiyun 194*4882a593Smuzhiyun fan1 { 195*4882a593Smuzhiyun retain-state-shutdown; 196*4882a593Smuzhiyun default-state = "keep"; 197*4882a593Smuzhiyun gpios = <&pca9552 1 GPIO_ACTIVE_LOW>; 198*4882a593Smuzhiyun }; 199*4882a593Smuzhiyun 200*4882a593Smuzhiyun fan2 { 201*4882a593Smuzhiyun retain-state-shutdown; 202*4882a593Smuzhiyun default-state = "keep"; 203*4882a593Smuzhiyun gpios = <&pca9552 2 GPIO_ACTIVE_LOW>; 204*4882a593Smuzhiyun }; 205*4882a593Smuzhiyun 206*4882a593Smuzhiyun fan3 { 207*4882a593Smuzhiyun retain-state-shutdown; 208*4882a593Smuzhiyun default-state = "keep"; 209*4882a593Smuzhiyun gpios = <&pca9552 3 GPIO_ACTIVE_LOW>; 210*4882a593Smuzhiyun }; 211*4882a593Smuzhiyun 212*4882a593Smuzhiyun fan4 { 213*4882a593Smuzhiyun retain-state-shutdown; 214*4882a593Smuzhiyun default-state = "keep"; 215*4882a593Smuzhiyun gpios = <&pca9552 4 GPIO_ACTIVE_LOW>; 216*4882a593Smuzhiyun }; 217*4882a593Smuzhiyun 218*4882a593Smuzhiyun fan5 { 219*4882a593Smuzhiyun retain-state-shutdown; 220*4882a593Smuzhiyun default-state = "keep"; 221*4882a593Smuzhiyun gpios = <&pca9552 5 GPIO_ACTIVE_LOW>; 222*4882a593Smuzhiyun }; 223*4882a593Smuzhiyun }; 224*4882a593Smuzhiyun 225*4882a593Smuzhiyun fsi: gpio-fsi { 226*4882a593Smuzhiyun compatible = "fsi-master-gpio", "fsi-master"; 227*4882a593Smuzhiyun #address-cells = <2>; 228*4882a593Smuzhiyun #size-cells = <0>; 229*4882a593Smuzhiyun no-gpio-delays; 230*4882a593Smuzhiyun 231*4882a593Smuzhiyun clock-gpios = <&gpio ASPEED_GPIO(E, 6) GPIO_ACTIVE_HIGH>; 232*4882a593Smuzhiyun data-gpios = <&gpio ASPEED_GPIO(E, 7) GPIO_ACTIVE_HIGH>; 233*4882a593Smuzhiyun mux-gpios = <&gpio ASPEED_GPIO(E, 5) GPIO_ACTIVE_HIGH>; 234*4882a593Smuzhiyun enable-gpios = <&gpio ASPEED_GPIO(D, 0) GPIO_ACTIVE_HIGH>; 235*4882a593Smuzhiyun trans-gpios = <&gpio ASPEED_GPIO(R, 2) GPIO_ACTIVE_HIGH>; 236*4882a593Smuzhiyun }; 237*4882a593Smuzhiyun iio-hwmon-12v { 238*4882a593Smuzhiyun compatible = "iio-hwmon"; 239*4882a593Smuzhiyun io-channels = <&adc 0>; 240*4882a593Smuzhiyun }; 241*4882a593Smuzhiyun 242*4882a593Smuzhiyun iio-hwmon-5v { 243*4882a593Smuzhiyun compatible = "iio-hwmon"; 244*4882a593Smuzhiyun io-channels = <&adc 1>; 245*4882a593Smuzhiyun }; 246*4882a593Smuzhiyun 247*4882a593Smuzhiyun iio-hwmon-3v { 248*4882a593Smuzhiyun compatible = "iio-hwmon"; 249*4882a593Smuzhiyun io-channels = <&adc 2>; 250*4882a593Smuzhiyun }; 251*4882a593Smuzhiyun 252*4882a593Smuzhiyun iio-hwmon-vdd0 { 253*4882a593Smuzhiyun compatible = "iio-hwmon"; 254*4882a593Smuzhiyun io-channels = <&adc 3>; 255*4882a593Smuzhiyun }; 256*4882a593Smuzhiyun 257*4882a593Smuzhiyun iio-hwmon-vdd1 { 258*4882a593Smuzhiyun compatible = "iio-hwmon"; 259*4882a593Smuzhiyun io-channels = <&adc 4>; 260*4882a593Smuzhiyun }; 261*4882a593Smuzhiyun 262*4882a593Smuzhiyun iio-hwmon-vcs0 { 263*4882a593Smuzhiyun compatible = "iio-hwmon"; 264*4882a593Smuzhiyun io-channels = <&adc 5>; 265*4882a593Smuzhiyun }; 266*4882a593Smuzhiyun 267*4882a593Smuzhiyun iio-hwmon-vcs1 { 268*4882a593Smuzhiyun compatible = "iio-hwmon"; 269*4882a593Smuzhiyun io-channels = <&adc 6>; 270*4882a593Smuzhiyun }; 271*4882a593Smuzhiyun 272*4882a593Smuzhiyun iio-hwmon-vdn0 { 273*4882a593Smuzhiyun compatible = "iio-hwmon"; 274*4882a593Smuzhiyun io-channels = <&adc 7>; 275*4882a593Smuzhiyun }; 276*4882a593Smuzhiyun 277*4882a593Smuzhiyun iio-hwmon-vdn1 { 278*4882a593Smuzhiyun compatible = "iio-hwmon"; 279*4882a593Smuzhiyun io-channels = <&adc 8>; 280*4882a593Smuzhiyun }; 281*4882a593Smuzhiyun 282*4882a593Smuzhiyun iio-hwmon-vio0 { 283*4882a593Smuzhiyun compatible = "iio-hwmon"; 284*4882a593Smuzhiyun io-channels = <&adc 9>; 285*4882a593Smuzhiyun }; 286*4882a593Smuzhiyun 287*4882a593Smuzhiyun iio-hwmon-vio1 { 288*4882a593Smuzhiyun compatible = "iio-hwmon"; 289*4882a593Smuzhiyun io-channels = <&adc 10>; 290*4882a593Smuzhiyun }; 291*4882a593Smuzhiyun 292*4882a593Smuzhiyun iio-hwmon-vddra { 293*4882a593Smuzhiyun compatible = "iio-hwmon"; 294*4882a593Smuzhiyun io-channels = <&adc 11>; 295*4882a593Smuzhiyun }; 296*4882a593Smuzhiyun 297*4882a593Smuzhiyun iio-hwmon-battery { 298*4882a593Smuzhiyun compatible = "iio-hwmon"; 299*4882a593Smuzhiyun io-channels = <&adc 12>; 300*4882a593Smuzhiyun }; 301*4882a593Smuzhiyun 302*4882a593Smuzhiyun iio-hwmon-vddrb { 303*4882a593Smuzhiyun compatible = "iio-hwmon"; 304*4882a593Smuzhiyun io-channels = <&adc 13>; 305*4882a593Smuzhiyun }; 306*4882a593Smuzhiyun 307*4882a593Smuzhiyun iio-hwmon-vddrc { 308*4882a593Smuzhiyun compatible = "iio-hwmon"; 309*4882a593Smuzhiyun io-channels = <&adc 14>; 310*4882a593Smuzhiyun }; 311*4882a593Smuzhiyun 312*4882a593Smuzhiyun iio-hwmon-vddrd { 313*4882a593Smuzhiyun compatible = "iio-hwmon"; 314*4882a593Smuzhiyun io-channels = <&adc 15>; 315*4882a593Smuzhiyun }; 316*4882a593Smuzhiyun}; 317*4882a593Smuzhiyun 318*4882a593Smuzhiyun&pwm_tacho { 319*4882a593Smuzhiyun status = "okay"; 320*4882a593Smuzhiyun pinctrl-names = "default"; 321*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default 322*4882a593Smuzhiyun &pinctrl_pwm2_default &pinctrl_pwm3_default 323*4882a593Smuzhiyun &pinctrl_pwm4_default &pinctrl_pwm5_default>; 324*4882a593Smuzhiyun 325*4882a593Smuzhiyun fan@0 { 326*4882a593Smuzhiyun reg = <0x00>; 327*4882a593Smuzhiyun aspeed,fan-tach-ch = /bits/ 8 <0x00>; 328*4882a593Smuzhiyun }; 329*4882a593Smuzhiyun 330*4882a593Smuzhiyun fan@1 { 331*4882a593Smuzhiyun reg = <0x01>; 332*4882a593Smuzhiyun aspeed,fan-tach-ch = /bits/ 8 <0x01>; 333*4882a593Smuzhiyun }; 334*4882a593Smuzhiyun 335*4882a593Smuzhiyun fan@2 { 336*4882a593Smuzhiyun reg = <0x02>; 337*4882a593Smuzhiyun aspeed,fan-tach-ch = /bits/ 8 <0x02>; 338*4882a593Smuzhiyun }; 339*4882a593Smuzhiyun 340*4882a593Smuzhiyun fan@3 { 341*4882a593Smuzhiyun reg = <0x03>; 342*4882a593Smuzhiyun aspeed,fan-tach-ch = /bits/ 8 <0x03>; 343*4882a593Smuzhiyun }; 344*4882a593Smuzhiyun 345*4882a593Smuzhiyun fan@4 { 346*4882a593Smuzhiyun reg = <0x04>; 347*4882a593Smuzhiyun aspeed,fan-tach-ch = /bits/ 8 <0x04>; 348*4882a593Smuzhiyun }; 349*4882a593Smuzhiyun 350*4882a593Smuzhiyun fan@5 { 351*4882a593Smuzhiyun reg = <0x05>; 352*4882a593Smuzhiyun aspeed,fan-tach-ch = /bits/ 8 <0x05>; 353*4882a593Smuzhiyun }; 354*4882a593Smuzhiyun 355*4882a593Smuzhiyun fan@6 { 356*4882a593Smuzhiyun reg = <0x00>; 357*4882a593Smuzhiyun aspeed,fan-tach-ch = /bits/ 8 <0x06>; 358*4882a593Smuzhiyun }; 359*4882a593Smuzhiyun 360*4882a593Smuzhiyun fan@7 { 361*4882a593Smuzhiyun reg = <0x01>; 362*4882a593Smuzhiyun aspeed,fan-tach-ch = /bits/ 8 <0x07>; 363*4882a593Smuzhiyun }; 364*4882a593Smuzhiyun 365*4882a593Smuzhiyun fan@8 { 366*4882a593Smuzhiyun reg = <0x02>; 367*4882a593Smuzhiyun aspeed,fan-tach-ch = /bits/ 8 <0x08>; 368*4882a593Smuzhiyun }; 369*4882a593Smuzhiyun 370*4882a593Smuzhiyun fan@9 { 371*4882a593Smuzhiyun reg = <0x03>; 372*4882a593Smuzhiyun aspeed,fan-tach-ch = /bits/ 8 <0x09>; 373*4882a593Smuzhiyun }; 374*4882a593Smuzhiyun 375*4882a593Smuzhiyun fan@10 { 376*4882a593Smuzhiyun reg = <0x04>; 377*4882a593Smuzhiyun aspeed,fan-tach-ch = /bits/ 8 <0x0a>; 378*4882a593Smuzhiyun }; 379*4882a593Smuzhiyun 380*4882a593Smuzhiyun fan@11 { 381*4882a593Smuzhiyun reg = <0x05>; 382*4882a593Smuzhiyun aspeed,fan-tach-ch = /bits/ 8 <0x0b>; 383*4882a593Smuzhiyun }; 384*4882a593Smuzhiyun}; 385*4882a593Smuzhiyun 386*4882a593Smuzhiyun&fmc { 387*4882a593Smuzhiyun status = "okay"; 388*4882a593Smuzhiyun flash@0 { 389*4882a593Smuzhiyun status = "okay"; 390*4882a593Smuzhiyun label = "bmc"; 391*4882a593Smuzhiyun m25p,fast-read; 392*4882a593Smuzhiyun spi-max-frequency = <50000000>; 393*4882a593Smuzhiyun partitions { 394*4882a593Smuzhiyun #address-cells = < 1 >; 395*4882a593Smuzhiyun #size-cells = < 1 >; 396*4882a593Smuzhiyun compatible = "fixed-partitions"; 397*4882a593Smuzhiyun u-boot@0 { 398*4882a593Smuzhiyun reg = < 0 0x60000 >; 399*4882a593Smuzhiyun label = "u-boot"; 400*4882a593Smuzhiyun }; 401*4882a593Smuzhiyun u-boot-env@60000 { 402*4882a593Smuzhiyun reg = < 0x60000 0x20000 >; 403*4882a593Smuzhiyun label = "u-boot-env"; 404*4882a593Smuzhiyun }; 405*4882a593Smuzhiyun obmc-ubi@80000 { 406*4882a593Smuzhiyun reg = < 0x80000 0x1F80000 >; 407*4882a593Smuzhiyun label = "obmc-ubi"; 408*4882a593Smuzhiyun }; 409*4882a593Smuzhiyun }; 410*4882a593Smuzhiyun }; 411*4882a593Smuzhiyun flash@1 { 412*4882a593Smuzhiyun status = "okay"; 413*4882a593Smuzhiyun label = "alt-bmc"; 414*4882a593Smuzhiyun m25p,fast-read; 415*4882a593Smuzhiyun spi-max-frequency = <50000000>; 416*4882a593Smuzhiyun partitions { 417*4882a593Smuzhiyun #address-cells = < 1 >; 418*4882a593Smuzhiyun #size-cells = < 1 >; 419*4882a593Smuzhiyun compatible = "fixed-partitions"; 420*4882a593Smuzhiyun u-boot@0 { 421*4882a593Smuzhiyun reg = < 0 0x60000 >; 422*4882a593Smuzhiyun label = "alt-u-boot"; 423*4882a593Smuzhiyun }; 424*4882a593Smuzhiyun u-boot-env@60000 { 425*4882a593Smuzhiyun reg = < 0x60000 0x20000 >; 426*4882a593Smuzhiyun label = "alt-u-boot-env"; 427*4882a593Smuzhiyun }; 428*4882a593Smuzhiyun obmc-ubi@80000 { 429*4882a593Smuzhiyun reg = < 0x80000 0x1F80000 >; 430*4882a593Smuzhiyun label = "alt-obmc-ubi"; 431*4882a593Smuzhiyun }; 432*4882a593Smuzhiyun }; 433*4882a593Smuzhiyun }; 434*4882a593Smuzhiyun}; 435*4882a593Smuzhiyun 436*4882a593Smuzhiyun&spi1 { 437*4882a593Smuzhiyun status = "okay"; 438*4882a593Smuzhiyun pinctrl-names = "default"; 439*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_spi1_default>; 440*4882a593Smuzhiyun 441*4882a593Smuzhiyun flash@0 { 442*4882a593Smuzhiyun status = "okay"; 443*4882a593Smuzhiyun label = "pnor"; 444*4882a593Smuzhiyun m25p,fast-read; 445*4882a593Smuzhiyun spi-max-frequency = <100000000>; 446*4882a593Smuzhiyun }; 447*4882a593Smuzhiyun}; 448*4882a593Smuzhiyun 449*4882a593Smuzhiyun&lpc_ctrl { 450*4882a593Smuzhiyun status = "okay"; 451*4882a593Smuzhiyun memory-region = <&flash_memory>; 452*4882a593Smuzhiyun flash = <&spi1>; 453*4882a593Smuzhiyun}; 454*4882a593Smuzhiyun 455*4882a593Smuzhiyun&uart1 { 456*4882a593Smuzhiyun /* Rear RS-232 connector */ 457*4882a593Smuzhiyun status = "okay"; 458*4882a593Smuzhiyun 459*4882a593Smuzhiyun pinctrl-names = "default"; 460*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_txd1_default 461*4882a593Smuzhiyun &pinctrl_rxd1_default 462*4882a593Smuzhiyun &pinctrl_nrts1_default 463*4882a593Smuzhiyun &pinctrl_ndtr1_default 464*4882a593Smuzhiyun &pinctrl_ndsr1_default 465*4882a593Smuzhiyun &pinctrl_ncts1_default 466*4882a593Smuzhiyun &pinctrl_ndcd1_default 467*4882a593Smuzhiyun &pinctrl_nri1_default>; 468*4882a593Smuzhiyun}; 469*4882a593Smuzhiyun 470*4882a593Smuzhiyun&uart2 { 471*4882a593Smuzhiyun /* APSS */ 472*4882a593Smuzhiyun status = "okay"; 473*4882a593Smuzhiyun 474*4882a593Smuzhiyun pinctrl-names = "default"; 475*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>; 476*4882a593Smuzhiyun}; 477*4882a593Smuzhiyun 478*4882a593Smuzhiyun&uart5 { 479*4882a593Smuzhiyun status = "okay"; 480*4882a593Smuzhiyun}; 481*4882a593Smuzhiyun 482*4882a593Smuzhiyun&mac0 { 483*4882a593Smuzhiyun status = "okay"; 484*4882a593Smuzhiyun 485*4882a593Smuzhiyun pinctrl-names = "default"; 486*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_rmii1_default>; 487*4882a593Smuzhiyun clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>, 488*4882a593Smuzhiyun <&syscon ASPEED_CLK_MAC1RCLK>; 489*4882a593Smuzhiyun clock-names = "MACCLK", "RCLK"; 490*4882a593Smuzhiyun use-ncsi; 491*4882a593Smuzhiyun}; 492*4882a593Smuzhiyun 493*4882a593Smuzhiyun&mac1 { 494*4882a593Smuzhiyun status = "okay"; 495*4882a593Smuzhiyun 496*4882a593Smuzhiyun pinctrl-names = "default"; 497*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>; 498*4882a593Smuzhiyun}; 499*4882a593Smuzhiyun 500*4882a593Smuzhiyun&i2c0 { 501*4882a593Smuzhiyun status = "disabled"; 502*4882a593Smuzhiyun}; 503*4882a593Smuzhiyun 504*4882a593Smuzhiyun&i2c1 { 505*4882a593Smuzhiyun status = "disabled"; 506*4882a593Smuzhiyun}; 507*4882a593Smuzhiyun 508*4882a593Smuzhiyun&i2c2 { 509*4882a593Smuzhiyun status = "okay"; 510*4882a593Smuzhiyun 511*4882a593Smuzhiyun /* SAMTEC P0 */ 512*4882a593Smuzhiyun /* SAMTEC P1 */ 513*4882a593Smuzhiyun 514*4882a593Smuzhiyun}; 515*4882a593Smuzhiyun 516*4882a593Smuzhiyun&i2c3 { 517*4882a593Smuzhiyun status = "okay"; 518*4882a593Smuzhiyun 519*4882a593Smuzhiyun /* APSS */ 520*4882a593Smuzhiyun /* CPLD */ 521*4882a593Smuzhiyun 522*4882a593Smuzhiyun /* PCA9516 (repeater) -> 523*4882a593Smuzhiyun * CLK Buffer 9FGS9092 524*4882a593Smuzhiyun * CLK Buffer 9DBL0651BKILFT 525*4882a593Smuzhiyun * CLK Buffer 9DBL0651BKILFT 526*4882a593Smuzhiyun * Power Supply 0 527*4882a593Smuzhiyun * Power Supply 1 528*4882a593Smuzhiyun * PCA 9552 LED 529*4882a593Smuzhiyun */ 530*4882a593Smuzhiyun 531*4882a593Smuzhiyun power-supply@58 { 532*4882a593Smuzhiyun compatible = "ibm,cffps1"; 533*4882a593Smuzhiyun reg = <0x58>; 534*4882a593Smuzhiyun }; 535*4882a593Smuzhiyun 536*4882a593Smuzhiyun power-supply@5b { 537*4882a593Smuzhiyun compatible = "ibm,cffps1"; 538*4882a593Smuzhiyun reg = <0x5b>; 539*4882a593Smuzhiyun }; 540*4882a593Smuzhiyun 541*4882a593Smuzhiyun pca9552: pca9552@60 { 542*4882a593Smuzhiyun compatible = "nxp,pca9552"; 543*4882a593Smuzhiyun reg = <0x60>; 544*4882a593Smuzhiyun #address-cells = <1>; 545*4882a593Smuzhiyun #size-cells = <0>; 546*4882a593Smuzhiyun gpio-controller; 547*4882a593Smuzhiyun #gpio-cells = <2>; 548*4882a593Smuzhiyun 549*4882a593Smuzhiyun gpio@0 { 550*4882a593Smuzhiyun reg = <0>; 551*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 552*4882a593Smuzhiyun }; 553*4882a593Smuzhiyun gpio@1 { 554*4882a593Smuzhiyun reg = <1>; 555*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 556*4882a593Smuzhiyun }; 557*4882a593Smuzhiyun gpio@2 { 558*4882a593Smuzhiyun reg = <2>; 559*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 560*4882a593Smuzhiyun }; 561*4882a593Smuzhiyun gpio@3 { 562*4882a593Smuzhiyun reg = <3>; 563*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 564*4882a593Smuzhiyun }; 565*4882a593Smuzhiyun gpio@4 { 566*4882a593Smuzhiyun reg = <4>; 567*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 568*4882a593Smuzhiyun }; 569*4882a593Smuzhiyun gpio@5 { 570*4882a593Smuzhiyun reg = <5>; 571*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 572*4882a593Smuzhiyun }; 573*4882a593Smuzhiyun gpio@6 { 574*4882a593Smuzhiyun reg = <6>; 575*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 576*4882a593Smuzhiyun }; 577*4882a593Smuzhiyun gpio@7 { 578*4882a593Smuzhiyun reg = <7>; 579*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 580*4882a593Smuzhiyun }; 581*4882a593Smuzhiyun gpio@8 { 582*4882a593Smuzhiyun reg = <8>; 583*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 584*4882a593Smuzhiyun }; 585*4882a593Smuzhiyun gpio@9 { 586*4882a593Smuzhiyun reg = <9>; 587*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 588*4882a593Smuzhiyun }; 589*4882a593Smuzhiyun gpio@10 { 590*4882a593Smuzhiyun reg = <10>; 591*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 592*4882a593Smuzhiyun }; 593*4882a593Smuzhiyun gpio@11 { 594*4882a593Smuzhiyun reg = <11>; 595*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 596*4882a593Smuzhiyun }; 597*4882a593Smuzhiyun gpio@12 { 598*4882a593Smuzhiyun reg = <12>; 599*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 600*4882a593Smuzhiyun }; 601*4882a593Smuzhiyun gpio@13 { 602*4882a593Smuzhiyun reg = <13>; 603*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 604*4882a593Smuzhiyun }; 605*4882a593Smuzhiyun gpio@14 { 606*4882a593Smuzhiyun reg = <14>; 607*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 608*4882a593Smuzhiyun }; 609*4882a593Smuzhiyun gpio@15 { 610*4882a593Smuzhiyun reg = <15>; 611*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 612*4882a593Smuzhiyun }; 613*4882a593Smuzhiyun 614*4882a593Smuzhiyun }; 615*4882a593Smuzhiyun 616*4882a593Smuzhiyun}; 617*4882a593Smuzhiyun 618*4882a593Smuzhiyun&i2c4 { 619*4882a593Smuzhiyun status = "okay"; 620*4882a593Smuzhiyun 621*4882a593Smuzhiyun /* CP0 VDD & VCS : IR35221 */ 622*4882a593Smuzhiyun /* CP0 VDN : IR35221 */ 623*4882a593Smuzhiyun /* CP0 VIO : IR38064 */ 624*4882a593Smuzhiyun /* CP0 VDDR : PXM1330 */ 625*4882a593Smuzhiyun 626*4882a593Smuzhiyun ir35221@70 { 627*4882a593Smuzhiyun compatible = "infineon,ir35221"; 628*4882a593Smuzhiyun reg = <0x70>; 629*4882a593Smuzhiyun }; 630*4882a593Smuzhiyun 631*4882a593Smuzhiyun ir35221@72 { 632*4882a593Smuzhiyun compatible = "infineon,ir35221"; 633*4882a593Smuzhiyun reg = <0x72>; 634*4882a593Smuzhiyun }; 635*4882a593Smuzhiyun 636*4882a593Smuzhiyun}; 637*4882a593Smuzhiyun 638*4882a593Smuzhiyun&i2c5 { 639*4882a593Smuzhiyun status = "okay"; 640*4882a593Smuzhiyun 641*4882a593Smuzhiyun /* CP0 VDD & VCS : IR35221 */ 642*4882a593Smuzhiyun /* CP0 VDN : IR35221 */ 643*4882a593Smuzhiyun /* CP0 VIO : IR38064 */ 644*4882a593Smuzhiyun /* CP0 VDDR : PXM1330 */ 645*4882a593Smuzhiyun 646*4882a593Smuzhiyun ir35221@70 { 647*4882a593Smuzhiyun compatible = "infineon,ir35221"; 648*4882a593Smuzhiyun reg = <0x70>; 649*4882a593Smuzhiyun }; 650*4882a593Smuzhiyun 651*4882a593Smuzhiyun ir35221@72 { 652*4882a593Smuzhiyun compatible = "infineon,ir35221"; 653*4882a593Smuzhiyun reg = <0x72>; 654*4882a593Smuzhiyun }; 655*4882a593Smuzhiyun 656*4882a593Smuzhiyun}; 657*4882a593Smuzhiyun 658*4882a593Smuzhiyun&i2c6 { 659*4882a593Smuzhiyun status = "okay"; 660*4882a593Smuzhiyun 661*4882a593Smuzhiyun /* pca9548 -> NVMe1 to 8 */ 662*4882a593Smuzhiyun 663*4882a593Smuzhiyun pca9548@70 { 664*4882a593Smuzhiyun compatible = "nxp,pca9548"; 665*4882a593Smuzhiyun #address-cells = <1>; 666*4882a593Smuzhiyun #size-cells = <0>; 667*4882a593Smuzhiyun reg = <0x70>; 668*4882a593Smuzhiyun 669*4882a593Smuzhiyun bus7_mux223: i2c@0 { 670*4882a593Smuzhiyun #address-cells = <1>; 671*4882a593Smuzhiyun #size-cells = <0>; 672*4882a593Smuzhiyun reg = <0>; 673*4882a593Smuzhiyun }; 674*4882a593Smuzhiyun 675*4882a593Smuzhiyun bus7_mux224: i2c@1 { 676*4882a593Smuzhiyun #address-cells = <1>; 677*4882a593Smuzhiyun #size-cells = <0>; 678*4882a593Smuzhiyun reg = <1>; 679*4882a593Smuzhiyun }; 680*4882a593Smuzhiyun 681*4882a593Smuzhiyun bus7_mux225: i2c@2 { 682*4882a593Smuzhiyun #address-cells = <1>; 683*4882a593Smuzhiyun #size-cells = <0>; 684*4882a593Smuzhiyun reg = <2>; 685*4882a593Smuzhiyun }; 686*4882a593Smuzhiyun 687*4882a593Smuzhiyun bus7_mux226: i2c@3 { 688*4882a593Smuzhiyun #address-cells = <1>; 689*4882a593Smuzhiyun #size-cells = <0>; 690*4882a593Smuzhiyun reg = <3>; 691*4882a593Smuzhiyun }; 692*4882a593Smuzhiyun 693*4882a593Smuzhiyun bus7_mux227: i2c@4 { 694*4882a593Smuzhiyun #address-cells = <1>; 695*4882a593Smuzhiyun #size-cells = <0>; 696*4882a593Smuzhiyun reg = <4>; 697*4882a593Smuzhiyun }; 698*4882a593Smuzhiyun 699*4882a593Smuzhiyun bus7_mux228: i2c@5 { 700*4882a593Smuzhiyun #address-cells = <1>; 701*4882a593Smuzhiyun #size-cells = <0>; 702*4882a593Smuzhiyun reg = <5>; 703*4882a593Smuzhiyun }; 704*4882a593Smuzhiyun 705*4882a593Smuzhiyun bus7_mux229: i2c@6 { 706*4882a593Smuzhiyun #address-cells = <1>; 707*4882a593Smuzhiyun #size-cells = <0>; 708*4882a593Smuzhiyun reg = <6>; 709*4882a593Smuzhiyun }; 710*4882a593Smuzhiyun 711*4882a593Smuzhiyun bus7_mux230: i2c@7 { 712*4882a593Smuzhiyun #address-cells = <1>; 713*4882a593Smuzhiyun #size-cells = <0>; 714*4882a593Smuzhiyun reg = <7>; 715*4882a593Smuzhiyun }; 716*4882a593Smuzhiyun }; 717*4882a593Smuzhiyun 718*4882a593Smuzhiyun}; 719*4882a593Smuzhiyun 720*4882a593Smuzhiyun&i2c7 { 721*4882a593Smuzhiyun status = "okay"; 722*4882a593Smuzhiyun 723*4882a593Smuzhiyun /* pca9548 -> NVMe9 to 16 */ 724*4882a593Smuzhiyun 725*4882a593Smuzhiyun pca9548@70 { 726*4882a593Smuzhiyun compatible = "nxp,pca9548"; 727*4882a593Smuzhiyun #address-cells = <1>; 728*4882a593Smuzhiyun #size-cells = <0>; 729*4882a593Smuzhiyun reg = <0x70>; 730*4882a593Smuzhiyun 731*4882a593Smuzhiyun bus6_mux215: i2c@0 { 732*4882a593Smuzhiyun #address-cells = <1>; 733*4882a593Smuzhiyun #size-cells = <0>; 734*4882a593Smuzhiyun reg = <0>; 735*4882a593Smuzhiyun }; 736*4882a593Smuzhiyun 737*4882a593Smuzhiyun bus6_mux216: i2c@1 { 738*4882a593Smuzhiyun #address-cells = <1>; 739*4882a593Smuzhiyun #size-cells = <0>; 740*4882a593Smuzhiyun reg = <1>; 741*4882a593Smuzhiyun }; 742*4882a593Smuzhiyun 743*4882a593Smuzhiyun bus6_mux217: i2c@2 { 744*4882a593Smuzhiyun #address-cells = <1>; 745*4882a593Smuzhiyun #size-cells = <0>; 746*4882a593Smuzhiyun reg = <2>; 747*4882a593Smuzhiyun }; 748*4882a593Smuzhiyun 749*4882a593Smuzhiyun bus6_mux218: i2c@3 { 750*4882a593Smuzhiyun #address-cells = <1>; 751*4882a593Smuzhiyun #size-cells = <0>; 752*4882a593Smuzhiyun reg = <3>; 753*4882a593Smuzhiyun }; 754*4882a593Smuzhiyun 755*4882a593Smuzhiyun bus6_mux219: i2c@4 { 756*4882a593Smuzhiyun #address-cells = <1>; 757*4882a593Smuzhiyun #size-cells = <0>; 758*4882a593Smuzhiyun reg = <4>; 759*4882a593Smuzhiyun }; 760*4882a593Smuzhiyun 761*4882a593Smuzhiyun bus6_mux220: i2c@5 { 762*4882a593Smuzhiyun #address-cells = <1>; 763*4882a593Smuzhiyun #size-cells = <0>; 764*4882a593Smuzhiyun reg = <5>; 765*4882a593Smuzhiyun }; 766*4882a593Smuzhiyun 767*4882a593Smuzhiyun bus6_mux221: i2c@6 { 768*4882a593Smuzhiyun #address-cells = <1>; 769*4882a593Smuzhiyun #size-cells = <0>; 770*4882a593Smuzhiyun reg = <6>; 771*4882a593Smuzhiyun }; 772*4882a593Smuzhiyun 773*4882a593Smuzhiyun bus6_mux222: i2c@7 { 774*4882a593Smuzhiyun #address-cells = <1>; 775*4882a593Smuzhiyun #size-cells = <0>; 776*4882a593Smuzhiyun reg = <7>; 777*4882a593Smuzhiyun }; 778*4882a593Smuzhiyun }; 779*4882a593Smuzhiyun 780*4882a593Smuzhiyun}; 781*4882a593Smuzhiyun 782*4882a593Smuzhiyun&i2c8 { 783*4882a593Smuzhiyun status = "okay"; 784*4882a593Smuzhiyun 785*4882a593Smuzhiyun eeprom@50 { 786*4882a593Smuzhiyun compatible = "atmel,24c64"; 787*4882a593Smuzhiyun reg = <0x50>; 788*4882a593Smuzhiyun }; 789*4882a593Smuzhiyun}; 790*4882a593Smuzhiyun 791*4882a593Smuzhiyun&i2c9 { 792*4882a593Smuzhiyun status = "okay"; 793*4882a593Smuzhiyun 794*4882a593Smuzhiyun /* pca9545 Riser -> 795*4882a593Smuzhiyun * PCIe x8 Slot3 796*4882a593Smuzhiyun * PCIe x16 slot4 797*4882a593Smuzhiyun * PCIe x8 slot5 798*4882a593Smuzhiyun * I2C BMC RISER PCA9554 799*4882a593Smuzhiyun * BMC SCL/SDA PCA9554 800*4882a593Smuzhiyun * PCA9554 801*4882a593Smuzhiyun */ 802*4882a593Smuzhiyun 803*4882a593Smuzhiyun /* pca9545 -> 804*4882a593Smuzhiyun * PCIe x16 Slot1 805*4882a593Smuzhiyun * PCIe x8 slot2 806*4882a593Smuzhiyun * PEX8748 807*4882a593Smuzhiyun */ 808*4882a593Smuzhiyun 809*4882a593Smuzhiyun pca9545riser@70 { 810*4882a593Smuzhiyun compatible = "nxp,pca9545"; 811*4882a593Smuzhiyun #address-cells = <1>; 812*4882a593Smuzhiyun #size-cells = <0>; 813*4882a593Smuzhiyun reg = <0x70>; 814*4882a593Smuzhiyun 815*4882a593Smuzhiyun i2c-mux-idle-disconnect; 816*4882a593Smuzhiyun interrupt-controller; 817*4882a593Smuzhiyun #interrupt-cells = <2>; 818*4882a593Smuzhiyun 819*4882a593Smuzhiyun bus9_mux231: i2c@0 { 820*4882a593Smuzhiyun #address-cells = <1>; 821*4882a593Smuzhiyun #size-cells = <0>; 822*4882a593Smuzhiyun reg = <0>; 823*4882a593Smuzhiyun 824*4882a593Smuzhiyun tca9554@39 { 825*4882a593Smuzhiyun compatible = "ti,tca9554"; 826*4882a593Smuzhiyun reg = <0x39>; 827*4882a593Smuzhiyun gpio-controller; 828*4882a593Smuzhiyun #gpio-cells = <2>; 829*4882a593Smuzhiyun 830*4882a593Smuzhiyun smbus0 { 831*4882a593Smuzhiyun gpio-hog; 832*4882a593Smuzhiyun gpios = <4 GPIO_ACTIVE_HIGH>; 833*4882a593Smuzhiyun output-high; 834*4882a593Smuzhiyun line-name = "smbus0"; 835*4882a593Smuzhiyun }; 836*4882a593Smuzhiyun }; 837*4882a593Smuzhiyun 838*4882a593Smuzhiyun tmp431@4c { 839*4882a593Smuzhiyun compatible = "ti,tmp401"; 840*4882a593Smuzhiyun reg = <0x4c>; 841*4882a593Smuzhiyun }; 842*4882a593Smuzhiyun }; 843*4882a593Smuzhiyun 844*4882a593Smuzhiyun bus9_mux232: i2c@1 { 845*4882a593Smuzhiyun #address-cells = <1>; 846*4882a593Smuzhiyun #size-cells = <0>; 847*4882a593Smuzhiyun reg = <1>; 848*4882a593Smuzhiyun 849*4882a593Smuzhiyun tca9554@39 { 850*4882a593Smuzhiyun compatible = "ti,tca9554"; 851*4882a593Smuzhiyun reg = <0x39>; 852*4882a593Smuzhiyun gpio-controller; 853*4882a593Smuzhiyun #gpio-cells = <2>; 854*4882a593Smuzhiyun 855*4882a593Smuzhiyun smbus1 { 856*4882a593Smuzhiyun gpio-hog; 857*4882a593Smuzhiyun gpios = <4 GPIO_ACTIVE_HIGH>; 858*4882a593Smuzhiyun output-high; 859*4882a593Smuzhiyun line-name = "smbus1"; 860*4882a593Smuzhiyun }; 861*4882a593Smuzhiyun }; 862*4882a593Smuzhiyun 863*4882a593Smuzhiyun tmp431@4c { 864*4882a593Smuzhiyun compatible = "ti,tmp401"; 865*4882a593Smuzhiyun reg = <0x4c>; 866*4882a593Smuzhiyun }; 867*4882a593Smuzhiyun }; 868*4882a593Smuzhiyun 869*4882a593Smuzhiyun bus9_mux233: i2c@2 { 870*4882a593Smuzhiyun #address-cells = <1>; 871*4882a593Smuzhiyun #size-cells = <0>; 872*4882a593Smuzhiyun reg = <2>; 873*4882a593Smuzhiyun }; 874*4882a593Smuzhiyun 875*4882a593Smuzhiyun bus9_mux234: i2c@3 { 876*4882a593Smuzhiyun #address-cells = <1>; 877*4882a593Smuzhiyun #size-cells = <0>; 878*4882a593Smuzhiyun reg = <3>; 879*4882a593Smuzhiyun }; 880*4882a593Smuzhiyun }; 881*4882a593Smuzhiyun 882*4882a593Smuzhiyun pca9545@71 { 883*4882a593Smuzhiyun compatible = "nxp,pca9545"; 884*4882a593Smuzhiyun #address-cells = <1>; 885*4882a593Smuzhiyun #size-cells = <0>; 886*4882a593Smuzhiyun reg = <0x71>; 887*4882a593Smuzhiyun 888*4882a593Smuzhiyun i2c-mux-idle-disconnect; 889*4882a593Smuzhiyun interrupt-controller; 890*4882a593Smuzhiyun #interrupt-cells = <2>; 891*4882a593Smuzhiyun 892*4882a593Smuzhiyun bus9_mux235: i2c@0 { 893*4882a593Smuzhiyun #address-cells = <1>; 894*4882a593Smuzhiyun #size-cells = <0>; 895*4882a593Smuzhiyun reg = <0>; 896*4882a593Smuzhiyun 897*4882a593Smuzhiyun tca9554@39 { 898*4882a593Smuzhiyun compatible = "ti,tca9554"; 899*4882a593Smuzhiyun reg = <0x39>; 900*4882a593Smuzhiyun gpio-controller; 901*4882a593Smuzhiyun #gpio-cells = <2>; 902*4882a593Smuzhiyun 903*4882a593Smuzhiyun smbus2 { 904*4882a593Smuzhiyun gpio-hog; 905*4882a593Smuzhiyun gpios = <4 GPIO_ACTIVE_HIGH>; 906*4882a593Smuzhiyun output-high; 907*4882a593Smuzhiyun line-name = "smbus2"; 908*4882a593Smuzhiyun }; 909*4882a593Smuzhiyun }; 910*4882a593Smuzhiyun 911*4882a593Smuzhiyun tmp431@4c { 912*4882a593Smuzhiyun compatible = "ti,tmp401"; 913*4882a593Smuzhiyun reg = <0x4c>; 914*4882a593Smuzhiyun }; 915*4882a593Smuzhiyun }; 916*4882a593Smuzhiyun 917*4882a593Smuzhiyun bus9_mux236: i2c@1 { 918*4882a593Smuzhiyun #address-cells = <1>; 919*4882a593Smuzhiyun #size-cells = <0>; 920*4882a593Smuzhiyun reg = <1>; 921*4882a593Smuzhiyun 922*4882a593Smuzhiyun tca9554@39 { 923*4882a593Smuzhiyun compatible = "ti,tca9554"; 924*4882a593Smuzhiyun reg = <0x39>; 925*4882a593Smuzhiyun gpio-controller; 926*4882a593Smuzhiyun #gpio-cells = <2>; 927*4882a593Smuzhiyun 928*4882a593Smuzhiyun smbus3 { 929*4882a593Smuzhiyun gpio-hog; 930*4882a593Smuzhiyun gpios = <4 GPIO_ACTIVE_HIGH>; 931*4882a593Smuzhiyun output-high; 932*4882a593Smuzhiyun line-name = "smbus3"; 933*4882a593Smuzhiyun }; 934*4882a593Smuzhiyun }; 935*4882a593Smuzhiyun 936*4882a593Smuzhiyun tmp431@4c { 937*4882a593Smuzhiyun compatible = "ti,tmp401"; 938*4882a593Smuzhiyun reg = <0x4c>; 939*4882a593Smuzhiyun }; 940*4882a593Smuzhiyun }; 941*4882a593Smuzhiyun 942*4882a593Smuzhiyun bus9_mux237: i2c@2 { 943*4882a593Smuzhiyun #address-cells = <1>; 944*4882a593Smuzhiyun #size-cells = <0>; 945*4882a593Smuzhiyun reg = <2>; 946*4882a593Smuzhiyun }; 947*4882a593Smuzhiyun 948*4882a593Smuzhiyun bus9_mux238: i2c@3 { 949*4882a593Smuzhiyun #address-cells = <1>; 950*4882a593Smuzhiyun #size-cells = <0>; 951*4882a593Smuzhiyun reg = <3>; 952*4882a593Smuzhiyun }; 953*4882a593Smuzhiyun }; 954*4882a593Smuzhiyun}; 955*4882a593Smuzhiyun 956*4882a593Smuzhiyun&i2c10 { 957*4882a593Smuzhiyun status = "okay"; 958*4882a593Smuzhiyun 959*4882a593Smuzhiyun /* pca9545 Riser -> 960*4882a593Smuzhiyun * PCIe x8 Slot8 961*4882a593Smuzhiyun * PCIe x16 slot9 962*4882a593Smuzhiyun * PCIe x8 slot10 963*4882a593Smuzhiyun * I2C BMC RISER PCA9554 964*4882a593Smuzhiyun * BMC SCL/SDA PCA9554 965*4882a593Smuzhiyun * PCA9554 966*4882a593Smuzhiyun */ 967*4882a593Smuzhiyun 968*4882a593Smuzhiyun /* pca9545 -> 969*4882a593Smuzhiyun * PCIe x16 Slot1 970*4882a593Smuzhiyun * PCIe x8 slot2 971*4882a593Smuzhiyun * PEX8748 972*4882a593Smuzhiyun */ 973*4882a593Smuzhiyun 974*4882a593Smuzhiyun pca9545riser@70 { 975*4882a593Smuzhiyun compatible = "nxp,pca9545"; 976*4882a593Smuzhiyun #address-cells = <1>; 977*4882a593Smuzhiyun #size-cells = <0>; 978*4882a593Smuzhiyun reg = <0x70>; 979*4882a593Smuzhiyun 980*4882a593Smuzhiyun i2c-mux-idle-disconnect; 981*4882a593Smuzhiyun interrupt-controller; 982*4882a593Smuzhiyun #interrupt-cells = <2>; 983*4882a593Smuzhiyun 984*4882a593Smuzhiyun bus10_mux239: i2c@0 { 985*4882a593Smuzhiyun #address-cells = <1>; 986*4882a593Smuzhiyun #size-cells = <0>; 987*4882a593Smuzhiyun reg = <0>; 988*4882a593Smuzhiyun 989*4882a593Smuzhiyun tca9554@39 { 990*4882a593Smuzhiyun compatible = "ti,tca9554"; 991*4882a593Smuzhiyun reg = <0x39>; 992*4882a593Smuzhiyun gpio-controller; 993*4882a593Smuzhiyun #gpio-cells = <2>; 994*4882a593Smuzhiyun 995*4882a593Smuzhiyun smbus4 { 996*4882a593Smuzhiyun gpio-hog; 997*4882a593Smuzhiyun gpios = <4 GPIO_ACTIVE_HIGH>; 998*4882a593Smuzhiyun output-high; 999*4882a593Smuzhiyun line-name = "smbus4"; 1000*4882a593Smuzhiyun }; 1001*4882a593Smuzhiyun }; 1002*4882a593Smuzhiyun 1003*4882a593Smuzhiyun tmp431@4c { 1004*4882a593Smuzhiyun compatible = "ti,tmp401"; 1005*4882a593Smuzhiyun reg = <0x4c>; 1006*4882a593Smuzhiyun }; 1007*4882a593Smuzhiyun }; 1008*4882a593Smuzhiyun 1009*4882a593Smuzhiyun bus10_mux240: i2c@1 { 1010*4882a593Smuzhiyun #address-cells = <1>; 1011*4882a593Smuzhiyun #size-cells = <0>; 1012*4882a593Smuzhiyun reg = <1>; 1013*4882a593Smuzhiyun 1014*4882a593Smuzhiyun tca9554@39 { 1015*4882a593Smuzhiyun compatible = "ti,tca9554"; 1016*4882a593Smuzhiyun reg = <0x39>; 1017*4882a593Smuzhiyun gpio-controller; 1018*4882a593Smuzhiyun #gpio-cells = <2>; 1019*4882a593Smuzhiyun 1020*4882a593Smuzhiyun smbus5 { 1021*4882a593Smuzhiyun gpio-hog; 1022*4882a593Smuzhiyun gpios = <4 GPIO_ACTIVE_HIGH>; 1023*4882a593Smuzhiyun output-high; 1024*4882a593Smuzhiyun line-name = "smbus5"; 1025*4882a593Smuzhiyun }; 1026*4882a593Smuzhiyun }; 1027*4882a593Smuzhiyun 1028*4882a593Smuzhiyun tmp431@4c { 1029*4882a593Smuzhiyun compatible = "ti,tmp401"; 1030*4882a593Smuzhiyun reg = <0x4c>; 1031*4882a593Smuzhiyun }; 1032*4882a593Smuzhiyun }; 1033*4882a593Smuzhiyun 1034*4882a593Smuzhiyun bus10_mux241: i2c@2 { 1035*4882a593Smuzhiyun #address-cells = <1>; 1036*4882a593Smuzhiyun #size-cells = <0>; 1037*4882a593Smuzhiyun reg = <2>; 1038*4882a593Smuzhiyun }; 1039*4882a593Smuzhiyun 1040*4882a593Smuzhiyun bus10_mux242: i2c@3 { 1041*4882a593Smuzhiyun #address-cells = <1>; 1042*4882a593Smuzhiyun #size-cells = <0>; 1043*4882a593Smuzhiyun reg = <3>; 1044*4882a593Smuzhiyun }; 1045*4882a593Smuzhiyun }; 1046*4882a593Smuzhiyun 1047*4882a593Smuzhiyun pca9545@71 { 1048*4882a593Smuzhiyun compatible = "nxp,pca9545"; 1049*4882a593Smuzhiyun #address-cells = <1>; 1050*4882a593Smuzhiyun #size-cells = <0>; 1051*4882a593Smuzhiyun reg = <0x71>; 1052*4882a593Smuzhiyun 1053*4882a593Smuzhiyun i2c-mux-idle-disconnect; 1054*4882a593Smuzhiyun interrupt-controller; 1055*4882a593Smuzhiyun #interrupt-cells = <2>; 1056*4882a593Smuzhiyun 1057*4882a593Smuzhiyun bus10_mux243: i2c@0 { 1058*4882a593Smuzhiyun #address-cells = <1>; 1059*4882a593Smuzhiyun #size-cells = <0>; 1060*4882a593Smuzhiyun reg = <0>; 1061*4882a593Smuzhiyun 1062*4882a593Smuzhiyun tca9554@39 { 1063*4882a593Smuzhiyun compatible = "ti,tca9554"; 1064*4882a593Smuzhiyun reg = <0x39>; 1065*4882a593Smuzhiyun gpio-controller; 1066*4882a593Smuzhiyun #gpio-cells = <2>; 1067*4882a593Smuzhiyun 1068*4882a593Smuzhiyun smbus6 { 1069*4882a593Smuzhiyun gpio-hog; 1070*4882a593Smuzhiyun gpios = <4 GPIO_ACTIVE_HIGH>; 1071*4882a593Smuzhiyun output-high; 1072*4882a593Smuzhiyun line-name = "smbus6"; 1073*4882a593Smuzhiyun }; 1074*4882a593Smuzhiyun }; 1075*4882a593Smuzhiyun 1076*4882a593Smuzhiyun tmp431@4c { 1077*4882a593Smuzhiyun compatible = "ti,tmp401"; 1078*4882a593Smuzhiyun reg = <0x4c>; 1079*4882a593Smuzhiyun }; 1080*4882a593Smuzhiyun }; 1081*4882a593Smuzhiyun 1082*4882a593Smuzhiyun bus10_mux244: i2c@1 { 1083*4882a593Smuzhiyun #address-cells = <1>; 1084*4882a593Smuzhiyun #size-cells = <0>; 1085*4882a593Smuzhiyun reg = <1>; 1086*4882a593Smuzhiyun 1087*4882a593Smuzhiyun tca9554@39 { 1088*4882a593Smuzhiyun compatible = "ti,tca9554"; 1089*4882a593Smuzhiyun reg = <0x39>; 1090*4882a593Smuzhiyun gpio-controller; 1091*4882a593Smuzhiyun #gpio-cells = <2>; 1092*4882a593Smuzhiyun 1093*4882a593Smuzhiyun smbus7 { 1094*4882a593Smuzhiyun gpio-hog; 1095*4882a593Smuzhiyun gpios = <4 GPIO_ACTIVE_HIGH>; 1096*4882a593Smuzhiyun output-high; 1097*4882a593Smuzhiyun line-name = "smbus7"; 1098*4882a593Smuzhiyun }; 1099*4882a593Smuzhiyun }; 1100*4882a593Smuzhiyun 1101*4882a593Smuzhiyun tmp431@4c { 1102*4882a593Smuzhiyun compatible = "ti,tmp401"; 1103*4882a593Smuzhiyun reg = <0x4c>; 1104*4882a593Smuzhiyun }; 1105*4882a593Smuzhiyun }; 1106*4882a593Smuzhiyun 1107*4882a593Smuzhiyun bus10_mux245: i2c@2 { 1108*4882a593Smuzhiyun #address-cells = <1>; 1109*4882a593Smuzhiyun #size-cells = <0>; 1110*4882a593Smuzhiyun reg = <2>; 1111*4882a593Smuzhiyun }; 1112*4882a593Smuzhiyun 1113*4882a593Smuzhiyun bus10_mux246: i2c@3 { 1114*4882a593Smuzhiyun #address-cells = <1>; 1115*4882a593Smuzhiyun #size-cells = <0>; 1116*4882a593Smuzhiyun reg = <3>; 1117*4882a593Smuzhiyun }; 1118*4882a593Smuzhiyun }; 1119*4882a593Smuzhiyun}; 1120*4882a593Smuzhiyun 1121*4882a593Smuzhiyun&i2c11 { 1122*4882a593Smuzhiyun status = "okay"; 1123*4882a593Smuzhiyun 1124*4882a593Smuzhiyun /* TPM */ 1125*4882a593Smuzhiyun /* RTC RX8900CE */ 1126*4882a593Smuzhiyun /* FPGA for power sequence */ 1127*4882a593Smuzhiyun /* TMP275A */ 1128*4882a593Smuzhiyun /* TMP275A */ 1129*4882a593Smuzhiyun /* EMC1462 */ 1130*4882a593Smuzhiyun 1131*4882a593Smuzhiyun tpm@57 { 1132*4882a593Smuzhiyun compatible = "infineon,slb9645tt"; 1133*4882a593Smuzhiyun reg = <0x57>; 1134*4882a593Smuzhiyun }; 1135*4882a593Smuzhiyun 1136*4882a593Smuzhiyun rtc@32 { 1137*4882a593Smuzhiyun compatible = "epson,rx8900"; 1138*4882a593Smuzhiyun reg = <0x32>; 1139*4882a593Smuzhiyun }; 1140*4882a593Smuzhiyun 1141*4882a593Smuzhiyun tmp275@48 { 1142*4882a593Smuzhiyun compatible = "ti,tmp275"; 1143*4882a593Smuzhiyun reg = <0x48>; 1144*4882a593Smuzhiyun }; 1145*4882a593Smuzhiyun 1146*4882a593Smuzhiyun tmp275@49 { 1147*4882a593Smuzhiyun compatible = "ti,tmp275"; 1148*4882a593Smuzhiyun reg = <0x49>; 1149*4882a593Smuzhiyun }; 1150*4882a593Smuzhiyun 1151*4882a593Smuzhiyun /* chip emc1462 use emc1403 driver */ 1152*4882a593Smuzhiyun emc1403@4c { 1153*4882a593Smuzhiyun compatible = "smsc,emc1403"; 1154*4882a593Smuzhiyun reg = <0x4c>; 1155*4882a593Smuzhiyun }; 1156*4882a593Smuzhiyun 1157*4882a593Smuzhiyun}; 1158*4882a593Smuzhiyun 1159*4882a593Smuzhiyun&i2c12 { 1160*4882a593Smuzhiyun status = "okay"; 1161*4882a593Smuzhiyun 1162*4882a593Smuzhiyun /* pca9545 -> 1163*4882a593Smuzhiyun * SAS BP1 1164*4882a593Smuzhiyun * SAS BP2 1165*4882a593Smuzhiyun * NVMe BP 1166*4882a593Smuzhiyun * M.2 riser 1167*4882a593Smuzhiyun */ 1168*4882a593Smuzhiyun 1169*4882a593Smuzhiyun pca9545@70 { 1170*4882a593Smuzhiyun compatible = "nxp,pca9545"; 1171*4882a593Smuzhiyun #address-cells = <1>; 1172*4882a593Smuzhiyun #size-cells = <0>; 1173*4882a593Smuzhiyun reg = <0x70>; 1174*4882a593Smuzhiyun 1175*4882a593Smuzhiyun interrupt-controller; 1176*4882a593Smuzhiyun #interrupt-cells = <2>; 1177*4882a593Smuzhiyun 1178*4882a593Smuzhiyun bus12_mux247: i2c@0 { 1179*4882a593Smuzhiyun #address-cells = <1>; 1180*4882a593Smuzhiyun #size-cells = <0>; 1181*4882a593Smuzhiyun reg = <0>; 1182*4882a593Smuzhiyun 1183*4882a593Smuzhiyun eeprom@50 { 1184*4882a593Smuzhiyun compatible = "atmel,24c64"; 1185*4882a593Smuzhiyun reg = <0x50>; 1186*4882a593Smuzhiyun }; 1187*4882a593Smuzhiyun }; 1188*4882a593Smuzhiyun 1189*4882a593Smuzhiyun bus12_mux248: i2c@1 { 1190*4882a593Smuzhiyun #address-cells = <1>; 1191*4882a593Smuzhiyun #size-cells = <0>; 1192*4882a593Smuzhiyun reg = <1>; 1193*4882a593Smuzhiyun 1194*4882a593Smuzhiyun eeprom@50 { 1195*4882a593Smuzhiyun compatible = "atmel,24c64"; 1196*4882a593Smuzhiyun reg = <0x50>; 1197*4882a593Smuzhiyun }; 1198*4882a593Smuzhiyun }; 1199*4882a593Smuzhiyun 1200*4882a593Smuzhiyun bus12_mux249: i2c@2 { 1201*4882a593Smuzhiyun #address-cells = <1>; 1202*4882a593Smuzhiyun #size-cells = <0>; 1203*4882a593Smuzhiyun reg = <2>; 1204*4882a593Smuzhiyun 1205*4882a593Smuzhiyun eeprom@50 { 1206*4882a593Smuzhiyun compatible = "atmel,24c64"; 1207*4882a593Smuzhiyun reg = <0x50>; 1208*4882a593Smuzhiyun }; 1209*4882a593Smuzhiyun }; 1210*4882a593Smuzhiyun 1211*4882a593Smuzhiyun bus12_mux250: i2c@3 { 1212*4882a593Smuzhiyun #address-cells = <1>; 1213*4882a593Smuzhiyun #size-cells = <0>; 1214*4882a593Smuzhiyun reg = <3>; 1215*4882a593Smuzhiyun 1216*4882a593Smuzhiyun tmp275@48 { 1217*4882a593Smuzhiyun compatible = "ti,tmp275"; 1218*4882a593Smuzhiyun reg = <0x48>; 1219*4882a593Smuzhiyun }; 1220*4882a593Smuzhiyun }; 1221*4882a593Smuzhiyun 1222*4882a593Smuzhiyun }; 1223*4882a593Smuzhiyun 1224*4882a593Smuzhiyun}; 1225*4882a593Smuzhiyun 1226*4882a593Smuzhiyun&i2c13 { 1227*4882a593Smuzhiyun status = "okay"; 1228*4882a593Smuzhiyun 1229*4882a593Smuzhiyun /* pca9548 -> 1230*4882a593Smuzhiyun * NVMe BP 1231*4882a593Smuzhiyun * NVMe HDD17 to 24 1232*4882a593Smuzhiyun */ 1233*4882a593Smuzhiyun 1234*4882a593Smuzhiyun pca9548@70 { 1235*4882a593Smuzhiyun compatible = "nxp,pca9548"; 1236*4882a593Smuzhiyun #address-cells = <1>; 1237*4882a593Smuzhiyun #size-cells = <0>; 1238*4882a593Smuzhiyun reg = <0x70>; 1239*4882a593Smuzhiyun bus13_mux251: i2c@0 { 1240*4882a593Smuzhiyun #address-cells = <1>; 1241*4882a593Smuzhiyun #size-cells = <0>; 1242*4882a593Smuzhiyun reg = <0>; 1243*4882a593Smuzhiyun }; 1244*4882a593Smuzhiyun 1245*4882a593Smuzhiyun bus13_mux252: i2c@1 { 1246*4882a593Smuzhiyun #address-cells = <1>; 1247*4882a593Smuzhiyun #size-cells = <0>; 1248*4882a593Smuzhiyun reg = <1>; 1249*4882a593Smuzhiyun }; 1250*4882a593Smuzhiyun 1251*4882a593Smuzhiyun bus13_mux253: i2c@2 { 1252*4882a593Smuzhiyun #address-cells = <1>; 1253*4882a593Smuzhiyun #size-cells = <0>; 1254*4882a593Smuzhiyun reg = <2>; 1255*4882a593Smuzhiyun }; 1256*4882a593Smuzhiyun 1257*4882a593Smuzhiyun bus13_mux254: i2c@3 { 1258*4882a593Smuzhiyun #address-cells = <1>; 1259*4882a593Smuzhiyun #size-cells = <0>; 1260*4882a593Smuzhiyun reg = <3>; 1261*4882a593Smuzhiyun }; 1262*4882a593Smuzhiyun 1263*4882a593Smuzhiyun bus13_mux255: i2c@4 { 1264*4882a593Smuzhiyun #address-cells = <1>; 1265*4882a593Smuzhiyun #size-cells = <0>; 1266*4882a593Smuzhiyun reg = <4>; 1267*4882a593Smuzhiyun }; 1268*4882a593Smuzhiyun 1269*4882a593Smuzhiyun bus13_mux256: i2c@5 { 1270*4882a593Smuzhiyun #address-cells = <1>; 1271*4882a593Smuzhiyun #size-cells = <0>; 1272*4882a593Smuzhiyun reg = <5>; 1273*4882a593Smuzhiyun }; 1274*4882a593Smuzhiyun 1275*4882a593Smuzhiyun bus13_mux257: i2c@6 { 1276*4882a593Smuzhiyun #address-cells = <1>; 1277*4882a593Smuzhiyun #size-cells = <0>; 1278*4882a593Smuzhiyun reg = <6>; 1279*4882a593Smuzhiyun }; 1280*4882a593Smuzhiyun 1281*4882a593Smuzhiyun bus13_mux258: i2c@7 { 1282*4882a593Smuzhiyun #address-cells = <1>; 1283*4882a593Smuzhiyun #size-cells = <0>; 1284*4882a593Smuzhiyun reg = <7>; 1285*4882a593Smuzhiyun }; 1286*4882a593Smuzhiyun }; 1287*4882a593Smuzhiyun}; 1288*4882a593Smuzhiyun 1289*4882a593Smuzhiyun&vuart { 1290*4882a593Smuzhiyun status = "okay"; 1291*4882a593Smuzhiyun}; 1292*4882a593Smuzhiyun 1293*4882a593Smuzhiyun&gfx { 1294*4882a593Smuzhiyun status = "okay"; 1295*4882a593Smuzhiyun memory-region = <&gfx_memory>; 1296*4882a593Smuzhiyun}; 1297*4882a593Smuzhiyun 1298*4882a593Smuzhiyun&adc { 1299*4882a593Smuzhiyun status = "okay"; 1300*4882a593Smuzhiyun pinctrl-names = "default"; 1301*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_adc0_default 1302*4882a593Smuzhiyun &pinctrl_adc1_default 1303*4882a593Smuzhiyun &pinctrl_adc2_default 1304*4882a593Smuzhiyun &pinctrl_adc3_default 1305*4882a593Smuzhiyun &pinctrl_adc4_default 1306*4882a593Smuzhiyun &pinctrl_adc5_default 1307*4882a593Smuzhiyun &pinctrl_adc6_default 1308*4882a593Smuzhiyun &pinctrl_adc7_default 1309*4882a593Smuzhiyun &pinctrl_adc8_default 1310*4882a593Smuzhiyun &pinctrl_adc9_default 1311*4882a593Smuzhiyun &pinctrl_adc10_default 1312*4882a593Smuzhiyun &pinctrl_adc11_default 1313*4882a593Smuzhiyun &pinctrl_adc12_default 1314*4882a593Smuzhiyun &pinctrl_adc13_default 1315*4882a593Smuzhiyun &pinctrl_adc14_default 1316*4882a593Smuzhiyun &pinctrl_adc15_default>; 1317*4882a593Smuzhiyun}; 1318*4882a593Smuzhiyun 1319*4882a593Smuzhiyun&wdt1 { 1320*4882a593Smuzhiyun aspeed,reset-type = "none"; 1321*4882a593Smuzhiyun aspeed,external-signal; 1322*4882a593Smuzhiyun aspeed,ext-push-pull; 1323*4882a593Smuzhiyun aspeed,ext-active-high; 1324*4882a593Smuzhiyun 1325*4882a593Smuzhiyun pinctrl-names = "default"; 1326*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_wdtrst1_default>; 1327*4882a593Smuzhiyun}; 1328*4882a593Smuzhiyun 1329*4882a593Smuzhiyun&wdt2 { 1330*4882a593Smuzhiyun aspeed,alt-boot; 1331*4882a593Smuzhiyun}; 1332*4882a593Smuzhiyun 1333*4882a593Smuzhiyun&ibt { 1334*4882a593Smuzhiyun status = "okay"; 1335*4882a593Smuzhiyun}; 1336*4882a593Smuzhiyun 1337*4882a593Smuzhiyun&vhub { 1338*4882a593Smuzhiyun status = "okay"; 1339*4882a593Smuzhiyun}; 1340*4882a593Smuzhiyun 1341*4882a593Smuzhiyun&video { 1342*4882a593Smuzhiyun status = "okay"; 1343*4882a593Smuzhiyun memory-region = <&video_engine_memory>; 1344*4882a593Smuzhiyun}; 1345*4882a593Smuzhiyun 1346*4882a593Smuzhiyun#include "ibm-power9-dual.dtsi" 1347*4882a593Smuzhiyun 1348