xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/aspeed-bmc-microsoft-olympus.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun//SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun
3*4882a593Smuzhiyun/dts-v1/;
4*4882a593Smuzhiyun
5*4882a593Smuzhiyun#include "aspeed-g4.dtsi"
6*4882a593Smuzhiyun#include <dt-bindings/gpio/aspeed-gpio.h>
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun/ {
9*4882a593Smuzhiyun	model = "Olympus BMC";
10*4882a593Smuzhiyun	compatible = "microsoft,olympus-bmc", "aspeed,ast2400";
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun	chosen {
13*4882a593Smuzhiyun		stdout-path = &uart5;
14*4882a593Smuzhiyun		bootargs = "console=ttyS4,115200 earlyprintk";
15*4882a593Smuzhiyun	};
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun	memory@40000000 {
18*4882a593Smuzhiyun		reg = <0x40000000 0x20000000>;
19*4882a593Smuzhiyun	};
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun	reserved-memory {
22*4882a593Smuzhiyun		#address-cells = <1>;
23*4882a593Smuzhiyun		#size-cells = <1>;
24*4882a593Smuzhiyun		ranges;
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun		vga_memory: framebuffer@5f000000 {
27*4882a593Smuzhiyun			no-map;
28*4882a593Smuzhiyun			reg = <0x5f000000 0x01000000>; /* 16M */
29*4882a593Smuzhiyun		};
30*4882a593Smuzhiyun	};
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun	leds {
33*4882a593Smuzhiyun		compatible = "gpio-leds";
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun		bmc_heartbeat {
36*4882a593Smuzhiyun			gpios = <&gpio ASPEED_GPIO(B, 0) GPIO_ACTIVE_LOW>;
37*4882a593Smuzhiyun		};
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun		power_green {
40*4882a593Smuzhiyun			gpios = <&gpio ASPEED_GPIO(U, 2) GPIO_ACTIVE_HIGH>;
41*4882a593Smuzhiyun		};
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun		power_amber {
44*4882a593Smuzhiyun			gpios = <&gpio ASPEED_GPIO(U, 3) GPIO_ACTIVE_HIGH>;
45*4882a593Smuzhiyun		};
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun		identify {
48*4882a593Smuzhiyun			gpios = <&gpio ASPEED_GPIO(Q, 5) GPIO_ACTIVE_LOW>;
49*4882a593Smuzhiyun		};
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun		fault {
52*4882a593Smuzhiyun			gpios = <&gpio ASPEED_GPIO(A, 1) GPIO_ACTIVE_LOW>;
53*4882a593Smuzhiyun		};
54*4882a593Smuzhiyun	};
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun	iio-hwmon {
58*4882a593Smuzhiyun		compatible = "iio-hwmon";
59*4882a593Smuzhiyun		io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
60*4882a593Smuzhiyun		<&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>;
61*4882a593Smuzhiyun	};
62*4882a593Smuzhiyun};
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun&adc {
65*4882a593Smuzhiyun	status = "okay";
66*4882a593Smuzhiyun	pinctrl-names = "default";
67*4882a593Smuzhiyun	pinctrl-0 =    <&pinctrl_adc0_default
68*4882a593Smuzhiyun			&pinctrl_adc1_default
69*4882a593Smuzhiyun			&pinctrl_adc2_default
70*4882a593Smuzhiyun			&pinctrl_adc3_default
71*4882a593Smuzhiyun			&pinctrl_adc4_default
72*4882a593Smuzhiyun			&pinctrl_adc5_default
73*4882a593Smuzhiyun			&pinctrl_adc6_default
74*4882a593Smuzhiyun			&pinctrl_adc7_default>;
75*4882a593Smuzhiyun};
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun&fmc {
78*4882a593Smuzhiyun	status = "okay";
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun	flash@0 {
81*4882a593Smuzhiyun		status = "okay";
82*4882a593Smuzhiyun		m25p,fast-read;
83*4882a593Smuzhiyun		label = "bmc";
84*4882a593Smuzhiyun#include "openbmc-flash-layout.dtsi"
85*4882a593Smuzhiyun	};
86*4882a593Smuzhiyun};
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun&spi {
89*4882a593Smuzhiyun	status = "okay";
90*4882a593Smuzhiyun	pinctrl-names = "default";
91*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_spi1_default>;
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun	flash@0 {
94*4882a593Smuzhiyun		status = "okay";
95*4882a593Smuzhiyun		m25p,fast-read;
96*4882a593Smuzhiyun		label = "pnor";
97*4882a593Smuzhiyun	};
98*4882a593Smuzhiyun};
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun&uart5 {
101*4882a593Smuzhiyun	status = "okay";
102*4882a593Smuzhiyun};
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun&mac0 {
105*4882a593Smuzhiyun	status = "okay";
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun	pinctrl-names = "default";
108*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_rgmii1_default &pinctrl_mdio1_default>;
109*4882a593Smuzhiyun};
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun&i2c0 {
112*4882a593Smuzhiyun	status = "okay";
113*4882a593Smuzhiyun};
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun&i2c1 {
116*4882a593Smuzhiyun	status = "okay";
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun	tmp421@4c {
119*4882a593Smuzhiyun		compatible = "ti,tmp421";
120*4882a593Smuzhiyun		reg = <0x4c>;
121*4882a593Smuzhiyun	};
122*4882a593Smuzhiyun};
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun&i2c2 {
125*4882a593Smuzhiyun	status = "okay";
126*4882a593Smuzhiyun};
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun&i2c3 {
129*4882a593Smuzhiyun	status = "okay";
130*4882a593Smuzhiyun};
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun&i2c4 {
133*4882a593Smuzhiyun	status = "okay";
134*4882a593Smuzhiyun	clock-frequency = <100000>;
135*4882a593Smuzhiyun};
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun&i2c5 {
138*4882a593Smuzhiyun	status = "okay";
139*4882a593Smuzhiyun};
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun&i2c6 {
142*4882a593Smuzhiyun	status = "okay";
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun	tmp421@4c {
145*4882a593Smuzhiyun		compatible = "ti,tmp421";
146*4882a593Smuzhiyun		reg = <0x4c>;
147*4882a593Smuzhiyun	};
148*4882a593Smuzhiyun};
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun&i2c7 {
151*4882a593Smuzhiyun	status = "okay";
152*4882a593Smuzhiyun};
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun&vuart {
155*4882a593Smuzhiyun	status = "okay";
156*4882a593Smuzhiyun};
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun&wdt2 {
159*4882a593Smuzhiyun	status = "okay";
160*4882a593Smuzhiyun};
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun&lpc_ctrl {
163*4882a593Smuzhiyun	status = "okay";
164*4882a593Smuzhiyun};
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun&pwm_tacho {
167*4882a593Smuzhiyun	status = "okay";
168*4882a593Smuzhiyun	pinctrl-names = "default";
169*4882a593Smuzhiyun	pinctrl-0 =    <&pinctrl_pwm0_default
170*4882a593Smuzhiyun			&pinctrl_pwm1_default
171*4882a593Smuzhiyun			&pinctrl_pwm2_default
172*4882a593Smuzhiyun			&pinctrl_pwm3_default
173*4882a593Smuzhiyun			&pinctrl_pwm4_default
174*4882a593Smuzhiyun			&pinctrl_pwm5_default
175*4882a593Smuzhiyun			&pinctrl_pwm6_default>;
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun	fan@0 {
178*4882a593Smuzhiyun		reg = <0x00>;
179*4882a593Smuzhiyun		aspeed,fan-tach-ch = /bits/ 8 <0x00>;
180*4882a593Smuzhiyun	};
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun	fan@1 {
183*4882a593Smuzhiyun		reg = <0x01>;
184*4882a593Smuzhiyun		aspeed,fan-tach-ch = /bits/ 8 <0x01>;
185*4882a593Smuzhiyun	};
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun	fan@2 {
188*4882a593Smuzhiyun		reg = <0x02>;
189*4882a593Smuzhiyun		aspeed,fan-tach-ch = /bits/ 8 <0x02>;
190*4882a593Smuzhiyun	};
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun	fan@3 {
193*4882a593Smuzhiyun		reg = <0x03>;
194*4882a593Smuzhiyun		aspeed,fan-tach-ch = /bits/ 8 <0x03>;
195*4882a593Smuzhiyun	};
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun	fan@4 {
198*4882a593Smuzhiyun		reg = <0x04>;
199*4882a593Smuzhiyun		aspeed,fan-tach-ch = /bits/ 8 <0x04>;
200*4882a593Smuzhiyun	};
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun	fan@5 {
203*4882a593Smuzhiyun		reg = <0x05>;
204*4882a593Smuzhiyun		aspeed,fan-tach-ch = /bits/ 8 <0x05>;
205*4882a593Smuzhiyun	};
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun};
208