1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0+ 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Device Tree file for Lenovo Hr855xg2 platform 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2019-present Lenovo 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun/dts-v1/; 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun#include "aspeed-g5.dtsi" 11*4882a593Smuzhiyun#include <dt-bindings/gpio/aspeed-gpio.h> 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun/ { 14*4882a593Smuzhiyun model = "HR855XG2 BMC"; 15*4882a593Smuzhiyun compatible = "lenovo,hr855xg2-bmc", "aspeed,ast2500"; 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun aliases { 18*4882a593Smuzhiyun i2c14 = &i2c_riser1; 19*4882a593Smuzhiyun i2c15 = &i2c_riser2; 20*4882a593Smuzhiyun i2c16 = &i2c_riser3; 21*4882a593Smuzhiyun i2c17 = &i2c_M2; 22*4882a593Smuzhiyun i2c18 = &channel_0; 23*4882a593Smuzhiyun i2c19 = &channel_1; 24*4882a593Smuzhiyun i2c20 = &channel_2; 25*4882a593Smuzhiyun i2c21 = &channel_3; 26*4882a593Smuzhiyun }; 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun chosen { 29*4882a593Smuzhiyun stdout-path = &uart5; 30*4882a593Smuzhiyun bootargs = "console=tty0 console=ttyS4,115200 earlyprintk"; 31*4882a593Smuzhiyun }; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun memory@80000000 { 34*4882a593Smuzhiyun device_type = "memory"; 35*4882a593Smuzhiyun reg = <0x80000000 0x20000000>; 36*4882a593Smuzhiyun }; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun reserved-memory { 39*4882a593Smuzhiyun #address-cells = <1>; 40*4882a593Smuzhiyun #size-cells = <1>; 41*4882a593Smuzhiyun ranges; 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun flash_memory: region@98000000 { 44*4882a593Smuzhiyun no-map; 45*4882a593Smuzhiyun reg = <0x98000000 0x00100000>; /* 1M */ 46*4882a593Smuzhiyun }; 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun gfx_memory: framebuffer { 49*4882a593Smuzhiyun size = <0x01000000>; 50*4882a593Smuzhiyun alignment = <0x01000000>; 51*4882a593Smuzhiyun compatible = "shared-dma-pool"; 52*4882a593Smuzhiyun reusable; 53*4882a593Smuzhiyun }; 54*4882a593Smuzhiyun }; 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun leds { 57*4882a593Smuzhiyun compatible = "gpio-leds"; 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun heartbeat { 60*4882a593Smuzhiyun gpios = <&gpio ASPEED_GPIO(C, 7) GPIO_ACTIVE_LOW>; 61*4882a593Smuzhiyun }; 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun fault { 64*4882a593Smuzhiyun gpios = <&gpio ASPEED_GPIO(G, 3) GPIO_ACTIVE_LOW>; 65*4882a593Smuzhiyun }; 66*4882a593Smuzhiyun }; 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun iio-hwmon { 69*4882a593Smuzhiyun compatible = "iio-hwmon"; 70*4882a593Smuzhiyun io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>, 71*4882a593Smuzhiyun <&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>, 72*4882a593Smuzhiyun <&adc 8>, <&adc 9>, <&adc 10>,<&adc 11>, 73*4882a593Smuzhiyun <&adc 12>,<&adc 13>,<&adc 14>; 74*4882a593Smuzhiyun }; 75*4882a593Smuzhiyun 76*4882a593Smuzhiyun iio-hwmon-battery { 77*4882a593Smuzhiyun compatible = "iio-hwmon"; 78*4882a593Smuzhiyun io-channels = <&adc 15>; 79*4882a593Smuzhiyun }; 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun}; 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun&fmc { 84*4882a593Smuzhiyun status = "okay"; 85*4882a593Smuzhiyun flash@0 { 86*4882a593Smuzhiyun status = "okay"; 87*4882a593Smuzhiyun m25p,fast-read; 88*4882a593Smuzhiyun label = "bmc"; 89*4882a593Smuzhiyun spi-max-frequency = <50000000>; 90*4882a593Smuzhiyun#include "openbmc-flash-layout.dtsi" 91*4882a593Smuzhiyun }; 92*4882a593Smuzhiyun}; 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun&lpc_ctrl { 95*4882a593Smuzhiyun status = "okay"; 96*4882a593Smuzhiyun memory-region = <&flash_memory>; 97*4882a593Smuzhiyun flash = <&spi1>; 98*4882a593Smuzhiyun}; 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun&lpc_snoop { 101*4882a593Smuzhiyun status = "okay"; 102*4882a593Smuzhiyun snoop-ports = <0x80>; 103*4882a593Smuzhiyun}; 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun&uart1 { 106*4882a593Smuzhiyun status = "okay"; 107*4882a593Smuzhiyun pinctrl-names = "default"; 108*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_txd1_default 109*4882a593Smuzhiyun &pinctrl_rxd1_default>; 110*4882a593Smuzhiyun}; 111*4882a593Smuzhiyun 112*4882a593Smuzhiyun&uart2 { 113*4882a593Smuzhiyun /* Rear RS-232 connector */ 114*4882a593Smuzhiyun status = "okay"; 115*4882a593Smuzhiyun pinctrl-names = "default"; 116*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_txd2_default 117*4882a593Smuzhiyun &pinctrl_rxd2_default 118*4882a593Smuzhiyun &pinctrl_nrts2_default 119*4882a593Smuzhiyun &pinctrl_ndtr2_default 120*4882a593Smuzhiyun &pinctrl_ndsr2_default 121*4882a593Smuzhiyun &pinctrl_ncts2_default 122*4882a593Smuzhiyun &pinctrl_ndcd2_default 123*4882a593Smuzhiyun &pinctrl_nri2_default>; 124*4882a593Smuzhiyun}; 125*4882a593Smuzhiyun 126*4882a593Smuzhiyun&uart3 { 127*4882a593Smuzhiyun status = "okay"; 128*4882a593Smuzhiyun}; 129*4882a593Smuzhiyun 130*4882a593Smuzhiyun&uart5 { 131*4882a593Smuzhiyun status = "okay"; 132*4882a593Smuzhiyun}; 133*4882a593Smuzhiyun 134*4882a593Smuzhiyun&ibt { 135*4882a593Smuzhiyun status = "okay"; 136*4882a593Smuzhiyun}; 137*4882a593Smuzhiyun 138*4882a593Smuzhiyun&mac0 { 139*4882a593Smuzhiyun status = "okay"; 140*4882a593Smuzhiyun pinctrl-names = "default"; 141*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_rmii1_default>; 142*4882a593Smuzhiyun clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>, 143*4882a593Smuzhiyun <&syscon ASPEED_CLK_MAC1RCLK>; 144*4882a593Smuzhiyun clock-names = "MACCLK", "RCLK"; 145*4882a593Smuzhiyun use-ncsi; 146*4882a593Smuzhiyun}; 147*4882a593Smuzhiyun 148*4882a593Smuzhiyun&mac1 { 149*4882a593Smuzhiyun status = "okay"; 150*4882a593Smuzhiyun pinctrl-names = "default"; 151*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>; 152*4882a593Smuzhiyun}; 153*4882a593Smuzhiyun 154*4882a593Smuzhiyun&adc{ 155*4882a593Smuzhiyun status = "okay"; 156*4882a593Smuzhiyun pinctrl-names = "default"; 157*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_adc0_default 158*4882a593Smuzhiyun &pinctrl_adc1_default 159*4882a593Smuzhiyun &pinctrl_adc2_default 160*4882a593Smuzhiyun &pinctrl_adc3_default 161*4882a593Smuzhiyun &pinctrl_adc4_default 162*4882a593Smuzhiyun &pinctrl_adc5_default 163*4882a593Smuzhiyun &pinctrl_adc6_default 164*4882a593Smuzhiyun &pinctrl_adc7_default 165*4882a593Smuzhiyun &pinctrl_adc8_default 166*4882a593Smuzhiyun &pinctrl_adc9_default 167*4882a593Smuzhiyun &pinctrl_adc10_default 168*4882a593Smuzhiyun &pinctrl_adc11_default 169*4882a593Smuzhiyun &pinctrl_adc12_default 170*4882a593Smuzhiyun &pinctrl_adc13_default 171*4882a593Smuzhiyun &pinctrl_adc14_default 172*4882a593Smuzhiyun &pinctrl_adc15_default>; 173*4882a593Smuzhiyun}; 174*4882a593Smuzhiyun 175*4882a593Smuzhiyun&i2c0 { 176*4882a593Smuzhiyun status = "okay"; 177*4882a593Smuzhiyun 178*4882a593Smuzhiyun i2c-switch@70 { 179*4882a593Smuzhiyun compatible = "nxp,pca9545"; 180*4882a593Smuzhiyun reg = <0x70>; 181*4882a593Smuzhiyun #address-cells = <1>; 182*4882a593Smuzhiyun #size-cells = <0>; 183*4882a593Smuzhiyun 184*4882a593Smuzhiyun i2c_riser1: i2c@0 { 185*4882a593Smuzhiyun #address-cells = <1>; 186*4882a593Smuzhiyun #size-cells = <0>; 187*4882a593Smuzhiyun reg = <0>; 188*4882a593Smuzhiyun }; 189*4882a593Smuzhiyun 190*4882a593Smuzhiyun i2c_riser2: i2c@1 { 191*4882a593Smuzhiyun #address-cells = <1>; 192*4882a593Smuzhiyun #size-cells = <0>; 193*4882a593Smuzhiyun reg = <1>; 194*4882a593Smuzhiyun }; 195*4882a593Smuzhiyun 196*4882a593Smuzhiyun i2c_riser3: i2c@2 { 197*4882a593Smuzhiyun #address-cells = <1>; 198*4882a593Smuzhiyun #size-cells = <0>; 199*4882a593Smuzhiyun reg = <2>; 200*4882a593Smuzhiyun }; 201*4882a593Smuzhiyun 202*4882a593Smuzhiyun i2c_M2: i2c@3 { 203*4882a593Smuzhiyun #address-cells = <1>; 204*4882a593Smuzhiyun #size-cells = <0>; 205*4882a593Smuzhiyun reg = <3>; 206*4882a593Smuzhiyun }; 207*4882a593Smuzhiyun }; 208*4882a593Smuzhiyun}; 209*4882a593Smuzhiyun 210*4882a593Smuzhiyun&i2c1 { 211*4882a593Smuzhiyun status = "okay"; 212*4882a593Smuzhiyun bus-frequency = <90000>; 213*4882a593Smuzhiyun HotSwap@10 { 214*4882a593Smuzhiyun compatible = "adm1272"; 215*4882a593Smuzhiyun reg = <0x10>; 216*4882a593Smuzhiyun }; 217*4882a593Smuzhiyun 218*4882a593Smuzhiyun VR@45 { 219*4882a593Smuzhiyun compatible = "pmbus"; 220*4882a593Smuzhiyun reg = <0x45>; 221*4882a593Smuzhiyun }; 222*4882a593Smuzhiyun}; 223*4882a593Smuzhiyun 224*4882a593Smuzhiyun&i2c2 { 225*4882a593Smuzhiyun status = "okay"; 226*4882a593Smuzhiyun}; 227*4882a593Smuzhiyun 228*4882a593Smuzhiyun&i2c3 { 229*4882a593Smuzhiyun status = "okay"; 230*4882a593Smuzhiyun i2c-switch@70 { 231*4882a593Smuzhiyun compatible = "nxp,pca9546"; 232*4882a593Smuzhiyun reg = <0x70>; 233*4882a593Smuzhiyun #address-cells = <1>; 234*4882a593Smuzhiyun #size-cells = <0>; 235*4882a593Smuzhiyun 236*4882a593Smuzhiyun channel_0: i2c@0 { 237*4882a593Smuzhiyun #address-cells = <1>; 238*4882a593Smuzhiyun #size-cells = <0>; 239*4882a593Smuzhiyun reg = <0>; 240*4882a593Smuzhiyun }; 241*4882a593Smuzhiyun 242*4882a593Smuzhiyun channel_1: i2c@1 { 243*4882a593Smuzhiyun #address-cells = <1>; 244*4882a593Smuzhiyun #size-cells = <0>; 245*4882a593Smuzhiyun reg = <1>; 246*4882a593Smuzhiyun }; 247*4882a593Smuzhiyun 248*4882a593Smuzhiyun channel_2: i2c@2 { 249*4882a593Smuzhiyun #address-cells = <1>; 250*4882a593Smuzhiyun #size-cells = <0>; 251*4882a593Smuzhiyun reg = <2>; 252*4882a593Smuzhiyun }; 253*4882a593Smuzhiyun 254*4882a593Smuzhiyun channel_3: i2c@3 { 255*4882a593Smuzhiyun #address-cells = <1>; 256*4882a593Smuzhiyun #size-cells = <0>; 257*4882a593Smuzhiyun reg = <3>; 258*4882a593Smuzhiyun }; 259*4882a593Smuzhiyun }; 260*4882a593Smuzhiyun}; 261*4882a593Smuzhiyun 262*4882a593Smuzhiyun&i2c4 { 263*4882a593Smuzhiyun status = "okay"; 264*4882a593Smuzhiyun}; 265*4882a593Smuzhiyun 266*4882a593Smuzhiyun&i2c5 { 267*4882a593Smuzhiyun status = "okay"; 268*4882a593Smuzhiyun}; 269*4882a593Smuzhiyun 270*4882a593Smuzhiyun&i2c6 { 271*4882a593Smuzhiyun status = "okay"; 272*4882a593Smuzhiyun /* temp1 */ 273*4882a593Smuzhiyun tmp75@49 { 274*4882a593Smuzhiyun compatible = "national,lm75"; 275*4882a593Smuzhiyun reg = <0x49>; 276*4882a593Smuzhiyun }; 277*4882a593Smuzhiyun 278*4882a593Smuzhiyun /* temp2 */ 279*4882a593Smuzhiyun tmp75@4d { 280*4882a593Smuzhiyun compatible = "national,lm75"; 281*4882a593Smuzhiyun reg = <0x4d>; 282*4882a593Smuzhiyun }; 283*4882a593Smuzhiyun 284*4882a593Smuzhiyun eeprom@54 { 285*4882a593Smuzhiyun compatible = "atmel,24c256"; 286*4882a593Smuzhiyun reg = <0x54>; 287*4882a593Smuzhiyun pagesize = <16>; 288*4882a593Smuzhiyun }; 289*4882a593Smuzhiyun}; 290*4882a593Smuzhiyun 291*4882a593Smuzhiyun&i2c7 { 292*4882a593Smuzhiyun status = "okay"; 293*4882a593Smuzhiyun}; 294*4882a593Smuzhiyun 295*4882a593Smuzhiyun&i2c8 { 296*4882a593Smuzhiyun status = "okay"; 297*4882a593Smuzhiyun}; 298*4882a593Smuzhiyun 299*4882a593Smuzhiyun&i2c9 { 300*4882a593Smuzhiyun status = "okay"; 301*4882a593Smuzhiyun}; 302*4882a593Smuzhiyun 303*4882a593Smuzhiyun&i2c10 { 304*4882a593Smuzhiyun status = "okay"; 305*4882a593Smuzhiyun}; 306*4882a593Smuzhiyun 307*4882a593Smuzhiyun&i2c11 { 308*4882a593Smuzhiyun status = "okay"; 309*4882a593Smuzhiyun}; 310*4882a593Smuzhiyun 311*4882a593Smuzhiyun&i2c13 { 312*4882a593Smuzhiyun status = "okay"; 313*4882a593Smuzhiyun}; 314*4882a593Smuzhiyun 315*4882a593Smuzhiyun&ehci1 { 316*4882a593Smuzhiyun status = "okay"; 317*4882a593Smuzhiyun}; 318*4882a593Smuzhiyun 319*4882a593Smuzhiyun&uhci { 320*4882a593Smuzhiyun status = "okay"; 321*4882a593Smuzhiyun}; 322*4882a593Smuzhiyun 323*4882a593Smuzhiyun&gfx { 324*4882a593Smuzhiyun status = "okay"; 325*4882a593Smuzhiyun memory-region = <&gfx_memory>; 326*4882a593Smuzhiyun}; 327*4882a593Smuzhiyun 328*4882a593Smuzhiyun&pwm_tacho { 329*4882a593Smuzhiyun status = "okay"; 330*4882a593Smuzhiyun pinctrl-names = "default"; 331*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_pwm0_default 332*4882a593Smuzhiyun &pinctrl_pwm1_default 333*4882a593Smuzhiyun &pinctrl_pwm2_default 334*4882a593Smuzhiyun &pinctrl_pwm3_default 335*4882a593Smuzhiyun &pinctrl_pwm4_default 336*4882a593Smuzhiyun &pinctrl_pwm5_default 337*4882a593Smuzhiyun &pinctrl_pwm6_default 338*4882a593Smuzhiyun &pinctrl_pwm7_default>; 339*4882a593Smuzhiyun 340*4882a593Smuzhiyun fan@0 { 341*4882a593Smuzhiyun reg = <0x00>; 342*4882a593Smuzhiyun aspeed,fan-tach-ch = /bits/ 8 <0x00>; 343*4882a593Smuzhiyun }; 344*4882a593Smuzhiyun 345*4882a593Smuzhiyun fan@1 { 346*4882a593Smuzhiyun reg = <0x00>; 347*4882a593Smuzhiyun aspeed,fan-tach-ch = /bits/ 8 <0x01>; 348*4882a593Smuzhiyun }; 349*4882a593Smuzhiyun 350*4882a593Smuzhiyun fan@2 { 351*4882a593Smuzhiyun reg = <0x01>; 352*4882a593Smuzhiyun aspeed,fan-tach-ch = /bits/ 8 <0x02>; 353*4882a593Smuzhiyun }; 354*4882a593Smuzhiyun 355*4882a593Smuzhiyun fan@3 { 356*4882a593Smuzhiyun reg = <0x01>; 357*4882a593Smuzhiyun aspeed,fan-tach-ch = /bits/ 8 <0x03>; 358*4882a593Smuzhiyun }; 359*4882a593Smuzhiyun 360*4882a593Smuzhiyun fan@4 { 361*4882a593Smuzhiyun reg = <0x02>; 362*4882a593Smuzhiyun aspeed,fan-tach-ch = /bits/ 8 <0x04>; 363*4882a593Smuzhiyun }; 364*4882a593Smuzhiyun 365*4882a593Smuzhiyun fan@5 { 366*4882a593Smuzhiyun reg = <0x02>; 367*4882a593Smuzhiyun aspeed,fan-tach-ch = /bits/ 8 <0x05>; 368*4882a593Smuzhiyun }; 369*4882a593Smuzhiyun 370*4882a593Smuzhiyun fan@6 { 371*4882a593Smuzhiyun reg = <0x03>; 372*4882a593Smuzhiyun aspeed,fan-tach-ch = /bits/ 8 <0x06>; 373*4882a593Smuzhiyun }; 374*4882a593Smuzhiyun 375*4882a593Smuzhiyun fan@7 { 376*4882a593Smuzhiyun reg = <0x03>; 377*4882a593Smuzhiyun aspeed,fan-tach-ch = /bits/ 8 <0x07>; 378*4882a593Smuzhiyun }; 379*4882a593Smuzhiyun 380*4882a593Smuzhiyun fan@8 { 381*4882a593Smuzhiyun reg = <0x04>; 382*4882a593Smuzhiyun aspeed,fan-tach-ch = /bits/ 8 <0x08>; 383*4882a593Smuzhiyun }; 384*4882a593Smuzhiyun 385*4882a593Smuzhiyun fan@9 { 386*4882a593Smuzhiyun reg = <0x04>; 387*4882a593Smuzhiyun aspeed,fan-tach-ch = /bits/ 8 <0x09>; 388*4882a593Smuzhiyun }; 389*4882a593Smuzhiyun 390*4882a593Smuzhiyun fan@10 { 391*4882a593Smuzhiyun reg = <0x05>; 392*4882a593Smuzhiyun aspeed,fan-tach-ch = /bits/ 8 <0x0a>; 393*4882a593Smuzhiyun }; 394*4882a593Smuzhiyun 395*4882a593Smuzhiyun fan@11 { 396*4882a593Smuzhiyun reg = <0x05>; 397*4882a593Smuzhiyun aspeed,fan-tach-ch = /bits/ 8 <0x0b>; 398*4882a593Smuzhiyun }; 399*4882a593Smuzhiyun 400*4882a593Smuzhiyun fan@12 { 401*4882a593Smuzhiyun reg = <0x06>; 402*4882a593Smuzhiyun aspeed,fan-tach-ch = /bits/ 8 <0x0c>; 403*4882a593Smuzhiyun }; 404*4882a593Smuzhiyun 405*4882a593Smuzhiyun fan@13 { 406*4882a593Smuzhiyun reg = <0x06>; 407*4882a593Smuzhiyun aspeed,fan-tach-ch = /bits/ 8 <0x0d>; 408*4882a593Smuzhiyun }; 409*4882a593Smuzhiyun 410*4882a593Smuzhiyun fan@14 { 411*4882a593Smuzhiyun reg = <0x07>; 412*4882a593Smuzhiyun aspeed,fan-tach-ch = /bits/ 8 <0x0e>; 413*4882a593Smuzhiyun }; 414*4882a593Smuzhiyun 415*4882a593Smuzhiyun fan@15 { 416*4882a593Smuzhiyun reg = <0x07>; 417*4882a593Smuzhiyun aspeed,fan-tach-ch = /bits/ 8 <0x0f>; 418*4882a593Smuzhiyun }; 419*4882a593Smuzhiyun 420*4882a593Smuzhiyun fan@16 { 421*4882a593Smuzhiyun reg = <0x07>; 422*4882a593Smuzhiyun aspeed,fan-tach-ch = /bits/ 8 <0x0f>; 423*4882a593Smuzhiyun }; 424*4882a593Smuzhiyun}; 425*4882a593Smuzhiyun 426*4882a593Smuzhiyun&gpio { 427*4882a593Smuzhiyun 428*4882a593Smuzhiyun pin_gpio_a1 { 429*4882a593Smuzhiyun gpio-hog; 430*4882a593Smuzhiyun gpios = <ASPEED_GPIO(A, 1) GPIO_ACTIVE_LOW>; 431*4882a593Smuzhiyun output-high; 432*4882a593Smuzhiyun line-name = "BMC_EMMC_RST_N"; 433*4882a593Smuzhiyun }; 434*4882a593Smuzhiyun 435*4882a593Smuzhiyun pin_gpio_a3 { 436*4882a593Smuzhiyun gpio-hog; 437*4882a593Smuzhiyun gpios = <ASPEED_GPIO(A, 3) GPIO_ACTIVE_LOW>; 438*4882a593Smuzhiyun output-high; 439*4882a593Smuzhiyun line-name = "PCH_PWROK_BMC_FPGA"; 440*4882a593Smuzhiyun }; 441*4882a593Smuzhiyun 442*4882a593Smuzhiyun pin_gpio_b5 { 443*4882a593Smuzhiyun gpio-hog; 444*4882a593Smuzhiyun gpios = <ASPEED_GPIO(B, 5) GPIO_ACTIVE_HIGH>; 445*4882a593Smuzhiyun output-high; 446*4882a593Smuzhiyun line-name = "IRQ_BMC_PCH_SMI_LPC_N"; 447*4882a593Smuzhiyun }; 448*4882a593Smuzhiyun 449*4882a593Smuzhiyun pin_gpio_b7 { 450*4882a593Smuzhiyun gpio-hog; 451*4882a593Smuzhiyun gpios = <ASPEED_GPIO(B, 7) GPIO_ACTIVE_LOW>; 452*4882a593Smuzhiyun output-low; 453*4882a593Smuzhiyun line-name = "CPU_SM_WP"; 454*4882a593Smuzhiyun }; 455*4882a593Smuzhiyun 456*4882a593Smuzhiyun pin_gpio_e0 { 457*4882a593Smuzhiyun gpio-hog; 458*4882a593Smuzhiyun gpios = <ASPEED_GPIO(E, 0) GPIO_ACTIVE_HIGH>; 459*4882a593Smuzhiyun input; 460*4882a593Smuzhiyun line-name = "PDB_PSU_SEL"; 461*4882a593Smuzhiyun }; 462*4882a593Smuzhiyun 463*4882a593Smuzhiyun pin_gpio_e2 { 464*4882a593Smuzhiyun gpio-hog; 465*4882a593Smuzhiyun gpios = <ASPEED_GPIO(E, 2) GPIO_ACTIVE_HIGH>; 466*4882a593Smuzhiyun output-high; 467*4882a593Smuzhiyun line-name = "LOCATOR_LED_N"; 468*4882a593Smuzhiyun }; 469*4882a593Smuzhiyun 470*4882a593Smuzhiyun pin_gpio_e5 { 471*4882a593Smuzhiyun gpio-hog; 472*4882a593Smuzhiyun gpios = <ASPEED_GPIO(E, 5) GPIO_ACTIVE_HIGH>; 473*4882a593Smuzhiyun output-high; 474*4882a593Smuzhiyun line-name = "FM_BMC_DBP_PRESENT_R1_N"; 475*4882a593Smuzhiyun }; 476*4882a593Smuzhiyun 477*4882a593Smuzhiyun pin_gpio_e6 { 478*4882a593Smuzhiyun gpio-hog; 479*4882a593Smuzhiyun gpios = <ASPEED_GPIO(E, 6) GPIO_ACTIVE_HIGH>; 480*4882a593Smuzhiyun output-high; 481*4882a593Smuzhiyun line-name = "BMC_ME_SECURITY_OVERRIDE_N"; 482*4882a593Smuzhiyun }; 483*4882a593Smuzhiyun 484*4882a593Smuzhiyun pin_gpio_f0 { 485*4882a593Smuzhiyun gpio-hog; 486*4882a593Smuzhiyun gpios = <ASPEED_GPIO(F, 0) GPIO_ACTIVE_HIGH>; 487*4882a593Smuzhiyun output-high; 488*4882a593Smuzhiyun line-name = "IRQ_BMC_PCH_NMI_R"; 489*4882a593Smuzhiyun }; 490*4882a593Smuzhiyun 491*4882a593Smuzhiyun pin_gpio_f1 { 492*4882a593Smuzhiyun gpio-hog; 493*4882a593Smuzhiyun gpios = <ASPEED_GPIO(F, 1) GPIO_ACTIVE_HIGH>; 494*4882a593Smuzhiyun input; 495*4882a593Smuzhiyun line-name = "CPU2_PROCDIS_BMC_N"; 496*4882a593Smuzhiyun }; 497*4882a593Smuzhiyun 498*4882a593Smuzhiyun pin_gpio_f2 { 499*4882a593Smuzhiyun gpio-hog; 500*4882a593Smuzhiyun gpios = <ASPEED_GPIO(F, 2) GPIO_ACTIVE_HIGH>; 501*4882a593Smuzhiyun output-high; 502*4882a593Smuzhiyun line-name = "RM_THROTTLE_EN_N"; 503*4882a593Smuzhiyun }; 504*4882a593Smuzhiyun 505*4882a593Smuzhiyun pin_gpio_f3 { 506*4882a593Smuzhiyun gpio-hog; 507*4882a593Smuzhiyun gpios = <ASPEED_GPIO(F, 3) GPIO_ACTIVE_HIGH>; 508*4882a593Smuzhiyun output-low; 509*4882a593Smuzhiyun line-name = "FM_PMBUS_ALERT_B_EN"; 510*4882a593Smuzhiyun }; 511*4882a593Smuzhiyun 512*4882a593Smuzhiyun pin_gpio_f4 { 513*4882a593Smuzhiyun gpio-hog; 514*4882a593Smuzhiyun gpios = <ASPEED_GPIO(F, 4) GPIO_ACTIVE_HIGH>; 515*4882a593Smuzhiyun output-high; 516*4882a593Smuzhiyun line-name = "BMC_FORCE_NM_THROTTLE_N"; 517*4882a593Smuzhiyun }; 518*4882a593Smuzhiyun 519*4882a593Smuzhiyun pin_gpio_f6 { 520*4882a593Smuzhiyun gpio-hog; 521*4882a593Smuzhiyun gpios = <ASPEED_GPIO(F, 6) GPIO_ACTIVE_HIGH>; 522*4882a593Smuzhiyun output-high; 523*4882a593Smuzhiyun line-name = "FM_BMC_CPU_PWR_DEBUG_N"; 524*4882a593Smuzhiyun }; 525*4882a593Smuzhiyun 526*4882a593Smuzhiyun pin_gpio_g7 { 527*4882a593Smuzhiyun gpio-hog; 528*4882a593Smuzhiyun gpios = <ASPEED_GPIO(G, 7) GPIO_ACTIVE_HIGH>; 529*4882a593Smuzhiyun output-high; 530*4882a593Smuzhiyun line-name = "BMC_PCIE_I2C_MUX_RST_N"; 531*4882a593Smuzhiyun }; 532*4882a593Smuzhiyun 533*4882a593Smuzhiyun pin_gpio_h6 { 534*4882a593Smuzhiyun gpio-hog; 535*4882a593Smuzhiyun gpios = <ASPEED_GPIO(H, 6) GPIO_ACTIVE_HIGH>; 536*4882a593Smuzhiyun output-high; 537*4882a593Smuzhiyun line-name = "FM_BMC_DBP_PRESENT_R2_N"; 538*4882a593Smuzhiyun }; 539*4882a593Smuzhiyun 540*4882a593Smuzhiyun pin_gpio_i3 { 541*4882a593Smuzhiyun gpio-hog; 542*4882a593Smuzhiyun gpios = <ASPEED_GPIO(I, 3) GPIO_ACTIVE_HIGH>; 543*4882a593Smuzhiyun output-high; 544*4882a593Smuzhiyun line-name = "SPI_BMC_BIOS_WP_N"; 545*4882a593Smuzhiyun }; 546*4882a593Smuzhiyun 547*4882a593Smuzhiyun pin_gpio_j1 { 548*4882a593Smuzhiyun gpio-hog; 549*4882a593Smuzhiyun gpios = <ASPEED_GPIO(J, 1) GPIO_ACTIVE_HIGH>; 550*4882a593Smuzhiyun output-high; 551*4882a593Smuzhiyun line-name = "BMC_USB_SEL"; 552*4882a593Smuzhiyun }; 553*4882a593Smuzhiyun 554*4882a593Smuzhiyun pin_gpio_j2 { 555*4882a593Smuzhiyun gpio-hog; 556*4882a593Smuzhiyun gpios = <ASPEED_GPIO(J, 2) GPIO_ACTIVE_HIGH>; 557*4882a593Smuzhiyun output-high; 558*4882a593Smuzhiyun line-name = "PDB_SMB_RST_N"; 559*4882a593Smuzhiyun }; 560*4882a593Smuzhiyun 561*4882a593Smuzhiyun pin_gpio_j3 { 562*4882a593Smuzhiyun gpio-hog; 563*4882a593Smuzhiyun gpios = <ASPEED_GPIO(J, 3) GPIO_ACTIVE_HIGH>; 564*4882a593Smuzhiyun output-high; 565*4882a593Smuzhiyun line-name = "SPI_BMC_BIOS_HOLD_N"; 566*4882a593Smuzhiyun }; 567*4882a593Smuzhiyun 568*4882a593Smuzhiyun pin_gpio_l0 { 569*4882a593Smuzhiyun gpio-hog; 570*4882a593Smuzhiyun gpios = <ASPEED_GPIO(L, 0) GPIO_ACTIVE_HIGH>; 571*4882a593Smuzhiyun output-high; 572*4882a593Smuzhiyun line-name = "PDB_FAN_TACH_SEL"; 573*4882a593Smuzhiyun }; 574*4882a593Smuzhiyun 575*4882a593Smuzhiyun pin_gpio_l1 { 576*4882a593Smuzhiyun gpio-hog; 577*4882a593Smuzhiyun gpios = <ASPEED_GPIO(L, 1) GPIO_ACTIVE_HIGH>; 578*4882a593Smuzhiyun output-high; 579*4882a593Smuzhiyun line-name = "SYS_RESET_BMC_FPGA_N"; 580*4882a593Smuzhiyun }; 581*4882a593Smuzhiyun 582*4882a593Smuzhiyun pin_gpio_l4 { 583*4882a593Smuzhiyun gpio-hog; 584*4882a593Smuzhiyun gpios = <ASPEED_GPIO(L, 4) GPIO_ACTIVE_HIGH>; 585*4882a593Smuzhiyun output-high; 586*4882a593Smuzhiyun line-name = "FM_EFUSE_FAN_G1_EN"; 587*4882a593Smuzhiyun }; 588*4882a593Smuzhiyun 589*4882a593Smuzhiyun pin_gpio_l5 { 590*4882a593Smuzhiyun gpio-hog; 591*4882a593Smuzhiyun gpios = <ASPEED_GPIO(L, 5) GPIO_ACTIVE_HIGH>; 592*4882a593Smuzhiyun output-high; 593*4882a593Smuzhiyun line-name = "FM_EFUSE_FAN_G2_EN"; 594*4882a593Smuzhiyun }; 595*4882a593Smuzhiyun 596*4882a593Smuzhiyun pin_gpio_r6 { 597*4882a593Smuzhiyun gpio-hog; 598*4882a593Smuzhiyun gpios = <ASPEED_GPIO(R, 6) GPIO_ACTIVE_HIGH>; 599*4882a593Smuzhiyun input; 600*4882a593Smuzhiyun line-name = "CPU3_PROCDIS_BMC_N"; 601*4882a593Smuzhiyun }; 602*4882a593Smuzhiyun 603*4882a593Smuzhiyun pin_gpio_r7 { 604*4882a593Smuzhiyun gpio-hog; 605*4882a593Smuzhiyun gpios = <ASPEED_GPIO(R, 7) GPIO_ACTIVE_HIGH>; 606*4882a593Smuzhiyun input; 607*4882a593Smuzhiyun line-name = "CPU4_PROCDIS_BMC_N"; 608*4882a593Smuzhiyun }; 609*4882a593Smuzhiyun 610*4882a593Smuzhiyun pin_gpio_s1 { 611*4882a593Smuzhiyun gpio-hog; 612*4882a593Smuzhiyun gpios = <ASPEED_GPIO(S, 1) GPIO_ACTIVE_HIGH>; 613*4882a593Smuzhiyun output-low; 614*4882a593Smuzhiyun line-name = "DBP_SYSPWROK_BMC"; 615*4882a593Smuzhiyun }; 616*4882a593Smuzhiyun 617*4882a593Smuzhiyun pin_gpio_s2 { 618*4882a593Smuzhiyun gpio-hog; 619*4882a593Smuzhiyun gpios = <ASPEED_GPIO(S, 2) GPIO_ACTIVE_HIGH>; 620*4882a593Smuzhiyun output-high; 621*4882a593Smuzhiyun line-name = "PCH_RST_RSMRST_N"; 622*4882a593Smuzhiyun }; 623*4882a593Smuzhiyun 624*4882a593Smuzhiyun pin_gpio_s6 { 625*4882a593Smuzhiyun gpio-hog; 626*4882a593Smuzhiyun gpios = <ASPEED_GPIO(S, 6) GPIO_ACTIVE_HIGH>; 627*4882a593Smuzhiyun output-high; 628*4882a593Smuzhiyun line-name = "BMC_HW_STRAP_5"; 629*4882a593Smuzhiyun }; 630*4882a593Smuzhiyun 631*4882a593Smuzhiyun pin_gpio_z3 { 632*4882a593Smuzhiyun gpio-hog; 633*4882a593Smuzhiyun gpios = <ASPEED_GPIO(Z, 3) GPIO_ACTIVE_HIGH>; 634*4882a593Smuzhiyun output-high; 635*4882a593Smuzhiyun line-name = "FM_BMC_PCH_SCI_LPC_N"; 636*4882a593Smuzhiyun }; 637*4882a593Smuzhiyun 638*4882a593Smuzhiyun pin_gpio_aa0 { 639*4882a593Smuzhiyun gpio-hog; 640*4882a593Smuzhiyun gpios = <ASPEED_GPIO(AA, 0) GPIO_ACTIVE_HIGH>; 641*4882a593Smuzhiyun output-low; 642*4882a593Smuzhiyun line-name = "FW_PSU_ALERT_EN_N"; 643*4882a593Smuzhiyun }; 644*4882a593Smuzhiyun 645*4882a593Smuzhiyun pin_gpio_aa4 { 646*4882a593Smuzhiyun gpio-hog; 647*4882a593Smuzhiyun gpios = <ASPEED_GPIO(AA, 4) GPIO_ACTIVE_HIGH>; 648*4882a593Smuzhiyun output-high; 649*4882a593Smuzhiyun line-name = "DBP_CPU_PREQ_N"; 650*4882a593Smuzhiyun }; 651*4882a593Smuzhiyun 652*4882a593Smuzhiyun pin_gpio_ab3 { 653*4882a593Smuzhiyun gpio-hog; 654*4882a593Smuzhiyun gpios = <ASPEED_GPIO(AB, 3) GPIO_ACTIVE_HIGH>; 655*4882a593Smuzhiyun output-low; 656*4882a593Smuzhiyun line-name = "BMC_WDTRST"; 657*4882a593Smuzhiyun }; 658*4882a593Smuzhiyun 659*4882a593Smuzhiyun pin_gpio_ac6 { 660*4882a593Smuzhiyun gpio-hog; 661*4882a593Smuzhiyun gpios = <ASPEED_GPIO(AC, 6) GPIO_ACTIVE_HIGH>; 662*4882a593Smuzhiyun output-high; 663*4882a593Smuzhiyun line-name = "ESPI_BMC_ALERT_N"; 664*4882a593Smuzhiyun }; 665*4882a593Smuzhiyun 666*4882a593Smuzhiyun}; 667