1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0+ 2*4882a593Smuzhiyun/dts-v1/; 3*4882a593Smuzhiyun#include "aspeed-g5.dtsi" 4*4882a593Smuzhiyun#include <dt-bindings/gpio/aspeed-gpio.h> 5*4882a593Smuzhiyun#include <dt-bindings/leds/leds-pca955x.h> 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun/ { 8*4882a593Smuzhiyun model = "FP5280G2 BMC"; 9*4882a593Smuzhiyun compatible = "inspur,fp5280g2-bmc", "aspeed,ast2500"; 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun chosen { 12*4882a593Smuzhiyun stdout-path = &uart5; 13*4882a593Smuzhiyun bootargs = "console=ttyS4,115200 earlyprintk"; 14*4882a593Smuzhiyun }; 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun memory@80000000 { 17*4882a593Smuzhiyun reg = <0x80000000 0x20000000>; 18*4882a593Smuzhiyun }; 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun reserved-memory { 21*4882a593Smuzhiyun #address-cells = <1>; 22*4882a593Smuzhiyun #size-cells = <1>; 23*4882a593Smuzhiyun ranges; 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun vga_memory: framebuffer@9f000000 { 26*4882a593Smuzhiyun no-map; 27*4882a593Smuzhiyun reg = <0x9f000000 0x01000000>; /* 16M */ 28*4882a593Smuzhiyun }; 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun flash_memory: region@98000000 { 31*4882a593Smuzhiyun no-map; 32*4882a593Smuzhiyun reg = <0x98000000 0x04000000>; /* 64M */ 33*4882a593Smuzhiyun }; 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun coldfire_memory: codefire_memory@9ef00000 { 36*4882a593Smuzhiyun reg = <0x9ef00000 0x00100000>; 37*4882a593Smuzhiyun no-map; 38*4882a593Smuzhiyun }; 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun gfx_memory: framebuffer { 41*4882a593Smuzhiyun size = <0x01000000>; 42*4882a593Smuzhiyun alignment = <0x01000000>; 43*4882a593Smuzhiyun compatible = "shared-dma-pool"; 44*4882a593Smuzhiyun reusable; 45*4882a593Smuzhiyun }; 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun video_engine_memory: jpegbuffer { 48*4882a593Smuzhiyun size = <0x02000000>; /* 32M */ 49*4882a593Smuzhiyun alignment = <0x01000000>; 50*4882a593Smuzhiyun compatible = "shared-dma-pool"; 51*4882a593Smuzhiyun reusable; 52*4882a593Smuzhiyun }; 53*4882a593Smuzhiyun }; 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun fsi: gpio-fsi { 56*4882a593Smuzhiyun compatible = "aspeed,ast2500-cf-fsi-master", "fsi-master"; 57*4882a593Smuzhiyun #address-cells = <2>; 58*4882a593Smuzhiyun #size-cells = <0>; 59*4882a593Smuzhiyun no-gpio-delays; 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun memory-region = <&coldfire_memory>; 62*4882a593Smuzhiyun aspeed,sram = <&sram>; 63*4882a593Smuzhiyun aspeed,cvic = <&cvic>; 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun clock-gpios = <&gpio ASPEED_GPIO(AA, 0) GPIO_ACTIVE_HIGH>; 66*4882a593Smuzhiyun data-gpios = <&gpio ASPEED_GPIO(AA, 2) GPIO_ACTIVE_HIGH>; 67*4882a593Smuzhiyun mux-gpios = <&gpio ASPEED_GPIO(I, 2) GPIO_ACTIVE_HIGH>; 68*4882a593Smuzhiyun enable-gpios = <&gpio ASPEED_GPIO(I, 3) GPIO_ACTIVE_HIGH>; 69*4882a593Smuzhiyun trans-gpios = <&gpio ASPEED_GPIO(R, 2) GPIO_ACTIVE_HIGH>; 70*4882a593Smuzhiyun }; 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun gpio-keys { 73*4882a593Smuzhiyun compatible = "gpio-keys"; 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun checkstop { 76*4882a593Smuzhiyun label = "checkstop"; 77*4882a593Smuzhiyun gpios = <&gpio ASPEED_GPIO(B, 3) GPIO_ACTIVE_LOW>; 78*4882a593Smuzhiyun linux,code = <ASPEED_GPIO(B, 3)>; 79*4882a593Smuzhiyun }; 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun ps0-presence { 82*4882a593Smuzhiyun label = "ps0-presence"; 83*4882a593Smuzhiyun gpios = <&gpio ASPEED_GPIO(F, 0) GPIO_ACTIVE_LOW>; 84*4882a593Smuzhiyun linux,code = <ASPEED_GPIO(F, 0)>; 85*4882a593Smuzhiyun }; 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun ps1-presence { 88*4882a593Smuzhiyun label = "ps1-presence"; 89*4882a593Smuzhiyun gpios = <&gpio ASPEED_GPIO(F, 1) GPIO_ACTIVE_LOW>; 90*4882a593Smuzhiyun linux,code = <ASPEED_GPIO(F, 1)>; 91*4882a593Smuzhiyun }; 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun }; 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun gpio-keys-polled { 96*4882a593Smuzhiyun compatible = "gpio-keys-polled"; 97*4882a593Smuzhiyun poll-interval = <1000>; 98*4882a593Smuzhiyun 99*4882a593Smuzhiyun fan0-presence { 100*4882a593Smuzhiyun label = "fan0-presence"; 101*4882a593Smuzhiyun gpios = <&pca1 0 GPIO_ACTIVE_LOW>; 102*4882a593Smuzhiyun linux,code = <1>; 103*4882a593Smuzhiyun }; 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun fan1-presence { 106*4882a593Smuzhiyun label = "fan1-presence"; 107*4882a593Smuzhiyun gpios = <&pca1 1 GPIO_ACTIVE_LOW>; 108*4882a593Smuzhiyun linux,code = <2>; 109*4882a593Smuzhiyun }; 110*4882a593Smuzhiyun 111*4882a593Smuzhiyun fan2-presence { 112*4882a593Smuzhiyun label = "fan2-presence"; 113*4882a593Smuzhiyun gpios = <&pca1 2 GPIO_ACTIVE_LOW>; 114*4882a593Smuzhiyun linux,code = <3>; 115*4882a593Smuzhiyun }; 116*4882a593Smuzhiyun 117*4882a593Smuzhiyun fan3-presence { 118*4882a593Smuzhiyun label = "fan3-presence"; 119*4882a593Smuzhiyun gpios = <&pca1 3 GPIO_ACTIVE_LOW>; 120*4882a593Smuzhiyun linux,code = <4>; 121*4882a593Smuzhiyun }; 122*4882a593Smuzhiyun 123*4882a593Smuzhiyun fan4-presence { 124*4882a593Smuzhiyun label = "fan4-presence"; 125*4882a593Smuzhiyun gpios = <&pca1 4 GPIO_ACTIVE_LOW>; 126*4882a593Smuzhiyun linux,code = <5>; 127*4882a593Smuzhiyun }; 128*4882a593Smuzhiyun 129*4882a593Smuzhiyun fan5-presence { 130*4882a593Smuzhiyun label = "fan5-presence"; 131*4882a593Smuzhiyun gpios = <&pca1 5 GPIO_ACTIVE_LOW>; 132*4882a593Smuzhiyun linux,code = <6>; 133*4882a593Smuzhiyun }; 134*4882a593Smuzhiyun 135*4882a593Smuzhiyun fan6-presence { 136*4882a593Smuzhiyun label = "fan6-presence"; 137*4882a593Smuzhiyun gpios = <&pca1 6 GPIO_ACTIVE_LOW>; 138*4882a593Smuzhiyun linux,code = <7>; 139*4882a593Smuzhiyun }; 140*4882a593Smuzhiyun 141*4882a593Smuzhiyun fan7-presence { 142*4882a593Smuzhiyun label = "fan7-presence"; 143*4882a593Smuzhiyun gpios = <&pca1 7 GPIO_ACTIVE_LOW>; 144*4882a593Smuzhiyun linux,code = <8>; 145*4882a593Smuzhiyun }; 146*4882a593Smuzhiyun }; 147*4882a593Smuzhiyun 148*4882a593Smuzhiyun leds { 149*4882a593Smuzhiyun compatible = "gpio-leds"; 150*4882a593Smuzhiyun 151*4882a593Smuzhiyun power { 152*4882a593Smuzhiyun label = "power"; 153*4882a593Smuzhiyun /* TODO: dummy gpio */ 154*4882a593Smuzhiyun gpios = <&gpio ASPEED_GPIO(R, 1) GPIO_ACTIVE_LOW>; 155*4882a593Smuzhiyun }; 156*4882a593Smuzhiyun 157*4882a593Smuzhiyun init-ok { 158*4882a593Smuzhiyun label = "init-ok"; 159*4882a593Smuzhiyun gpios = <&gpio ASPEED_GPIO(B, 7) GPIO_ACTIVE_LOW>; 160*4882a593Smuzhiyun }; 161*4882a593Smuzhiyun 162*4882a593Smuzhiyun front-memory { 163*4882a593Smuzhiyun label = "front-memory"; 164*4882a593Smuzhiyun gpios = <&gpio ASPEED_GPIO(F, 4) GPIO_ACTIVE_LOW>; 165*4882a593Smuzhiyun }; 166*4882a593Smuzhiyun 167*4882a593Smuzhiyun front-syshot { 168*4882a593Smuzhiyun label = "front-syshot"; 169*4882a593Smuzhiyun gpios = <&gpio ASPEED_GPIO(I, 1) GPIO_ACTIVE_LOW>; 170*4882a593Smuzhiyun }; 171*4882a593Smuzhiyun 172*4882a593Smuzhiyun front-syshealth { 173*4882a593Smuzhiyun label = "front-syshealth"; 174*4882a593Smuzhiyun gpios = <&gpio ASPEED_GPIO(I, 0) GPIO_ACTIVE_LOW>; 175*4882a593Smuzhiyun }; 176*4882a593Smuzhiyun 177*4882a593Smuzhiyun front-fan { 178*4882a593Smuzhiyun label = "front-fan"; 179*4882a593Smuzhiyun gpios = <&gpio ASPEED_GPIO(H, 4) GPIO_ACTIVE_LOW>; 180*4882a593Smuzhiyun }; 181*4882a593Smuzhiyun 182*4882a593Smuzhiyun front-psu { 183*4882a593Smuzhiyun label = "front-psu"; 184*4882a593Smuzhiyun gpios = <&gpio ASPEED_GPIO(B, 2) GPIO_ACTIVE_LOW>; 185*4882a593Smuzhiyun }; 186*4882a593Smuzhiyun 187*4882a593Smuzhiyun identify { 188*4882a593Smuzhiyun label = "identify"; 189*4882a593Smuzhiyun gpios = <&gpio ASPEED_GPIO(Z, 7) GPIO_ACTIVE_LOW>; 190*4882a593Smuzhiyun }; 191*4882a593Smuzhiyun }; 192*4882a593Smuzhiyun 193*4882a593Smuzhiyun iio-hwmon-battery { 194*4882a593Smuzhiyun compatible = "iio-hwmon"; 195*4882a593Smuzhiyun io-channels = <&adc 15>; 196*4882a593Smuzhiyun }; 197*4882a593Smuzhiyun 198*4882a593Smuzhiyun iio-hwmon { 199*4882a593Smuzhiyun compatible = "iio-hwmon"; 200*4882a593Smuzhiyun io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>, <&adc 4>, 201*4882a593Smuzhiyun <&adc 5>, <&adc 6>, <&adc 7>, <&adc 8>, <&adc 9>, 202*4882a593Smuzhiyun <&adc 10>, <&adc 11>, <&adc 12>, <&adc 13>, <&adc 14>; 203*4882a593Smuzhiyun }; 204*4882a593Smuzhiyun 205*4882a593Smuzhiyun}; 206*4882a593Smuzhiyun 207*4882a593Smuzhiyun&fmc { 208*4882a593Smuzhiyun status = "okay"; 209*4882a593Smuzhiyun 210*4882a593Smuzhiyun flash@0 { 211*4882a593Smuzhiyun status = "okay"; 212*4882a593Smuzhiyun label = "bmc"; 213*4882a593Smuzhiyun m25p,fast-read; 214*4882a593Smuzhiyun spi-max-frequency = <50000000>; 215*4882a593Smuzhiyun#include "openbmc-flash-layout.dtsi" 216*4882a593Smuzhiyun }; 217*4882a593Smuzhiyun}; 218*4882a593Smuzhiyun 219*4882a593Smuzhiyun&spi1 { 220*4882a593Smuzhiyun status = "okay"; 221*4882a593Smuzhiyun pinctrl-names = "default"; 222*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_spi1_default>; 223*4882a593Smuzhiyun 224*4882a593Smuzhiyun flash@0 { 225*4882a593Smuzhiyun status = "okay"; 226*4882a593Smuzhiyun label = "pnor"; 227*4882a593Smuzhiyun m25p,fast-read; 228*4882a593Smuzhiyun spi-max-frequency = <100000000>; 229*4882a593Smuzhiyun }; 230*4882a593Smuzhiyun}; 231*4882a593Smuzhiyun 232*4882a593Smuzhiyun&uart1 { 233*4882a593Smuzhiyun /* Rear RS-232 connector */ 234*4882a593Smuzhiyun status = "okay"; 235*4882a593Smuzhiyun pinctrl-names = "default"; 236*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_txd1_default 237*4882a593Smuzhiyun &pinctrl_rxd1_default 238*4882a593Smuzhiyun &pinctrl_nrts1_default 239*4882a593Smuzhiyun &pinctrl_ndtr1_default 240*4882a593Smuzhiyun &pinctrl_ndsr1_default 241*4882a593Smuzhiyun &pinctrl_ncts1_default 242*4882a593Smuzhiyun &pinctrl_ndcd1_default 243*4882a593Smuzhiyun &pinctrl_nri1_default>; 244*4882a593Smuzhiyun}; 245*4882a593Smuzhiyun 246*4882a593Smuzhiyun&uart2 { 247*4882a593Smuzhiyun /* Test Point */ 248*4882a593Smuzhiyun status = "okay"; 249*4882a593Smuzhiyun pinctrl-names = "default"; 250*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>; 251*4882a593Smuzhiyun}; 252*4882a593Smuzhiyun 253*4882a593Smuzhiyun&uart3 { 254*4882a593Smuzhiyun /* APSS */ 255*4882a593Smuzhiyun status = "okay"; 256*4882a593Smuzhiyun pinctrl-names = "default"; 257*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_txd3_default &pinctrl_rxd3_default>; 258*4882a593Smuzhiyun}; 259*4882a593Smuzhiyun 260*4882a593Smuzhiyun&uart5 { 261*4882a593Smuzhiyun status = "okay"; 262*4882a593Smuzhiyun}; 263*4882a593Smuzhiyun 264*4882a593Smuzhiyun&lpc_ctrl { 265*4882a593Smuzhiyun status = "okay"; 266*4882a593Smuzhiyun memory-region = <&flash_memory>; 267*4882a593Smuzhiyun flash = <&spi1>; 268*4882a593Smuzhiyun}; 269*4882a593Smuzhiyun 270*4882a593Smuzhiyun&mac0 { 271*4882a593Smuzhiyun status = "okay"; 272*4882a593Smuzhiyun pinctrl-names = "default"; 273*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_rmii1_default>; 274*4882a593Smuzhiyun clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>, 275*4882a593Smuzhiyun <&syscon ASPEED_CLK_MAC1RCLK>; 276*4882a593Smuzhiyun clock-names = "MACCLK", "RCLK"; 277*4882a593Smuzhiyun use-ncsi; 278*4882a593Smuzhiyun}; 279*4882a593Smuzhiyun 280*4882a593Smuzhiyun&mac1 { 281*4882a593Smuzhiyun status = "okay"; 282*4882a593Smuzhiyun pinctrl-names = "default"; 283*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>; 284*4882a593Smuzhiyun}; 285*4882a593Smuzhiyun 286*4882a593Smuzhiyun&i2c0 { 287*4882a593Smuzhiyun /* LCD */ 288*4882a593Smuzhiyun status = "okay"; 289*4882a593Smuzhiyun}; 290*4882a593Smuzhiyun 291*4882a593Smuzhiyun&i2c1 { 292*4882a593Smuzhiyun status = "okay"; 293*4882a593Smuzhiyun 294*4882a593Smuzhiyun eeprom@50 { 295*4882a593Smuzhiyun compatible = "atmel,24c256"; 296*4882a593Smuzhiyun reg = <0x50>; 297*4882a593Smuzhiyun label = "fru"; 298*4882a593Smuzhiyun }; 299*4882a593Smuzhiyun 300*4882a593Smuzhiyun}; 301*4882a593Smuzhiyun 302*4882a593Smuzhiyun&i2c2 { 303*4882a593Smuzhiyun status = "okay"; 304*4882a593Smuzhiyun 305*4882a593Smuzhiyun tmp112@48 { 306*4882a593Smuzhiyun compatible = "ti,tmp112"; 307*4882a593Smuzhiyun reg = <0x48>; 308*4882a593Smuzhiyun label = "inlet"; 309*4882a593Smuzhiyun }; 310*4882a593Smuzhiyun 311*4882a593Smuzhiyun tmp112@49 { 312*4882a593Smuzhiyun compatible = "ti,tmp112"; 313*4882a593Smuzhiyun reg = <0x49>; 314*4882a593Smuzhiyun label = "outlet"; 315*4882a593Smuzhiyun }; 316*4882a593Smuzhiyun 317*4882a593Smuzhiyun i2c-switch@70 { 318*4882a593Smuzhiyun compatible = "nxp,pca9546"; 319*4882a593Smuzhiyun reg = <0x70>; 320*4882a593Smuzhiyun #address-cells = <1>; 321*4882a593Smuzhiyun #size-cells = <0>; 322*4882a593Smuzhiyun 323*4882a593Smuzhiyun i2c@0 { 324*4882a593Smuzhiyun #address-cells = <1>; 325*4882a593Smuzhiyun #size-cells = <0>; 326*4882a593Smuzhiyun reg = <0>; 327*4882a593Smuzhiyun 328*4882a593Smuzhiyun tmp112@4a { 329*4882a593Smuzhiyun compatible = "ti,tmp112"; 330*4882a593Smuzhiyun reg = <0x4a>; 331*4882a593Smuzhiyun label = "psu_inlet"; 332*4882a593Smuzhiyun }; 333*4882a593Smuzhiyun 334*4882a593Smuzhiyun }; 335*4882a593Smuzhiyun 336*4882a593Smuzhiyun i2c@1 { 337*4882a593Smuzhiyun #address-cells = <1>; 338*4882a593Smuzhiyun #size-cells = <0>; 339*4882a593Smuzhiyun reg = <1>; 340*4882a593Smuzhiyun 341*4882a593Smuzhiyun tmp112@4a { 342*4882a593Smuzhiyun compatible = "ti,tmp112"; 343*4882a593Smuzhiyun reg = <0x4a>; 344*4882a593Smuzhiyun label = "ocp_zone"; 345*4882a593Smuzhiyun }; 346*4882a593Smuzhiyun }; 347*4882a593Smuzhiyun 348*4882a593Smuzhiyun i2c@2 { 349*4882a593Smuzhiyun #address-cells = <1>; 350*4882a593Smuzhiyun #size-cells = <0>; 351*4882a593Smuzhiyun reg = <2>; 352*4882a593Smuzhiyun 353*4882a593Smuzhiyun tmp112@4a { 354*4882a593Smuzhiyun compatible = "ti,tmp112"; 355*4882a593Smuzhiyun reg = <0x4a>; 356*4882a593Smuzhiyun label = "bmc_zone"; 357*4882a593Smuzhiyun }; 358*4882a593Smuzhiyun }; 359*4882a593Smuzhiyun 360*4882a593Smuzhiyun i2c@3 { 361*4882a593Smuzhiyun #address-cells = <1>; 362*4882a593Smuzhiyun #size-cells = <0>; 363*4882a593Smuzhiyun reg = <3>; 364*4882a593Smuzhiyun 365*4882a593Smuzhiyun tmp112@7c { 366*4882a593Smuzhiyun compatible = "microchip,emc1413"; 367*4882a593Smuzhiyun reg = <0x7c>; 368*4882a593Smuzhiyun }; 369*4882a593Smuzhiyun }; 370*4882a593Smuzhiyun 371*4882a593Smuzhiyun }; 372*4882a593Smuzhiyun}; 373*4882a593Smuzhiyun 374*4882a593Smuzhiyun&i2c3 { 375*4882a593Smuzhiyun /* Riser Card */ 376*4882a593Smuzhiyun status = "okay"; 377*4882a593Smuzhiyun}; 378*4882a593Smuzhiyun 379*4882a593Smuzhiyun&i2c4 { 380*4882a593Smuzhiyun status = "okay"; 381*4882a593Smuzhiyun 382*4882a593Smuzhiyun rtc@68 { 383*4882a593Smuzhiyun compatible = "dallas,ds3232"; 384*4882a593Smuzhiyun reg = <0x68>; 385*4882a593Smuzhiyun }; 386*4882a593Smuzhiyun}; 387*4882a593Smuzhiyun 388*4882a593Smuzhiyun&i2c5 { 389*4882a593Smuzhiyun /* vr */ 390*4882a593Smuzhiyun status = "okay"; 391*4882a593Smuzhiyun}; 392*4882a593Smuzhiyun 393*4882a593Smuzhiyun&i2c6 { 394*4882a593Smuzhiyun /* bp card */ 395*4882a593Smuzhiyun status = "okay"; 396*4882a593Smuzhiyun}; 397*4882a593Smuzhiyun 398*4882a593Smuzhiyun&i2c7 { 399*4882a593Smuzhiyun status = "okay"; 400*4882a593Smuzhiyun 401*4882a593Smuzhiyun i2c-switch@70 { 402*4882a593Smuzhiyun compatible = "nxp,pca9546"; 403*4882a593Smuzhiyun reg = <0x70>; 404*4882a593Smuzhiyun #address-cells = <1>; 405*4882a593Smuzhiyun #size-cells = <0>; 406*4882a593Smuzhiyun 407*4882a593Smuzhiyun i2c@0 { 408*4882a593Smuzhiyun #address-cells = <1>; 409*4882a593Smuzhiyun #size-cells = <0>; 410*4882a593Smuzhiyun reg = <0>; 411*4882a593Smuzhiyun 412*4882a593Smuzhiyun adm1278@10 { 413*4882a593Smuzhiyun compatible = "adi,adm1278"; 414*4882a593Smuzhiyun reg = <0x10>; 415*4882a593Smuzhiyun }; 416*4882a593Smuzhiyun 417*4882a593Smuzhiyun adm1278@13 { 418*4882a593Smuzhiyun compatible = "adi,adm1278"; 419*4882a593Smuzhiyun reg = <0x13>; 420*4882a593Smuzhiyun }; 421*4882a593Smuzhiyun 422*4882a593Smuzhiyun adm1278@50 { 423*4882a593Smuzhiyun compatible = "adi,adm1278"; 424*4882a593Smuzhiyun reg = <0x50>; 425*4882a593Smuzhiyun }; 426*4882a593Smuzhiyun 427*4882a593Smuzhiyun adm1278@53 { 428*4882a593Smuzhiyun compatible = "adi,adm1278"; 429*4882a593Smuzhiyun reg = <0x53>; 430*4882a593Smuzhiyun }; 431*4882a593Smuzhiyun 432*4882a593Smuzhiyun }; 433*4882a593Smuzhiyun 434*4882a593Smuzhiyun /*pcie riser*/ 435*4882a593Smuzhiyun 436*4882a593Smuzhiyun }; 437*4882a593Smuzhiyun}; 438*4882a593Smuzhiyun 439*4882a593Smuzhiyun&i2c8 { 440*4882a593Smuzhiyun status = "okay"; 441*4882a593Smuzhiyun 442*4882a593Smuzhiyun pca0: pca9555@20 { 443*4882a593Smuzhiyun compatible = "nxp,pca9555"; 444*4882a593Smuzhiyun reg = <0x20>; 445*4882a593Smuzhiyun #address-cells = <1>; 446*4882a593Smuzhiyun #size-cells = <0>; 447*4882a593Smuzhiyun 448*4882a593Smuzhiyun gpio-controller; 449*4882a593Smuzhiyun #gpio-cells = <2>; 450*4882a593Smuzhiyun 451*4882a593Smuzhiyun gpio@0 { 452*4882a593Smuzhiyun reg = <0>; 453*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 454*4882a593Smuzhiyun }; 455*4882a593Smuzhiyun 456*4882a593Smuzhiyun gpio@1 { 457*4882a593Smuzhiyun reg = <1>; 458*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 459*4882a593Smuzhiyun }; 460*4882a593Smuzhiyun 461*4882a593Smuzhiyun gpio@2 { 462*4882a593Smuzhiyun reg = <2>; 463*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 464*4882a593Smuzhiyun }; 465*4882a593Smuzhiyun 466*4882a593Smuzhiyun gpio@3 { 467*4882a593Smuzhiyun reg = <3>; 468*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 469*4882a593Smuzhiyun }; 470*4882a593Smuzhiyun 471*4882a593Smuzhiyun gpio@4 { 472*4882a593Smuzhiyun reg = <4>; 473*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 474*4882a593Smuzhiyun }; 475*4882a593Smuzhiyun 476*4882a593Smuzhiyun gpio@5 { 477*4882a593Smuzhiyun reg = <5>; 478*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 479*4882a593Smuzhiyun }; 480*4882a593Smuzhiyun 481*4882a593Smuzhiyun gpio@6 { 482*4882a593Smuzhiyun reg = <6>; 483*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 484*4882a593Smuzhiyun }; 485*4882a593Smuzhiyun 486*4882a593Smuzhiyun gpio@7 { 487*4882a593Smuzhiyun reg = <7>; 488*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 489*4882a593Smuzhiyun }; 490*4882a593Smuzhiyun 491*4882a593Smuzhiyun }; 492*4882a593Smuzhiyun 493*4882a593Smuzhiyun pca1: pca9555@21 { 494*4882a593Smuzhiyun compatible = "nxp,pca9555"; 495*4882a593Smuzhiyun reg = <0x21>; 496*4882a593Smuzhiyun #address-cells = <1>; 497*4882a593Smuzhiyun #size-cells = <0>; 498*4882a593Smuzhiyun 499*4882a593Smuzhiyun gpio-controller; 500*4882a593Smuzhiyun #gpio-cells = <2>; 501*4882a593Smuzhiyun 502*4882a593Smuzhiyun gpio@0 { 503*4882a593Smuzhiyun reg = <0>; 504*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 505*4882a593Smuzhiyun }; 506*4882a593Smuzhiyun 507*4882a593Smuzhiyun gpio@1 { 508*4882a593Smuzhiyun reg = <1>; 509*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 510*4882a593Smuzhiyun }; 511*4882a593Smuzhiyun 512*4882a593Smuzhiyun gpio@2 { 513*4882a593Smuzhiyun reg = <2>; 514*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 515*4882a593Smuzhiyun }; 516*4882a593Smuzhiyun 517*4882a593Smuzhiyun gpio@3 { 518*4882a593Smuzhiyun reg = <3>; 519*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 520*4882a593Smuzhiyun }; 521*4882a593Smuzhiyun 522*4882a593Smuzhiyun gpio@4 { 523*4882a593Smuzhiyun reg = <4>; 524*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 525*4882a593Smuzhiyun }; 526*4882a593Smuzhiyun 527*4882a593Smuzhiyun gpio@5 { 528*4882a593Smuzhiyun reg = <5>; 529*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 530*4882a593Smuzhiyun }; 531*4882a593Smuzhiyun 532*4882a593Smuzhiyun gpio@6 { 533*4882a593Smuzhiyun reg = <6>; 534*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 535*4882a593Smuzhiyun }; 536*4882a593Smuzhiyun 537*4882a593Smuzhiyun gpio@7 { 538*4882a593Smuzhiyun reg = <7>; 539*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 540*4882a593Smuzhiyun }; 541*4882a593Smuzhiyun }; 542*4882a593Smuzhiyun 543*4882a593Smuzhiyun pca2: pca9555@22 { 544*4882a593Smuzhiyun compatible = "nxp,pca9555"; 545*4882a593Smuzhiyun reg = <0x22>; 546*4882a593Smuzhiyun #address-cells = <1>; 547*4882a593Smuzhiyun #size-cells = <0>; 548*4882a593Smuzhiyun 549*4882a593Smuzhiyun gpio-controller; 550*4882a593Smuzhiyun #gpio-cells = <2>; 551*4882a593Smuzhiyun 552*4882a593Smuzhiyun gpio@0 { 553*4882a593Smuzhiyun reg = <0>; 554*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 555*4882a593Smuzhiyun }; 556*4882a593Smuzhiyun 557*4882a593Smuzhiyun gpio@1 { 558*4882a593Smuzhiyun reg = <1>; 559*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 560*4882a593Smuzhiyun }; 561*4882a593Smuzhiyun 562*4882a593Smuzhiyun gpio@2 { 563*4882a593Smuzhiyun reg = <2>; 564*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 565*4882a593Smuzhiyun }; 566*4882a593Smuzhiyun 567*4882a593Smuzhiyun gpio@3 { 568*4882a593Smuzhiyun reg = <3>; 569*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 570*4882a593Smuzhiyun }; 571*4882a593Smuzhiyun 572*4882a593Smuzhiyun gpio@4 { 573*4882a593Smuzhiyun reg = <4>; 574*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 575*4882a593Smuzhiyun }; 576*4882a593Smuzhiyun 577*4882a593Smuzhiyun gpio@5 { 578*4882a593Smuzhiyun reg = <5>; 579*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 580*4882a593Smuzhiyun }; 581*4882a593Smuzhiyun 582*4882a593Smuzhiyun gpio@6 { 583*4882a593Smuzhiyun reg = <6>; 584*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 585*4882a593Smuzhiyun }; 586*4882a593Smuzhiyun 587*4882a593Smuzhiyun gpio@7 { 588*4882a593Smuzhiyun reg = <7>; 589*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 590*4882a593Smuzhiyun }; 591*4882a593Smuzhiyun }; 592*4882a593Smuzhiyun 593*4882a593Smuzhiyun pca3: pca9555@23 { 594*4882a593Smuzhiyun compatible = "nxp,pca9555"; 595*4882a593Smuzhiyun reg = <0x23>; 596*4882a593Smuzhiyun #address-cells = <1>; 597*4882a593Smuzhiyun #size-cells = <0>; 598*4882a593Smuzhiyun 599*4882a593Smuzhiyun gpio-controller; 600*4882a593Smuzhiyun #gpio-cells = <2>; 601*4882a593Smuzhiyun 602*4882a593Smuzhiyun gpio@0 { 603*4882a593Smuzhiyun reg = <0>; 604*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 605*4882a593Smuzhiyun }; 606*4882a593Smuzhiyun 607*4882a593Smuzhiyun gpio@1 { 608*4882a593Smuzhiyun reg = <1>; 609*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 610*4882a593Smuzhiyun }; 611*4882a593Smuzhiyun 612*4882a593Smuzhiyun gpio@2 { 613*4882a593Smuzhiyun reg = <2>; 614*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 615*4882a593Smuzhiyun }; 616*4882a593Smuzhiyun 617*4882a593Smuzhiyun gpio@3 { 618*4882a593Smuzhiyun reg = <3>; 619*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 620*4882a593Smuzhiyun }; 621*4882a593Smuzhiyun 622*4882a593Smuzhiyun gpio@4 { 623*4882a593Smuzhiyun reg = <4>; 624*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 625*4882a593Smuzhiyun }; 626*4882a593Smuzhiyun 627*4882a593Smuzhiyun gpio@5 { 628*4882a593Smuzhiyun reg = <5>; 629*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 630*4882a593Smuzhiyun }; 631*4882a593Smuzhiyun 632*4882a593Smuzhiyun gpio@6 { 633*4882a593Smuzhiyun reg = <6>; 634*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 635*4882a593Smuzhiyun }; 636*4882a593Smuzhiyun 637*4882a593Smuzhiyun gpio@7 { 638*4882a593Smuzhiyun reg = <7>; 639*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 640*4882a593Smuzhiyun }; 641*4882a593Smuzhiyun }; 642*4882a593Smuzhiyun 643*4882a593Smuzhiyun pca4: pca9555@24 { 644*4882a593Smuzhiyun compatible = "nxp,pca9555"; 645*4882a593Smuzhiyun reg = <0x24>; 646*4882a593Smuzhiyun #address-cells = <1>; 647*4882a593Smuzhiyun #size-cells = <0>; 648*4882a593Smuzhiyun 649*4882a593Smuzhiyun gpio-controller; 650*4882a593Smuzhiyun #gpio-cells = <2>; 651*4882a593Smuzhiyun 652*4882a593Smuzhiyun gpio@0 { 653*4882a593Smuzhiyun reg = <0>; 654*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 655*4882a593Smuzhiyun }; 656*4882a593Smuzhiyun 657*4882a593Smuzhiyun gpio@1 { 658*4882a593Smuzhiyun reg = <1>; 659*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 660*4882a593Smuzhiyun }; 661*4882a593Smuzhiyun 662*4882a593Smuzhiyun gpio@2 { 663*4882a593Smuzhiyun reg = <2>; 664*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 665*4882a593Smuzhiyun }; 666*4882a593Smuzhiyun 667*4882a593Smuzhiyun gpio@3 { 668*4882a593Smuzhiyun reg = <3>; 669*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 670*4882a593Smuzhiyun }; 671*4882a593Smuzhiyun 672*4882a593Smuzhiyun gpio@4 { 673*4882a593Smuzhiyun reg = <4>; 674*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 675*4882a593Smuzhiyun }; 676*4882a593Smuzhiyun 677*4882a593Smuzhiyun gpio@5 { 678*4882a593Smuzhiyun reg = <5>; 679*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 680*4882a593Smuzhiyun }; 681*4882a593Smuzhiyun 682*4882a593Smuzhiyun gpio@6 { 683*4882a593Smuzhiyun reg = <6>; 684*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 685*4882a593Smuzhiyun }; 686*4882a593Smuzhiyun 687*4882a593Smuzhiyun gpio@7 { 688*4882a593Smuzhiyun reg = <7>; 689*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 690*4882a593Smuzhiyun }; 691*4882a593Smuzhiyun }; 692*4882a593Smuzhiyun 693*4882a593Smuzhiyun pca5: pca9555@25 { 694*4882a593Smuzhiyun compatible = "nxp,pca9555"; 695*4882a593Smuzhiyun reg = <0x25>; 696*4882a593Smuzhiyun #address-cells = <1>; 697*4882a593Smuzhiyun #size-cells = <0>; 698*4882a593Smuzhiyun 699*4882a593Smuzhiyun gpio-controller; 700*4882a593Smuzhiyun #gpio-cells = <2>; 701*4882a593Smuzhiyun 702*4882a593Smuzhiyun gpio@0 { 703*4882a593Smuzhiyun reg = <0>; 704*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 705*4882a593Smuzhiyun }; 706*4882a593Smuzhiyun 707*4882a593Smuzhiyun gpio@1 { 708*4882a593Smuzhiyun reg = <1>; 709*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 710*4882a593Smuzhiyun }; 711*4882a593Smuzhiyun 712*4882a593Smuzhiyun gpio@2 { 713*4882a593Smuzhiyun reg = <2>; 714*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 715*4882a593Smuzhiyun }; 716*4882a593Smuzhiyun 717*4882a593Smuzhiyun gpio@3 { 718*4882a593Smuzhiyun reg = <3>; 719*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 720*4882a593Smuzhiyun }; 721*4882a593Smuzhiyun 722*4882a593Smuzhiyun gpio@4 { 723*4882a593Smuzhiyun reg = <4>; 724*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 725*4882a593Smuzhiyun }; 726*4882a593Smuzhiyun 727*4882a593Smuzhiyun gpio@5 { 728*4882a593Smuzhiyun reg = <5>; 729*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 730*4882a593Smuzhiyun }; 731*4882a593Smuzhiyun 732*4882a593Smuzhiyun gpio@6 { 733*4882a593Smuzhiyun reg = <6>; 734*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 735*4882a593Smuzhiyun }; 736*4882a593Smuzhiyun 737*4882a593Smuzhiyun gpio@7 { 738*4882a593Smuzhiyun reg = <7>; 739*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 740*4882a593Smuzhiyun }; 741*4882a593Smuzhiyun }; 742*4882a593Smuzhiyun 743*4882a593Smuzhiyun}; 744*4882a593Smuzhiyun 745*4882a593Smuzhiyun&i2c9 { 746*4882a593Smuzhiyun /* cpld */ 747*4882a593Smuzhiyun status = "okay"; 748*4882a593Smuzhiyun}; 749*4882a593Smuzhiyun 750*4882a593Smuzhiyun&i2c10 { 751*4882a593Smuzhiyun /* hdd bp */ 752*4882a593Smuzhiyun status = "okay"; 753*4882a593Smuzhiyun}; 754*4882a593Smuzhiyun 755*4882a593Smuzhiyun&i2c11 { 756*4882a593Smuzhiyun status = "okay"; 757*4882a593Smuzhiyun 758*4882a593Smuzhiyun power-supply@58 { 759*4882a593Smuzhiyun compatible = "pmbus"; 760*4882a593Smuzhiyun reg = <0x58>; 761*4882a593Smuzhiyun }; 762*4882a593Smuzhiyun 763*4882a593Smuzhiyun power-supply@59 { 764*4882a593Smuzhiyun compatible = "pmbus"; 765*4882a593Smuzhiyun reg = <0x59>; 766*4882a593Smuzhiyun }; 767*4882a593Smuzhiyun}; 768*4882a593Smuzhiyun 769*4882a593Smuzhiyun&i2c12 { 770*4882a593Smuzhiyun /* odcc */ 771*4882a593Smuzhiyun status = "okay"; 772*4882a593Smuzhiyun}; 773*4882a593Smuzhiyun 774*4882a593Smuzhiyun&vuart { 775*4882a593Smuzhiyun status = "okay"; 776*4882a593Smuzhiyun}; 777*4882a593Smuzhiyun 778*4882a593Smuzhiyun&gfx { 779*4882a593Smuzhiyun status = "okay"; 780*4882a593Smuzhiyun memory-region = <&gfx_memory>; 781*4882a593Smuzhiyun}; 782*4882a593Smuzhiyun 783*4882a593Smuzhiyun&pinctrl { 784*4882a593Smuzhiyun aspeed,external-nodes = <&gfx &lhc>; 785*4882a593Smuzhiyun}; 786*4882a593Smuzhiyun 787*4882a593Smuzhiyun&wdt1 { 788*4882a593Smuzhiyun aspeed,reset-type = "none"; 789*4882a593Smuzhiyun aspeed,external-signal; 790*4882a593Smuzhiyun aspeed,ext-push-pull; 791*4882a593Smuzhiyun aspeed,ext-active-high; 792*4882a593Smuzhiyun 793*4882a593Smuzhiyun pinctrl-names = "default"; 794*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_wdtrst1_default>; 795*4882a593Smuzhiyun}; 796*4882a593Smuzhiyun 797*4882a593Smuzhiyun&ibt { 798*4882a593Smuzhiyun status = "okay"; 799*4882a593Smuzhiyun 800*4882a593Smuzhiyun}; 801*4882a593Smuzhiyun 802*4882a593Smuzhiyun&adc { 803*4882a593Smuzhiyun status = "okay"; 804*4882a593Smuzhiyun pinctrl-names = "default"; 805*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_adc0_default &pinctrl_adc1_default 806*4882a593Smuzhiyun &pinctrl_adc2_default &pinctrl_adc3_default &pinctrl_adc4_default 807*4882a593Smuzhiyun &pinctrl_adc5_default &pinctrl_adc6_default &pinctrl_adc7_default 808*4882a593Smuzhiyun &pinctrl_adc8_default &pinctrl_adc9_default &pinctrl_adc10_default 809*4882a593Smuzhiyun &pinctrl_adc11_default &pinctrl_adc12_default &pinctrl_adc13_default 810*4882a593Smuzhiyun &pinctrl_adc14_default &pinctrl_adc15_default>; 811*4882a593Smuzhiyun}; 812*4882a593Smuzhiyun 813*4882a593Smuzhiyun&vhub { 814*4882a593Smuzhiyun status = "okay"; 815*4882a593Smuzhiyun}; 816*4882a593Smuzhiyun 817*4882a593Smuzhiyun&video { 818*4882a593Smuzhiyun status = "okay"; 819*4882a593Smuzhiyun memory-region = <&video_engine_memory>; 820*4882a593Smuzhiyun}; 821*4882a593Smuzhiyun 822*4882a593Smuzhiyun&pwm_tacho { 823*4882a593Smuzhiyun status = "okay"; 824*4882a593Smuzhiyun pinctrl-names = "default"; 825*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default 826*4882a593Smuzhiyun &pinctrl_pwm2_default &pinctrl_pwm3_default 827*4882a593Smuzhiyun &pinctrl_pwm4_default &pinctrl_pwm5_default 828*4882a593Smuzhiyun &pinctrl_pwm6_default &pinctrl_pwm7_default>; 829*4882a593Smuzhiyun 830*4882a593Smuzhiyun fan@0 { 831*4882a593Smuzhiyun reg = <0x00>; 832*4882a593Smuzhiyun aspeed,fan-tach-ch = /bits/ 8 <0x00 0x01>; 833*4882a593Smuzhiyun }; 834*4882a593Smuzhiyun 835*4882a593Smuzhiyun fan@1 { 836*4882a593Smuzhiyun reg = <0x01>; 837*4882a593Smuzhiyun aspeed,fan-tach-ch = /bits/ 8 <0x02 0x03>; 838*4882a593Smuzhiyun }; 839*4882a593Smuzhiyun 840*4882a593Smuzhiyun fan@2 { 841*4882a593Smuzhiyun reg = <0x02>; 842*4882a593Smuzhiyun aspeed,fan-tach-ch = /bits/ 8 <0x04 0x05>; 843*4882a593Smuzhiyun }; 844*4882a593Smuzhiyun 845*4882a593Smuzhiyun fan@3 { 846*4882a593Smuzhiyun reg = <0x03>; 847*4882a593Smuzhiyun aspeed,fan-tach-ch = /bits/ 8 <0x06 0x07>; 848*4882a593Smuzhiyun }; 849*4882a593Smuzhiyun 850*4882a593Smuzhiyun fan@4 { 851*4882a593Smuzhiyun reg = <0x04>; 852*4882a593Smuzhiyun aspeed,fan-tach-ch = /bits/ 8 <0x08 0x09>; 853*4882a593Smuzhiyun }; 854*4882a593Smuzhiyun 855*4882a593Smuzhiyun fan@5 { 856*4882a593Smuzhiyun reg = <0x05>; 857*4882a593Smuzhiyun aspeed,fan-tach-ch = /bits/ 8 <0x0a 0x0b>; 858*4882a593Smuzhiyun }; 859*4882a593Smuzhiyun 860*4882a593Smuzhiyun fan@6 { 861*4882a593Smuzhiyun reg = <0x06>; 862*4882a593Smuzhiyun aspeed,fan-tach-ch = /bits/ 8 <0x0c 0x0d>; 863*4882a593Smuzhiyun }; 864*4882a593Smuzhiyun 865*4882a593Smuzhiyun fan@7 { 866*4882a593Smuzhiyun reg = <0x07>; 867*4882a593Smuzhiyun aspeed,fan-tach-ch = /bits/ 8 <0x0e 0x0f>; 868*4882a593Smuzhiyun }; 869*4882a593Smuzhiyun 870*4882a593Smuzhiyun}; 871*4882a593Smuzhiyun 872*4882a593Smuzhiyun#include "ibm-power9-dual.dtsi" 873