1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-or-later 2*4882a593Smuzhiyun// Copyright 2019 IBM Corp. 3*4882a593Smuzhiyun/dts-v1/; 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun#include "aspeed-g6.dtsi" 6*4882a593Smuzhiyun#include <dt-bindings/gpio/aspeed-gpio.h> 7*4882a593Smuzhiyun#include <dt-bindings/i2c/i2c.h> 8*4882a593Smuzhiyun#include <dt-bindings/leds/leds-pca955x.h> 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun/ { 11*4882a593Smuzhiyun model = "Rainier"; 12*4882a593Smuzhiyun compatible = "ibm,rainier-bmc", "aspeed,ast2600"; 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun aliases { 15*4882a593Smuzhiyun serial4 = &uart5; 16*4882a593Smuzhiyun i2c16 = &i2c2mux0; 17*4882a593Smuzhiyun i2c17 = &i2c2mux1; 18*4882a593Smuzhiyun i2c18 = &i2c2mux2; 19*4882a593Smuzhiyun i2c19 = &i2c2mux3; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun spi10 = &cfam0_spi0; 22*4882a593Smuzhiyun spi11 = &cfam0_spi1; 23*4882a593Smuzhiyun spi12 = &cfam0_spi2; 24*4882a593Smuzhiyun spi13 = &cfam0_spi3; 25*4882a593Smuzhiyun spi20 = &cfam1_spi0; 26*4882a593Smuzhiyun spi21 = &cfam1_spi1; 27*4882a593Smuzhiyun spi22 = &cfam1_spi2; 28*4882a593Smuzhiyun spi23 = &cfam1_spi3; 29*4882a593Smuzhiyun spi30 = &cfam2_spi0; 30*4882a593Smuzhiyun spi31 = &cfam2_spi1; 31*4882a593Smuzhiyun spi32 = &cfam2_spi2; 32*4882a593Smuzhiyun spi33 = &cfam2_spi3; 33*4882a593Smuzhiyun }; 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun chosen { 36*4882a593Smuzhiyun stdout-path = &uart5; 37*4882a593Smuzhiyun bootargs = "console=ttyS4,115200n8"; 38*4882a593Smuzhiyun }; 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun memory@80000000 { 41*4882a593Smuzhiyun device_type = "memory"; 42*4882a593Smuzhiyun reg = <0x80000000 0x40000000>; 43*4882a593Smuzhiyun }; 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun reserved-memory { 46*4882a593Smuzhiyun #address-cells = <1>; 47*4882a593Smuzhiyun #size-cells = <1>; 48*4882a593Smuzhiyun ranges; 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun flash_memory: region@B8000000 { 51*4882a593Smuzhiyun no-map; 52*4882a593Smuzhiyun reg = <0xB8000000 0x04000000>; /* 64M */ 53*4882a593Smuzhiyun }; 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun vga_memory: region@bf000000 { 56*4882a593Smuzhiyun no-map; 57*4882a593Smuzhiyun compatible = "shared-dma-pool"; 58*4882a593Smuzhiyun reg = <0xbf000000 0x01000000>; /* 16M */ 59*4882a593Smuzhiyun }; 60*4882a593Smuzhiyun }; 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun gpio-keys { 63*4882a593Smuzhiyun compatible = "gpio-keys"; 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun ps0-presence { 66*4882a593Smuzhiyun label = "ps0-presence"; 67*4882a593Smuzhiyun gpios = <&gpio0 ASPEED_GPIO(S, 0) GPIO_ACTIVE_LOW>; 68*4882a593Smuzhiyun linux,code = <ASPEED_GPIO(S, 0)>; 69*4882a593Smuzhiyun }; 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun ps1-presence { 72*4882a593Smuzhiyun label = "ps1-presence"; 73*4882a593Smuzhiyun gpios = <&gpio0 ASPEED_GPIO(S, 1) GPIO_ACTIVE_LOW>; 74*4882a593Smuzhiyun linux,code = <ASPEED_GPIO(S, 1)>; 75*4882a593Smuzhiyun }; 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun ps2-presence { 78*4882a593Smuzhiyun label = "ps2-presence"; 79*4882a593Smuzhiyun gpios = <&gpio0 ASPEED_GPIO(S, 2) GPIO_ACTIVE_LOW>; 80*4882a593Smuzhiyun linux,code = <ASPEED_GPIO(S, 2)>; 81*4882a593Smuzhiyun }; 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun ps3-presence { 84*4882a593Smuzhiyun label = "ps3-presence"; 85*4882a593Smuzhiyun gpios = <&gpio0 ASPEED_GPIO(S, 3) GPIO_ACTIVE_LOW>; 86*4882a593Smuzhiyun linux,code = <ASPEED_GPIO(S, 3)>; 87*4882a593Smuzhiyun }; 88*4882a593Smuzhiyun }; 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun i2c2mux: i2cmux { 91*4882a593Smuzhiyun compatible = "i2c-mux-gpio"; 92*4882a593Smuzhiyun #address-cells = <1>; 93*4882a593Smuzhiyun #size-cells = <0>; 94*4882a593Smuzhiyun status = "okay"; 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun i2c-parent = <&i2c2>; 97*4882a593Smuzhiyun mux-gpios = <&gpio0 ASPEED_GPIO(G, 4) GPIO_ACTIVE_HIGH>, 98*4882a593Smuzhiyun <&gpio0 ASPEED_GPIO(G, 5) GPIO_ACTIVE_HIGH>; 99*4882a593Smuzhiyun idle-state = <0>; 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun i2c2mux0: i2c@0 { 102*4882a593Smuzhiyun #address-cells = <1>; 103*4882a593Smuzhiyun #size-cells = <0>; 104*4882a593Smuzhiyun reg = <0>; 105*4882a593Smuzhiyun }; 106*4882a593Smuzhiyun 107*4882a593Smuzhiyun i2c2mux1: i2c@1 { 108*4882a593Smuzhiyun #address-cells = <1>; 109*4882a593Smuzhiyun #size-cells = <0>; 110*4882a593Smuzhiyun reg = <1>; 111*4882a593Smuzhiyun }; 112*4882a593Smuzhiyun 113*4882a593Smuzhiyun i2c2mux2: i2c@2 { 114*4882a593Smuzhiyun #address-cells = <1>; 115*4882a593Smuzhiyun #size-cells = <0>; 116*4882a593Smuzhiyun reg = <2>; 117*4882a593Smuzhiyun }; 118*4882a593Smuzhiyun 119*4882a593Smuzhiyun i2c2mux3: i2c@3 { 120*4882a593Smuzhiyun #address-cells = <1>; 121*4882a593Smuzhiyun #size-cells = <0>; 122*4882a593Smuzhiyun reg = <3>; 123*4882a593Smuzhiyun }; 124*4882a593Smuzhiyun }; 125*4882a593Smuzhiyun}; 126*4882a593Smuzhiyun 127*4882a593Smuzhiyun&ehci1 { 128*4882a593Smuzhiyun status = "okay"; 129*4882a593Smuzhiyun}; 130*4882a593Smuzhiyun 131*4882a593Smuzhiyun&gpio0 { 132*4882a593Smuzhiyun gpio-line-names = 133*4882a593Smuzhiyun /*A0-A7*/ "","","","","","","","", 134*4882a593Smuzhiyun /*B0-B7*/ "","","","","","","checkstop","", 135*4882a593Smuzhiyun /*C0-C7*/ "","","","","","","","", 136*4882a593Smuzhiyun /*D0-D7*/ "","","","","","","","", 137*4882a593Smuzhiyun /*E0-E7*/ "","","","","","","","", 138*4882a593Smuzhiyun /*F0-F7*/ "","","","","","","","", 139*4882a593Smuzhiyun /*G0-G7*/ "","","","","","","","", 140*4882a593Smuzhiyun /*H0-H7*/ "","","","","","","","", 141*4882a593Smuzhiyun /*I0-I7*/ "","","","","","","","", 142*4882a593Smuzhiyun /*J0-J7*/ "","","","","","","","", 143*4882a593Smuzhiyun /*K0-K7*/ "","","","","","","","", 144*4882a593Smuzhiyun /*L0-L7*/ "","","","","","","","", 145*4882a593Smuzhiyun /*M0-M7*/ "","","","","","","","", 146*4882a593Smuzhiyun /*N0-N7*/ "","","","","","","","", 147*4882a593Smuzhiyun /*O0-O7*/ "","","","usb-power","","","","", 148*4882a593Smuzhiyun /*P0-P7*/ "","","","","","","","", 149*4882a593Smuzhiyun /*Q0-Q7*/ "cfam-reset","","","","","","","", 150*4882a593Smuzhiyun /*R0-R7*/ "","","","","","","","", 151*4882a593Smuzhiyun /*S0-S7*/ "presence-ps0","presence-ps1","presence-ps2","presence-ps3", 152*4882a593Smuzhiyun "","","","", 153*4882a593Smuzhiyun /*T0-T7*/ "","","","","","","","", 154*4882a593Smuzhiyun /*U0-U7*/ "","","","","","","","", 155*4882a593Smuzhiyun /*V0-V7*/ "","","","","","","","", 156*4882a593Smuzhiyun /*W0-W7*/ "","","","","","","","", 157*4882a593Smuzhiyun /*X0-X7*/ "","","","","","","","", 158*4882a593Smuzhiyun /*Y0-Y7*/ "","","","","","","","", 159*4882a593Smuzhiyun /*Z0-Z7*/ "","","","","","","",""; 160*4882a593Smuzhiyun 161*4882a593Smuzhiyun pin_mclr_vpp { 162*4882a593Smuzhiyun gpio-hog; 163*4882a593Smuzhiyun gpios = <ASPEED_GPIO(P, 7) GPIO_OPEN_DRAIN>; 164*4882a593Smuzhiyun output-high; 165*4882a593Smuzhiyun line-name = "mclr_vpp"; 166*4882a593Smuzhiyun }; 167*4882a593Smuzhiyun 168*4882a593Smuzhiyun i2c3_mux_oe_n { 169*4882a593Smuzhiyun gpio-hog; 170*4882a593Smuzhiyun gpios = <ASPEED_GPIO(G, 6) GPIO_ACTIVE_LOW>; 171*4882a593Smuzhiyun output-high; 172*4882a593Smuzhiyun line-name = "I2C3_MUX_OE_N"; 173*4882a593Smuzhiyun }; 174*4882a593Smuzhiyun}; 175*4882a593Smuzhiyun 176*4882a593Smuzhiyun&emmc_controller { 177*4882a593Smuzhiyun status = "okay"; 178*4882a593Smuzhiyun}; 179*4882a593Smuzhiyun 180*4882a593Smuzhiyun&pinctrl_emmc_default { 181*4882a593Smuzhiyun bias-disable; 182*4882a593Smuzhiyun}; 183*4882a593Smuzhiyun 184*4882a593Smuzhiyun&emmc { 185*4882a593Smuzhiyun status = "okay"; 186*4882a593Smuzhiyun}; 187*4882a593Smuzhiyun 188*4882a593Smuzhiyun&fsim0 { 189*4882a593Smuzhiyun status = "okay"; 190*4882a593Smuzhiyun 191*4882a593Smuzhiyun #address-cells = <2>; 192*4882a593Smuzhiyun #size-cells = <0>; 193*4882a593Smuzhiyun 194*4882a593Smuzhiyun /* 195*4882a593Smuzhiyun * CFAM Reset is supposed to be active low but pass1 hardware is wired 196*4882a593Smuzhiyun * active high. 197*4882a593Smuzhiyun */ 198*4882a593Smuzhiyun cfam-reset-gpios = <&gpio0 ASPEED_GPIO(Q, 0) GPIO_ACTIVE_HIGH>; 199*4882a593Smuzhiyun 200*4882a593Smuzhiyun cfam@0,0 { 201*4882a593Smuzhiyun reg = <0 0>; 202*4882a593Smuzhiyun #address-cells = <1>; 203*4882a593Smuzhiyun #size-cells = <1>; 204*4882a593Smuzhiyun chip-id = <0>; 205*4882a593Smuzhiyun 206*4882a593Smuzhiyun scom@1000 { 207*4882a593Smuzhiyun compatible = "ibm,fsi2pib"; 208*4882a593Smuzhiyun reg = <0x1000 0x400>; 209*4882a593Smuzhiyun }; 210*4882a593Smuzhiyun 211*4882a593Smuzhiyun i2c@1800 { 212*4882a593Smuzhiyun compatible = "ibm,fsi-i2c-master"; 213*4882a593Smuzhiyun reg = <0x1800 0x400>; 214*4882a593Smuzhiyun #address-cells = <1>; 215*4882a593Smuzhiyun #size-cells = <0>; 216*4882a593Smuzhiyun }; 217*4882a593Smuzhiyun 218*4882a593Smuzhiyun fsi2spi@1c00 { 219*4882a593Smuzhiyun compatible = "ibm,fsi2spi"; 220*4882a593Smuzhiyun reg = <0x1c00 0x400>; 221*4882a593Smuzhiyun #address-cells = <1>; 222*4882a593Smuzhiyun #size-cells = <0>; 223*4882a593Smuzhiyun 224*4882a593Smuzhiyun cfam0_spi0: spi@0 { 225*4882a593Smuzhiyun reg = <0x0>; 226*4882a593Smuzhiyun #address-cells = <1>; 227*4882a593Smuzhiyun #size-cells = <0>; 228*4882a593Smuzhiyun 229*4882a593Smuzhiyun eeprom@0 { 230*4882a593Smuzhiyun at25,byte-len = <0x80000>; 231*4882a593Smuzhiyun at25,addr-mode = <4>; 232*4882a593Smuzhiyun at25,page-size = <256>; 233*4882a593Smuzhiyun 234*4882a593Smuzhiyun compatible = "atmel,at25"; 235*4882a593Smuzhiyun reg = <0>; 236*4882a593Smuzhiyun spi-max-frequency = <1000000>; 237*4882a593Smuzhiyun }; 238*4882a593Smuzhiyun }; 239*4882a593Smuzhiyun 240*4882a593Smuzhiyun cfam0_spi1: spi@20 { 241*4882a593Smuzhiyun reg = <0x20>; 242*4882a593Smuzhiyun #address-cells = <1>; 243*4882a593Smuzhiyun #size-cells = <0>; 244*4882a593Smuzhiyun 245*4882a593Smuzhiyun eeprom@0 { 246*4882a593Smuzhiyun at25,byte-len = <0x80000>; 247*4882a593Smuzhiyun at25,addr-mode = <4>; 248*4882a593Smuzhiyun at25,page-size = <256>; 249*4882a593Smuzhiyun 250*4882a593Smuzhiyun compatible = "atmel,at25"; 251*4882a593Smuzhiyun reg = <0>; 252*4882a593Smuzhiyun spi-max-frequency = <1000000>; 253*4882a593Smuzhiyun }; 254*4882a593Smuzhiyun }; 255*4882a593Smuzhiyun 256*4882a593Smuzhiyun cfam0_spi2: spi@40 { 257*4882a593Smuzhiyun reg = <0x40>; 258*4882a593Smuzhiyun #address-cells = <1>; 259*4882a593Smuzhiyun #size-cells = <0>; 260*4882a593Smuzhiyun 261*4882a593Smuzhiyun eeprom@0 { 262*4882a593Smuzhiyun at25,byte-len = <0x80000>; 263*4882a593Smuzhiyun at25,addr-mode = <4>; 264*4882a593Smuzhiyun at25,page-size = <256>; 265*4882a593Smuzhiyun 266*4882a593Smuzhiyun compatible = "atmel,at25"; 267*4882a593Smuzhiyun reg = <0>; 268*4882a593Smuzhiyun spi-max-frequency = <1000000>; 269*4882a593Smuzhiyun }; 270*4882a593Smuzhiyun }; 271*4882a593Smuzhiyun 272*4882a593Smuzhiyun cfam0_spi3: spi@60 { 273*4882a593Smuzhiyun reg = <0x60>; 274*4882a593Smuzhiyun #address-cells = <1>; 275*4882a593Smuzhiyun #size-cells = <0>; 276*4882a593Smuzhiyun 277*4882a593Smuzhiyun eeprom@0 { 278*4882a593Smuzhiyun at25,byte-len = <0x80000>; 279*4882a593Smuzhiyun at25,addr-mode = <4>; 280*4882a593Smuzhiyun at25,page-size = <256>; 281*4882a593Smuzhiyun 282*4882a593Smuzhiyun compatible = "atmel,at25"; 283*4882a593Smuzhiyun reg = <0>; 284*4882a593Smuzhiyun spi-max-frequency = <1000000>; 285*4882a593Smuzhiyun }; 286*4882a593Smuzhiyun }; 287*4882a593Smuzhiyun }; 288*4882a593Smuzhiyun 289*4882a593Smuzhiyun sbefifo@2400 { 290*4882a593Smuzhiyun compatible = "ibm,p9-sbefifo"; 291*4882a593Smuzhiyun reg = <0x2400 0x400>; 292*4882a593Smuzhiyun #address-cells = <1>; 293*4882a593Smuzhiyun #size-cells = <0>; 294*4882a593Smuzhiyun 295*4882a593Smuzhiyun fsi_occ0: occ { 296*4882a593Smuzhiyun compatible = "ibm,p10-occ"; 297*4882a593Smuzhiyun }; 298*4882a593Smuzhiyun }; 299*4882a593Smuzhiyun 300*4882a593Smuzhiyun fsi_hub0: hub@3400 { 301*4882a593Smuzhiyun compatible = "fsi-master-hub"; 302*4882a593Smuzhiyun reg = <0x3400 0x400>; 303*4882a593Smuzhiyun #address-cells = <2>; 304*4882a593Smuzhiyun #size-cells = <0>; 305*4882a593Smuzhiyun 306*4882a593Smuzhiyun no-scan-on-init; 307*4882a593Smuzhiyun }; 308*4882a593Smuzhiyun }; 309*4882a593Smuzhiyun}; 310*4882a593Smuzhiyun 311*4882a593Smuzhiyun&fsi_hub0 { 312*4882a593Smuzhiyun cfam@1,0 { 313*4882a593Smuzhiyun reg = <1 0>; 314*4882a593Smuzhiyun #address-cells = <1>; 315*4882a593Smuzhiyun #size-cells = <1>; 316*4882a593Smuzhiyun chip-id = <1>; 317*4882a593Smuzhiyun 318*4882a593Smuzhiyun scom@1000 { 319*4882a593Smuzhiyun compatible = "ibm,fsi2pib"; 320*4882a593Smuzhiyun reg = <0x1000 0x400>; 321*4882a593Smuzhiyun }; 322*4882a593Smuzhiyun 323*4882a593Smuzhiyun i2c@1800 { 324*4882a593Smuzhiyun compatible = "ibm,fsi-i2c-master"; 325*4882a593Smuzhiyun reg = <0x1800 0x400>; 326*4882a593Smuzhiyun #address-cells = <1>; 327*4882a593Smuzhiyun #size-cells = <0>; 328*4882a593Smuzhiyun }; 329*4882a593Smuzhiyun 330*4882a593Smuzhiyun fsi2spi@1c00 { 331*4882a593Smuzhiyun compatible = "ibm,fsi2spi"; 332*4882a593Smuzhiyun reg = <0x1c00 0x400>; 333*4882a593Smuzhiyun #address-cells = <1>; 334*4882a593Smuzhiyun #size-cells = <0>; 335*4882a593Smuzhiyun 336*4882a593Smuzhiyun cfam1_spi0: spi@0 { 337*4882a593Smuzhiyun reg = <0x0>; 338*4882a593Smuzhiyun #address-cells = <1>; 339*4882a593Smuzhiyun #size-cells = <0>; 340*4882a593Smuzhiyun 341*4882a593Smuzhiyun eeprom@0 { 342*4882a593Smuzhiyun at25,byte-len = <0x80000>; 343*4882a593Smuzhiyun at25,addr-mode = <4>; 344*4882a593Smuzhiyun at25,page-size = <256>; 345*4882a593Smuzhiyun 346*4882a593Smuzhiyun compatible = "atmel,at25"; 347*4882a593Smuzhiyun reg = <0>; 348*4882a593Smuzhiyun spi-max-frequency = <1000000>; 349*4882a593Smuzhiyun }; 350*4882a593Smuzhiyun }; 351*4882a593Smuzhiyun 352*4882a593Smuzhiyun cfam1_spi1: spi@20 { 353*4882a593Smuzhiyun reg = <0x20>; 354*4882a593Smuzhiyun #address-cells = <1>; 355*4882a593Smuzhiyun #size-cells = <0>; 356*4882a593Smuzhiyun 357*4882a593Smuzhiyun eeprom@0 { 358*4882a593Smuzhiyun at25,byte-len = <0x80000>; 359*4882a593Smuzhiyun at25,addr-mode = <4>; 360*4882a593Smuzhiyun at25,page-size = <256>; 361*4882a593Smuzhiyun 362*4882a593Smuzhiyun compatible = "atmel,at25"; 363*4882a593Smuzhiyun reg = <0>; 364*4882a593Smuzhiyun spi-max-frequency = <1000000>; 365*4882a593Smuzhiyun }; 366*4882a593Smuzhiyun }; 367*4882a593Smuzhiyun 368*4882a593Smuzhiyun cfam1_spi2: spi@40 { 369*4882a593Smuzhiyun reg = <0x40>; 370*4882a593Smuzhiyun #address-cells = <1>; 371*4882a593Smuzhiyun #size-cells = <0>; 372*4882a593Smuzhiyun 373*4882a593Smuzhiyun eeprom@0 { 374*4882a593Smuzhiyun at25,byte-len = <0x80000>; 375*4882a593Smuzhiyun at25,addr-mode = <4>; 376*4882a593Smuzhiyun at25,page-size = <256>; 377*4882a593Smuzhiyun 378*4882a593Smuzhiyun compatible = "atmel,at25"; 379*4882a593Smuzhiyun reg = <0>; 380*4882a593Smuzhiyun spi-max-frequency = <1000000>; 381*4882a593Smuzhiyun }; 382*4882a593Smuzhiyun }; 383*4882a593Smuzhiyun 384*4882a593Smuzhiyun cfam1_spi3: spi@60 { 385*4882a593Smuzhiyun reg = <0x60>; 386*4882a593Smuzhiyun #address-cells = <1>; 387*4882a593Smuzhiyun #size-cells = <0>; 388*4882a593Smuzhiyun 389*4882a593Smuzhiyun eeprom@0 { 390*4882a593Smuzhiyun at25,byte-len = <0x80000>; 391*4882a593Smuzhiyun at25,addr-mode = <4>; 392*4882a593Smuzhiyun at25,page-size = <256>; 393*4882a593Smuzhiyun 394*4882a593Smuzhiyun compatible = "atmel,at25"; 395*4882a593Smuzhiyun reg = <0>; 396*4882a593Smuzhiyun spi-max-frequency = <1000000>; 397*4882a593Smuzhiyun }; 398*4882a593Smuzhiyun }; 399*4882a593Smuzhiyun }; 400*4882a593Smuzhiyun 401*4882a593Smuzhiyun sbefifo@2400 { 402*4882a593Smuzhiyun compatible = "ibm,p9-sbefifo"; 403*4882a593Smuzhiyun reg = <0x2400 0x400>; 404*4882a593Smuzhiyun #address-cells = <1>; 405*4882a593Smuzhiyun #size-cells = <0>; 406*4882a593Smuzhiyun 407*4882a593Smuzhiyun fsi_occ1: occ { 408*4882a593Smuzhiyun compatible = "ibm,p10-occ"; 409*4882a593Smuzhiyun }; 410*4882a593Smuzhiyun }; 411*4882a593Smuzhiyun 412*4882a593Smuzhiyun fsi_hub1: hub@3400 { 413*4882a593Smuzhiyun compatible = "fsi-master-hub"; 414*4882a593Smuzhiyun reg = <0x3400 0x400>; 415*4882a593Smuzhiyun #address-cells = <2>; 416*4882a593Smuzhiyun #size-cells = <0>; 417*4882a593Smuzhiyun 418*4882a593Smuzhiyun no-scan-on-init; 419*4882a593Smuzhiyun }; 420*4882a593Smuzhiyun }; 421*4882a593Smuzhiyun 422*4882a593Smuzhiyun cfam@2,0 { 423*4882a593Smuzhiyun reg = <2 0>; 424*4882a593Smuzhiyun #address-cells = <1>; 425*4882a593Smuzhiyun #size-cells = <1>; 426*4882a593Smuzhiyun chip-id = <2>; 427*4882a593Smuzhiyun 428*4882a593Smuzhiyun scom@1000 { 429*4882a593Smuzhiyun compatible = "ibm,fsi2pib"; 430*4882a593Smuzhiyun reg = <0x1000 0x400>; 431*4882a593Smuzhiyun }; 432*4882a593Smuzhiyun 433*4882a593Smuzhiyun i2c@1800 { 434*4882a593Smuzhiyun compatible = "ibm,fsi-i2c-master"; 435*4882a593Smuzhiyun reg = <0x1800 0x400>; 436*4882a593Smuzhiyun #address-cells = <1>; 437*4882a593Smuzhiyun #size-cells = <0>; 438*4882a593Smuzhiyun }; 439*4882a593Smuzhiyun 440*4882a593Smuzhiyun fsi2spi@1c00 { 441*4882a593Smuzhiyun compatible = "ibm,fsi2spi"; 442*4882a593Smuzhiyun reg = <0x1c00 0x400>; 443*4882a593Smuzhiyun #address-cells = <1>; 444*4882a593Smuzhiyun #size-cells = <0>; 445*4882a593Smuzhiyun 446*4882a593Smuzhiyun cfam2_spi0: spi@0 { 447*4882a593Smuzhiyun reg = <0x0>; 448*4882a593Smuzhiyun #address-cells = <1>; 449*4882a593Smuzhiyun #size-cells = <0>; 450*4882a593Smuzhiyun 451*4882a593Smuzhiyun eeprom@0 { 452*4882a593Smuzhiyun at25,byte-len = <0x80000>; 453*4882a593Smuzhiyun at25,addr-mode = <4>; 454*4882a593Smuzhiyun at25,page-size = <256>; 455*4882a593Smuzhiyun 456*4882a593Smuzhiyun compatible = "atmel,at25"; 457*4882a593Smuzhiyun reg = <0>; 458*4882a593Smuzhiyun spi-max-frequency = <1000000>; 459*4882a593Smuzhiyun }; 460*4882a593Smuzhiyun }; 461*4882a593Smuzhiyun 462*4882a593Smuzhiyun cfam2_spi1: spi@20 { 463*4882a593Smuzhiyun reg = <0x20>; 464*4882a593Smuzhiyun #address-cells = <1>; 465*4882a593Smuzhiyun #size-cells = <0>; 466*4882a593Smuzhiyun 467*4882a593Smuzhiyun eeprom@0 { 468*4882a593Smuzhiyun at25,byte-len = <0x80000>; 469*4882a593Smuzhiyun at25,addr-mode = <4>; 470*4882a593Smuzhiyun at25,page-size = <256>; 471*4882a593Smuzhiyun 472*4882a593Smuzhiyun compatible = "atmel,at25"; 473*4882a593Smuzhiyun reg = <0>; 474*4882a593Smuzhiyun spi-max-frequency = <1000000>; 475*4882a593Smuzhiyun }; 476*4882a593Smuzhiyun }; 477*4882a593Smuzhiyun 478*4882a593Smuzhiyun cfam2_spi2: spi@40 { 479*4882a593Smuzhiyun reg = <0x40>; 480*4882a593Smuzhiyun #address-cells = <1>; 481*4882a593Smuzhiyun #size-cells = <0>; 482*4882a593Smuzhiyun 483*4882a593Smuzhiyun eeprom@0 { 484*4882a593Smuzhiyun at25,byte-len = <0x80000>; 485*4882a593Smuzhiyun at25,addr-mode = <4>; 486*4882a593Smuzhiyun at25,page-size = <256>; 487*4882a593Smuzhiyun 488*4882a593Smuzhiyun compatible = "atmel,at25"; 489*4882a593Smuzhiyun reg = <0>; 490*4882a593Smuzhiyun spi-max-frequency = <1000000>; 491*4882a593Smuzhiyun }; 492*4882a593Smuzhiyun }; 493*4882a593Smuzhiyun 494*4882a593Smuzhiyun cfam2_spi3: spi@60 { 495*4882a593Smuzhiyun reg = <0x60>; 496*4882a593Smuzhiyun #address-cells = <1>; 497*4882a593Smuzhiyun #size-cells = <0>; 498*4882a593Smuzhiyun 499*4882a593Smuzhiyun eeprom@0 { 500*4882a593Smuzhiyun at25,byte-len = <0x80000>; 501*4882a593Smuzhiyun at25,addr-mode = <4>; 502*4882a593Smuzhiyun at25,page-size = <256>; 503*4882a593Smuzhiyun 504*4882a593Smuzhiyun compatible = "atmel,at25"; 505*4882a593Smuzhiyun reg = <0>; 506*4882a593Smuzhiyun spi-max-frequency = <1000000>; 507*4882a593Smuzhiyun }; 508*4882a593Smuzhiyun }; 509*4882a593Smuzhiyun }; 510*4882a593Smuzhiyun 511*4882a593Smuzhiyun sbefifo@2400 { 512*4882a593Smuzhiyun compatible = "ibm,p9-sbefifo"; 513*4882a593Smuzhiyun reg = <0x2400 0x400>; 514*4882a593Smuzhiyun #address-cells = <1>; 515*4882a593Smuzhiyun #size-cells = <0>; 516*4882a593Smuzhiyun 517*4882a593Smuzhiyun fsi_occ2: occ { 518*4882a593Smuzhiyun compatible = "ibm,p10-occ"; 519*4882a593Smuzhiyun }; 520*4882a593Smuzhiyun }; 521*4882a593Smuzhiyun 522*4882a593Smuzhiyun fsi_hub2: hub@3400 { 523*4882a593Smuzhiyun compatible = "fsi-master-hub"; 524*4882a593Smuzhiyun reg = <0x3400 0x400>; 525*4882a593Smuzhiyun #address-cells = <2>; 526*4882a593Smuzhiyun #size-cells = <0>; 527*4882a593Smuzhiyun 528*4882a593Smuzhiyun no-scan-on-init; 529*4882a593Smuzhiyun }; 530*4882a593Smuzhiyun }; 531*4882a593Smuzhiyun}; 532*4882a593Smuzhiyun 533*4882a593Smuzhiyun/* Legacy OCC numbering (to get rid of when userspace is fixed) */ 534*4882a593Smuzhiyun&fsi_occ0 { 535*4882a593Smuzhiyun reg = <1>; 536*4882a593Smuzhiyun}; 537*4882a593Smuzhiyun 538*4882a593Smuzhiyun&fsi_occ1 { 539*4882a593Smuzhiyun reg = <2>; 540*4882a593Smuzhiyun}; 541*4882a593Smuzhiyun 542*4882a593Smuzhiyun&fsi_occ2 { 543*4882a593Smuzhiyun reg = <3>; 544*4882a593Smuzhiyun}; 545*4882a593Smuzhiyun 546*4882a593Smuzhiyun&ibt { 547*4882a593Smuzhiyun status = "okay"; 548*4882a593Smuzhiyun}; 549*4882a593Smuzhiyun 550*4882a593Smuzhiyun&i2c0 { 551*4882a593Smuzhiyun status = "okay"; 552*4882a593Smuzhiyun 553*4882a593Smuzhiyun eeprom@51 { 554*4882a593Smuzhiyun compatible = "atmel,24c64"; 555*4882a593Smuzhiyun reg = <0x51>; 556*4882a593Smuzhiyun }; 557*4882a593Smuzhiyun 558*4882a593Smuzhiyun tca9554@40 { 559*4882a593Smuzhiyun compatible = "ti,tca9554"; 560*4882a593Smuzhiyun reg = <0x40>; 561*4882a593Smuzhiyun gpio-controller; 562*4882a593Smuzhiyun #gpio-cells = <2>; 563*4882a593Smuzhiyun 564*4882a593Smuzhiyun smbus0 { 565*4882a593Smuzhiyun gpio-hog; 566*4882a593Smuzhiyun gpios = <4 GPIO_ACTIVE_HIGH>; 567*4882a593Smuzhiyun output-high; 568*4882a593Smuzhiyun line-name = "smbus0"; 569*4882a593Smuzhiyun }; 570*4882a593Smuzhiyun }; 571*4882a593Smuzhiyun 572*4882a593Smuzhiyun}; 573*4882a593Smuzhiyun 574*4882a593Smuzhiyun&i2c1 { 575*4882a593Smuzhiyun status = "okay"; 576*4882a593Smuzhiyun}; 577*4882a593Smuzhiyun 578*4882a593Smuzhiyun&i2c2 { 579*4882a593Smuzhiyun status = "okay"; 580*4882a593Smuzhiyun}; 581*4882a593Smuzhiyun 582*4882a593Smuzhiyun&i2c3 { 583*4882a593Smuzhiyun status = "okay"; 584*4882a593Smuzhiyun 585*4882a593Smuzhiyun power-supply@68 { 586*4882a593Smuzhiyun compatible = "ibm,cffps"; 587*4882a593Smuzhiyun reg = <0x68>; 588*4882a593Smuzhiyun }; 589*4882a593Smuzhiyun 590*4882a593Smuzhiyun power-supply@69 { 591*4882a593Smuzhiyun compatible = "ibm,cffps"; 592*4882a593Smuzhiyun reg = <0x69>; 593*4882a593Smuzhiyun }; 594*4882a593Smuzhiyun 595*4882a593Smuzhiyun power-supply@6a { 596*4882a593Smuzhiyun compatible = "ibm,cffps"; 597*4882a593Smuzhiyun reg = <0x6a>; 598*4882a593Smuzhiyun }; 599*4882a593Smuzhiyun 600*4882a593Smuzhiyun power-supply@6b { 601*4882a593Smuzhiyun compatible = "ibm,cffps"; 602*4882a593Smuzhiyun reg = <0x6b>; 603*4882a593Smuzhiyun }; 604*4882a593Smuzhiyun}; 605*4882a593Smuzhiyun 606*4882a593Smuzhiyun&i2c4 { 607*4882a593Smuzhiyun status = "okay"; 608*4882a593Smuzhiyun 609*4882a593Smuzhiyun tmp275@48 { 610*4882a593Smuzhiyun compatible = "ti,tmp275"; 611*4882a593Smuzhiyun reg = <0x48>; 612*4882a593Smuzhiyun }; 613*4882a593Smuzhiyun 614*4882a593Smuzhiyun tmp275@49 { 615*4882a593Smuzhiyun compatible = "ti,tmp275"; 616*4882a593Smuzhiyun reg = <0x49>; 617*4882a593Smuzhiyun }; 618*4882a593Smuzhiyun 619*4882a593Smuzhiyun tmp275@4a { 620*4882a593Smuzhiyun compatible = "ti,tmp275"; 621*4882a593Smuzhiyun reg = <0x4a>; 622*4882a593Smuzhiyun }; 623*4882a593Smuzhiyun 624*4882a593Smuzhiyun eeprom@50 { 625*4882a593Smuzhiyun compatible = "atmel,24c64"; 626*4882a593Smuzhiyun reg = <0x50>; 627*4882a593Smuzhiyun }; 628*4882a593Smuzhiyun 629*4882a593Smuzhiyun eeprom@51 { 630*4882a593Smuzhiyun compatible = "atmel,24c64"; 631*4882a593Smuzhiyun reg = <0x51>; 632*4882a593Smuzhiyun }; 633*4882a593Smuzhiyun 634*4882a593Smuzhiyun eeprom@52 { 635*4882a593Smuzhiyun compatible = "atmel,24c64"; 636*4882a593Smuzhiyun reg = <0x52>; 637*4882a593Smuzhiyun }; 638*4882a593Smuzhiyun}; 639*4882a593Smuzhiyun 640*4882a593Smuzhiyun&i2c5 { 641*4882a593Smuzhiyun status = "okay"; 642*4882a593Smuzhiyun 643*4882a593Smuzhiyun tmp275@48 { 644*4882a593Smuzhiyun compatible = "ti,tmp275"; 645*4882a593Smuzhiyun reg = <0x48>; 646*4882a593Smuzhiyun }; 647*4882a593Smuzhiyun 648*4882a593Smuzhiyun tmp275@49 { 649*4882a593Smuzhiyun compatible = "ti,tmp275"; 650*4882a593Smuzhiyun reg = <0x49>; 651*4882a593Smuzhiyun }; 652*4882a593Smuzhiyun 653*4882a593Smuzhiyun eeprom@50 { 654*4882a593Smuzhiyun compatible = "atmel,24c64"; 655*4882a593Smuzhiyun reg = <0x50>; 656*4882a593Smuzhiyun }; 657*4882a593Smuzhiyun 658*4882a593Smuzhiyun eeprom@51 { 659*4882a593Smuzhiyun compatible = "atmel,24c64"; 660*4882a593Smuzhiyun reg = <0x51>; 661*4882a593Smuzhiyun }; 662*4882a593Smuzhiyun}; 663*4882a593Smuzhiyun 664*4882a593Smuzhiyun&i2c6 { 665*4882a593Smuzhiyun status = "okay"; 666*4882a593Smuzhiyun 667*4882a593Smuzhiyun tmp275@48 { 668*4882a593Smuzhiyun compatible = "ti,tmp275"; 669*4882a593Smuzhiyun reg = <0x48>; 670*4882a593Smuzhiyun }; 671*4882a593Smuzhiyun 672*4882a593Smuzhiyun tmp275@4a { 673*4882a593Smuzhiyun compatible = "ti,tmp275"; 674*4882a593Smuzhiyun reg = <0x4a>; 675*4882a593Smuzhiyun }; 676*4882a593Smuzhiyun 677*4882a593Smuzhiyun tmp275@4b { 678*4882a593Smuzhiyun compatible = "ti,tmp275"; 679*4882a593Smuzhiyun reg = <0x4b>; 680*4882a593Smuzhiyun }; 681*4882a593Smuzhiyun 682*4882a593Smuzhiyun eeprom@50 { 683*4882a593Smuzhiyun compatible = "atmel,24c64"; 684*4882a593Smuzhiyun reg = <0x50>; 685*4882a593Smuzhiyun }; 686*4882a593Smuzhiyun 687*4882a593Smuzhiyun eeprom@51 { 688*4882a593Smuzhiyun compatible = "atmel,24c64"; 689*4882a593Smuzhiyun reg = <0x51>; 690*4882a593Smuzhiyun }; 691*4882a593Smuzhiyun 692*4882a593Smuzhiyun eeprom@52 { 693*4882a593Smuzhiyun compatible = "atmel,24c64"; 694*4882a593Smuzhiyun reg = <0x52>; 695*4882a593Smuzhiyun }; 696*4882a593Smuzhiyun 697*4882a593Smuzhiyun eeprom@53 { 698*4882a593Smuzhiyun compatible = "atmel,24c64"; 699*4882a593Smuzhiyun reg = <0x53>; 700*4882a593Smuzhiyun }; 701*4882a593Smuzhiyun}; 702*4882a593Smuzhiyun 703*4882a593Smuzhiyun&i2c7 { 704*4882a593Smuzhiyun multi-master; 705*4882a593Smuzhiyun status = "okay"; 706*4882a593Smuzhiyun 707*4882a593Smuzhiyun si7021-a20@40 { 708*4882a593Smuzhiyun compatible = "silabs,si7020"; 709*4882a593Smuzhiyun reg = <0x40>; 710*4882a593Smuzhiyun }; 711*4882a593Smuzhiyun 712*4882a593Smuzhiyun tmp275@48 { 713*4882a593Smuzhiyun compatible = "ti,tmp275"; 714*4882a593Smuzhiyun reg = <0x48>; 715*4882a593Smuzhiyun }; 716*4882a593Smuzhiyun 717*4882a593Smuzhiyun max31785@52 { 718*4882a593Smuzhiyun compatible = "maxim,max31785a"; 719*4882a593Smuzhiyun reg = <0x52>; 720*4882a593Smuzhiyun #address-cells = <1>; 721*4882a593Smuzhiyun #size-cells = <0>; 722*4882a593Smuzhiyun 723*4882a593Smuzhiyun fan@0 { 724*4882a593Smuzhiyun compatible = "pmbus-fan"; 725*4882a593Smuzhiyun reg = <0>; 726*4882a593Smuzhiyun tach-pulses = <2>; 727*4882a593Smuzhiyun }; 728*4882a593Smuzhiyun 729*4882a593Smuzhiyun fan@1 { 730*4882a593Smuzhiyun compatible = "pmbus-fan"; 731*4882a593Smuzhiyun reg = <1>; 732*4882a593Smuzhiyun tach-pulses = <2>; 733*4882a593Smuzhiyun }; 734*4882a593Smuzhiyun 735*4882a593Smuzhiyun fan@2 { 736*4882a593Smuzhiyun compatible = "pmbus-fan"; 737*4882a593Smuzhiyun reg = <2>; 738*4882a593Smuzhiyun tach-pulses = <2>; 739*4882a593Smuzhiyun }; 740*4882a593Smuzhiyun 741*4882a593Smuzhiyun fan@3 { 742*4882a593Smuzhiyun compatible = "pmbus-fan"; 743*4882a593Smuzhiyun reg = <3>; 744*4882a593Smuzhiyun tach-pulses = <2>; 745*4882a593Smuzhiyun }; 746*4882a593Smuzhiyun }; 747*4882a593Smuzhiyun 748*4882a593Smuzhiyun pca0: pca9552@61 { 749*4882a593Smuzhiyun compatible = "nxp,pca9552"; 750*4882a593Smuzhiyun reg = <0x61>; 751*4882a593Smuzhiyun #address-cells = <1>; 752*4882a593Smuzhiyun #size-cells = <0>; 753*4882a593Smuzhiyun 754*4882a593Smuzhiyun gpio-controller; 755*4882a593Smuzhiyun #gpio-cells = <2>; 756*4882a593Smuzhiyun 757*4882a593Smuzhiyun gpio@0 { 758*4882a593Smuzhiyun reg = <0>; 759*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 760*4882a593Smuzhiyun }; 761*4882a593Smuzhiyun 762*4882a593Smuzhiyun gpio@1 { 763*4882a593Smuzhiyun reg = <1>; 764*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 765*4882a593Smuzhiyun }; 766*4882a593Smuzhiyun 767*4882a593Smuzhiyun gpio@2 { 768*4882a593Smuzhiyun reg = <2>; 769*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 770*4882a593Smuzhiyun }; 771*4882a593Smuzhiyun 772*4882a593Smuzhiyun gpio@3 { 773*4882a593Smuzhiyun reg = <3>; 774*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 775*4882a593Smuzhiyun }; 776*4882a593Smuzhiyun 777*4882a593Smuzhiyun gpio@4 { 778*4882a593Smuzhiyun reg = <4>; 779*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 780*4882a593Smuzhiyun }; 781*4882a593Smuzhiyun 782*4882a593Smuzhiyun gpio@5 { 783*4882a593Smuzhiyun reg = <5>; 784*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 785*4882a593Smuzhiyun }; 786*4882a593Smuzhiyun 787*4882a593Smuzhiyun gpio@6 { 788*4882a593Smuzhiyun reg = <6>; 789*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 790*4882a593Smuzhiyun }; 791*4882a593Smuzhiyun 792*4882a593Smuzhiyun gpio@7 { 793*4882a593Smuzhiyun reg = <7>; 794*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 795*4882a593Smuzhiyun }; 796*4882a593Smuzhiyun 797*4882a593Smuzhiyun gpio@8 { 798*4882a593Smuzhiyun reg = <8>; 799*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 800*4882a593Smuzhiyun }; 801*4882a593Smuzhiyun 802*4882a593Smuzhiyun gpio@9 { 803*4882a593Smuzhiyun reg = <9>; 804*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 805*4882a593Smuzhiyun }; 806*4882a593Smuzhiyun 807*4882a593Smuzhiyun gpio@10 { 808*4882a593Smuzhiyun reg = <10>; 809*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 810*4882a593Smuzhiyun }; 811*4882a593Smuzhiyun 812*4882a593Smuzhiyun gpio@11 { 813*4882a593Smuzhiyun reg = <11>; 814*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 815*4882a593Smuzhiyun }; 816*4882a593Smuzhiyun 817*4882a593Smuzhiyun gpio@12 { 818*4882a593Smuzhiyun reg = <12>; 819*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 820*4882a593Smuzhiyun }; 821*4882a593Smuzhiyun 822*4882a593Smuzhiyun gpio@13 { 823*4882a593Smuzhiyun reg = <13>; 824*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 825*4882a593Smuzhiyun }; 826*4882a593Smuzhiyun 827*4882a593Smuzhiyun gpio@14 { 828*4882a593Smuzhiyun reg = <14>; 829*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 830*4882a593Smuzhiyun }; 831*4882a593Smuzhiyun 832*4882a593Smuzhiyun gpio@15 { 833*4882a593Smuzhiyun reg = <15>; 834*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 835*4882a593Smuzhiyun }; 836*4882a593Smuzhiyun }; 837*4882a593Smuzhiyun 838*4882a593Smuzhiyun ibm-panel@62 { 839*4882a593Smuzhiyun compatible = "ibm,op-panel"; 840*4882a593Smuzhiyun reg = <(0x62 | I2C_OWN_SLAVE_ADDRESS)>; 841*4882a593Smuzhiyun }; 842*4882a593Smuzhiyun 843*4882a593Smuzhiyun dps: dps310@76 { 844*4882a593Smuzhiyun compatible = "infineon,dps310"; 845*4882a593Smuzhiyun reg = <0x76>; 846*4882a593Smuzhiyun #io-channel-cells = <0>; 847*4882a593Smuzhiyun }; 848*4882a593Smuzhiyun 849*4882a593Smuzhiyun eeprom@50 { 850*4882a593Smuzhiyun compatible = "atmel,24c64"; 851*4882a593Smuzhiyun reg = <0x50>; 852*4882a593Smuzhiyun }; 853*4882a593Smuzhiyun 854*4882a593Smuzhiyun eeprom@51 { 855*4882a593Smuzhiyun compatible = "atmel,24c64"; 856*4882a593Smuzhiyun reg = <0x51>; 857*4882a593Smuzhiyun }; 858*4882a593Smuzhiyun}; 859*4882a593Smuzhiyun 860*4882a593Smuzhiyun&i2c8 { 861*4882a593Smuzhiyun status = "okay"; 862*4882a593Smuzhiyun 863*4882a593Smuzhiyun ucd90320@11 { 864*4882a593Smuzhiyun compatible = "ti,ucd90320"; 865*4882a593Smuzhiyun reg = <0x11>; 866*4882a593Smuzhiyun }; 867*4882a593Smuzhiyun 868*4882a593Smuzhiyun rtc@32 { 869*4882a593Smuzhiyun compatible = "epson,rx8900"; 870*4882a593Smuzhiyun reg = <0x32>; 871*4882a593Smuzhiyun }; 872*4882a593Smuzhiyun 873*4882a593Smuzhiyun tmp275@48 { 874*4882a593Smuzhiyun compatible = "ti,tmp275"; 875*4882a593Smuzhiyun reg = <0x48>; 876*4882a593Smuzhiyun }; 877*4882a593Smuzhiyun 878*4882a593Smuzhiyun tmp275@4a { 879*4882a593Smuzhiyun compatible = "ti,tmp275"; 880*4882a593Smuzhiyun reg = <0x4a>; 881*4882a593Smuzhiyun }; 882*4882a593Smuzhiyun 883*4882a593Smuzhiyun eeprom@50 { 884*4882a593Smuzhiyun compatible = "atmel,24c64"; 885*4882a593Smuzhiyun reg = <0x50>; 886*4882a593Smuzhiyun }; 887*4882a593Smuzhiyun 888*4882a593Smuzhiyun eeprom@51 { 889*4882a593Smuzhiyun compatible = "atmel,24c64"; 890*4882a593Smuzhiyun reg = <0x51>; 891*4882a593Smuzhiyun }; 892*4882a593Smuzhiyun 893*4882a593Smuzhiyun pca1: pca9552@61 { 894*4882a593Smuzhiyun compatible = "nxp,pca9552"; 895*4882a593Smuzhiyun reg = <0x61>; 896*4882a593Smuzhiyun #address-cells = <1>; 897*4882a593Smuzhiyun #size-cells = <0>; 898*4882a593Smuzhiyun gpio-controller; 899*4882a593Smuzhiyun #gpio-cells = <2>; 900*4882a593Smuzhiyun 901*4882a593Smuzhiyun gpio@0 { 902*4882a593Smuzhiyun reg = <0>; 903*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 904*4882a593Smuzhiyun }; 905*4882a593Smuzhiyun 906*4882a593Smuzhiyun gpio@1 { 907*4882a593Smuzhiyun reg = <1>; 908*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 909*4882a593Smuzhiyun }; 910*4882a593Smuzhiyun 911*4882a593Smuzhiyun gpio@2 { 912*4882a593Smuzhiyun reg = <2>; 913*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 914*4882a593Smuzhiyun }; 915*4882a593Smuzhiyun 916*4882a593Smuzhiyun gpio@3 { 917*4882a593Smuzhiyun reg = <3>; 918*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 919*4882a593Smuzhiyun }; 920*4882a593Smuzhiyun 921*4882a593Smuzhiyun gpio@4 { 922*4882a593Smuzhiyun reg = <4>; 923*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 924*4882a593Smuzhiyun }; 925*4882a593Smuzhiyun 926*4882a593Smuzhiyun gpio@5 { 927*4882a593Smuzhiyun reg = <5>; 928*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 929*4882a593Smuzhiyun }; 930*4882a593Smuzhiyun 931*4882a593Smuzhiyun gpio@6 { 932*4882a593Smuzhiyun reg = <6>; 933*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 934*4882a593Smuzhiyun }; 935*4882a593Smuzhiyun 936*4882a593Smuzhiyun gpio@7 { 937*4882a593Smuzhiyun reg = <7>; 938*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 939*4882a593Smuzhiyun }; 940*4882a593Smuzhiyun 941*4882a593Smuzhiyun gpio@8 { 942*4882a593Smuzhiyun reg = <8>; 943*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 944*4882a593Smuzhiyun }; 945*4882a593Smuzhiyun 946*4882a593Smuzhiyun gpio@9 { 947*4882a593Smuzhiyun reg = <9>; 948*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 949*4882a593Smuzhiyun }; 950*4882a593Smuzhiyun 951*4882a593Smuzhiyun gpio@10 { 952*4882a593Smuzhiyun reg = <10>; 953*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 954*4882a593Smuzhiyun }; 955*4882a593Smuzhiyun 956*4882a593Smuzhiyun gpio@11 { 957*4882a593Smuzhiyun reg = <11>; 958*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 959*4882a593Smuzhiyun }; 960*4882a593Smuzhiyun 961*4882a593Smuzhiyun gpio@12 { 962*4882a593Smuzhiyun reg = <12>; 963*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 964*4882a593Smuzhiyun }; 965*4882a593Smuzhiyun 966*4882a593Smuzhiyun gpio@13 { 967*4882a593Smuzhiyun reg = <13>; 968*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 969*4882a593Smuzhiyun }; 970*4882a593Smuzhiyun 971*4882a593Smuzhiyun gpio@14 { 972*4882a593Smuzhiyun reg = <14>; 973*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 974*4882a593Smuzhiyun }; 975*4882a593Smuzhiyun 976*4882a593Smuzhiyun gpio@15 { 977*4882a593Smuzhiyun reg = <15>; 978*4882a593Smuzhiyun type = <PCA955X_TYPE_GPIO>; 979*4882a593Smuzhiyun }; 980*4882a593Smuzhiyun }; 981*4882a593Smuzhiyun 982*4882a593Smuzhiyun}; 983*4882a593Smuzhiyun 984*4882a593Smuzhiyun&i2c9 { 985*4882a593Smuzhiyun status = "okay"; 986*4882a593Smuzhiyun 987*4882a593Smuzhiyun tmp423a@4c { 988*4882a593Smuzhiyun compatible = "ti,tmp423"; 989*4882a593Smuzhiyun reg = <0x4c>; 990*4882a593Smuzhiyun }; 991*4882a593Smuzhiyun 992*4882a593Smuzhiyun tmp423b@4d { 993*4882a593Smuzhiyun compatible = "ti,tmp423"; 994*4882a593Smuzhiyun reg = <0x4d>; 995*4882a593Smuzhiyun }; 996*4882a593Smuzhiyun 997*4882a593Smuzhiyun eeprom@50 { 998*4882a593Smuzhiyun compatible = "atmel,24c128"; 999*4882a593Smuzhiyun reg = <0x50>; 1000*4882a593Smuzhiyun }; 1001*4882a593Smuzhiyun}; 1002*4882a593Smuzhiyun 1003*4882a593Smuzhiyun&i2c10 { 1004*4882a593Smuzhiyun status = "okay"; 1005*4882a593Smuzhiyun 1006*4882a593Smuzhiyun tmp423a@4c { 1007*4882a593Smuzhiyun compatible = "ti,tmp423"; 1008*4882a593Smuzhiyun reg = <0x4c>; 1009*4882a593Smuzhiyun }; 1010*4882a593Smuzhiyun 1011*4882a593Smuzhiyun tmp423b@4d { 1012*4882a593Smuzhiyun compatible = "ti,tmp423"; 1013*4882a593Smuzhiyun reg = <0x4d>; 1014*4882a593Smuzhiyun }; 1015*4882a593Smuzhiyun 1016*4882a593Smuzhiyun eeprom@50 { 1017*4882a593Smuzhiyun compatible = "atmel,24c128"; 1018*4882a593Smuzhiyun reg = <0x50>; 1019*4882a593Smuzhiyun }; 1020*4882a593Smuzhiyun}; 1021*4882a593Smuzhiyun 1022*4882a593Smuzhiyun&i2c11 { 1023*4882a593Smuzhiyun status = "okay"; 1024*4882a593Smuzhiyun 1025*4882a593Smuzhiyun tmp275@48 { 1026*4882a593Smuzhiyun compatible = "ti,tmp275"; 1027*4882a593Smuzhiyun reg = <0x48>; 1028*4882a593Smuzhiyun }; 1029*4882a593Smuzhiyun 1030*4882a593Smuzhiyun tmp275@49 { 1031*4882a593Smuzhiyun compatible = "ti,tmp275"; 1032*4882a593Smuzhiyun reg = <0x49>; 1033*4882a593Smuzhiyun }; 1034*4882a593Smuzhiyun 1035*4882a593Smuzhiyun eeprom@50 { 1036*4882a593Smuzhiyun compatible = "atmel,24c64"; 1037*4882a593Smuzhiyun reg = <0x50>; 1038*4882a593Smuzhiyun }; 1039*4882a593Smuzhiyun 1040*4882a593Smuzhiyun eeprom@51 { 1041*4882a593Smuzhiyun compatible = "atmel,24c64"; 1042*4882a593Smuzhiyun reg = <0x51>; 1043*4882a593Smuzhiyun }; 1044*4882a593Smuzhiyun}; 1045*4882a593Smuzhiyun 1046*4882a593Smuzhiyun&i2c12 { 1047*4882a593Smuzhiyun status = "okay"; 1048*4882a593Smuzhiyun}; 1049*4882a593Smuzhiyun 1050*4882a593Smuzhiyun&i2c13 { 1051*4882a593Smuzhiyun status = "okay"; 1052*4882a593Smuzhiyun 1053*4882a593Smuzhiyun eeprom@50 { 1054*4882a593Smuzhiyun compatible = "atmel,24c64"; 1055*4882a593Smuzhiyun reg = <0x50>; 1056*4882a593Smuzhiyun }; 1057*4882a593Smuzhiyun}; 1058*4882a593Smuzhiyun 1059*4882a593Smuzhiyun&i2c14 { 1060*4882a593Smuzhiyun status = "okay"; 1061*4882a593Smuzhiyun 1062*4882a593Smuzhiyun eeprom@50 { 1063*4882a593Smuzhiyun compatible = "atmel,24c64"; 1064*4882a593Smuzhiyun reg = <0x50>; 1065*4882a593Smuzhiyun }; 1066*4882a593Smuzhiyun}; 1067*4882a593Smuzhiyun 1068*4882a593Smuzhiyun&i2c15 { 1069*4882a593Smuzhiyun status = "okay"; 1070*4882a593Smuzhiyun 1071*4882a593Smuzhiyun eeprom@50 { 1072*4882a593Smuzhiyun compatible = "atmel,24c64"; 1073*4882a593Smuzhiyun reg = <0x50>; 1074*4882a593Smuzhiyun }; 1075*4882a593Smuzhiyun}; 1076*4882a593Smuzhiyun 1077*4882a593Smuzhiyun&vuart1 { 1078*4882a593Smuzhiyun status = "okay"; 1079*4882a593Smuzhiyun}; 1080*4882a593Smuzhiyun 1081*4882a593Smuzhiyun&vuart2 { 1082*4882a593Smuzhiyun status = "okay"; 1083*4882a593Smuzhiyun}; 1084*4882a593Smuzhiyun 1085*4882a593Smuzhiyun&lpc_ctrl { 1086*4882a593Smuzhiyun status = "okay"; 1087*4882a593Smuzhiyun memory-region = <&flash_memory>; 1088*4882a593Smuzhiyun}; 1089*4882a593Smuzhiyun 1090*4882a593Smuzhiyun&mac2 { 1091*4882a593Smuzhiyun status = "okay"; 1092*4882a593Smuzhiyun pinctrl-names = "default"; 1093*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_rmii3_default>; 1094*4882a593Smuzhiyun clocks = <&syscon ASPEED_CLK_GATE_MAC3CLK>, 1095*4882a593Smuzhiyun <&syscon ASPEED_CLK_MAC3RCLK>; 1096*4882a593Smuzhiyun clock-names = "MACCLK", "RCLK"; 1097*4882a593Smuzhiyun use-ncsi; 1098*4882a593Smuzhiyun}; 1099*4882a593Smuzhiyun 1100*4882a593Smuzhiyun&mac3 { 1101*4882a593Smuzhiyun status = "okay"; 1102*4882a593Smuzhiyun pinctrl-names = "default"; 1103*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_rmii4_default>; 1104*4882a593Smuzhiyun clocks = <&syscon ASPEED_CLK_GATE_MAC4CLK>, 1105*4882a593Smuzhiyun <&syscon ASPEED_CLK_MAC4RCLK>; 1106*4882a593Smuzhiyun clock-names = "MACCLK", "RCLK"; 1107*4882a593Smuzhiyun use-ncsi; 1108*4882a593Smuzhiyun}; 1109*4882a593Smuzhiyun 1110*4882a593Smuzhiyun&fmc { 1111*4882a593Smuzhiyun status = "okay"; 1112*4882a593Smuzhiyun flash@0 { 1113*4882a593Smuzhiyun status = "okay"; 1114*4882a593Smuzhiyun m25p,fast-read; 1115*4882a593Smuzhiyun label = "bmc"; 1116*4882a593Smuzhiyun spi-max-frequency = <50000000>; 1117*4882a593Smuzhiyun#include "openbmc-flash-layout-128.dtsi" 1118*4882a593Smuzhiyun }; 1119*4882a593Smuzhiyun}; 1120*4882a593Smuzhiyun 1121*4882a593Smuzhiyun&spi1 { 1122*4882a593Smuzhiyun status = "okay"; 1123*4882a593Smuzhiyun pinctrl-names = "default"; 1124*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_spi1_default>; 1125*4882a593Smuzhiyun 1126*4882a593Smuzhiyun flash@0 { 1127*4882a593Smuzhiyun status = "okay"; 1128*4882a593Smuzhiyun m25p,fast-read; 1129*4882a593Smuzhiyun label = "pnor"; 1130*4882a593Smuzhiyun spi-max-frequency = <100000000>; 1131*4882a593Smuzhiyun }; 1132*4882a593Smuzhiyun}; 1133*4882a593Smuzhiyun 1134*4882a593Smuzhiyun&xdma { 1135*4882a593Smuzhiyun status = "okay"; 1136*4882a593Smuzhiyun memory-region = <&vga_memory>; 1137*4882a593Smuzhiyun}; 1138