1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0+ 2*4882a593Smuzhiyun/dts-v1/; 3*4882a593Smuzhiyun 4*4882a593Smuzhiyun#include "aspeed-g5.dtsi" 5*4882a593Smuzhiyun#include <dt-bindings/gpio/aspeed-gpio.h> 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun/ { 8*4882a593Smuzhiyun model = "HXT StarDragon 4800 REP2 AST2520"; 9*4882a593Smuzhiyun compatible = "hxt,stardragon4800-rep2-bmc", "aspeed,ast2500"; 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun chosen { 12*4882a593Smuzhiyun stdout-path = &uart5; 13*4882a593Smuzhiyun bootargs = "console=ttyS4,115200 earlyprintk"; 14*4882a593Smuzhiyun }; 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun memory@80000000 { 17*4882a593Smuzhiyun reg = <0x80000000 0x40000000>; 18*4882a593Smuzhiyun }; 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun iio-hwmon { 21*4882a593Smuzhiyun compatible = "iio-hwmon"; 22*4882a593Smuzhiyun io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>, 23*4882a593Smuzhiyun <&adc 4>, <&adc 5>, <&adc 6>, <&adc 8>; 24*4882a593Smuzhiyun }; 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun iio-hwmon-battery { 27*4882a593Smuzhiyun compatible = "iio-hwmon"; 28*4882a593Smuzhiyun io-channels = <&adc 7>; 29*4882a593Smuzhiyun }; 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun leds { 32*4882a593Smuzhiyun compatible = "gpio-leds"; 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun system_fault1 { 35*4882a593Smuzhiyun label = "System_fault1"; 36*4882a593Smuzhiyun gpios = <&gpio ASPEED_GPIO(I, 3) GPIO_ACTIVE_LOW>; 37*4882a593Smuzhiyun }; 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun system_fault2 { 40*4882a593Smuzhiyun label = "System_fault2"; 41*4882a593Smuzhiyun gpios = <&gpio ASPEED_GPIO(I, 2) GPIO_ACTIVE_LOW>; 42*4882a593Smuzhiyun }; 43*4882a593Smuzhiyun }; 44*4882a593Smuzhiyun}; 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun&fmc { 47*4882a593Smuzhiyun status = "okay"; 48*4882a593Smuzhiyun flash@0 { 49*4882a593Smuzhiyun status = "okay"; 50*4882a593Smuzhiyun m25p,fast-read; 51*4882a593Smuzhiyun label = "bmc"; 52*4882a593Smuzhiyun#include "openbmc-flash-layout.dtsi" 53*4882a593Smuzhiyun }; 54*4882a593Smuzhiyun}; 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun&spi1 { 57*4882a593Smuzhiyun status = "okay"; 58*4882a593Smuzhiyun pinctrl-names = "default"; 59*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_spi1_default>; 60*4882a593Smuzhiyun flash@0 { 61*4882a593Smuzhiyun status = "okay"; 62*4882a593Smuzhiyun }; 63*4882a593Smuzhiyun}; 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun&spi2 { 66*4882a593Smuzhiyun pinctrl-names = "default"; 67*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_spi2ck_default 68*4882a593Smuzhiyun &pinctrl_spi2miso_default 69*4882a593Smuzhiyun &pinctrl_spi2mosi_default 70*4882a593Smuzhiyun &pinctrl_spi2cs0_default>; 71*4882a593Smuzhiyun}; 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun&uart3 { 74*4882a593Smuzhiyun status = "okay"; 75*4882a593Smuzhiyun 76*4882a593Smuzhiyun pinctrl-names = "default"; 77*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_txd3_default &pinctrl_rxd3_default>; 78*4882a593Smuzhiyun current-speed = <115200>; 79*4882a593Smuzhiyun}; 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun&uart5 { 82*4882a593Smuzhiyun status = "okay"; 83*4882a593Smuzhiyun}; 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun&mac0 { 86*4882a593Smuzhiyun status = "okay"; 87*4882a593Smuzhiyun pinctrl-names = "default"; 88*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_rgmii1_default &pinctrl_mdio1_default>; 89*4882a593Smuzhiyun}; 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun&mac1 { 92*4882a593Smuzhiyun status = "okay"; 93*4882a593Smuzhiyun pinctrl-names = "default"; 94*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_rmii2_default>; 95*4882a593Smuzhiyun clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>, 96*4882a593Smuzhiyun <&syscon ASPEED_CLK_MAC2RCLK>; 97*4882a593Smuzhiyun clock-names = "MACCLK", "RCLK"; 98*4882a593Smuzhiyun use-ncsi; 99*4882a593Smuzhiyun}; 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun&i2c0 { 102*4882a593Smuzhiyun status = "okay"; 103*4882a593Smuzhiyun}; 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun&i2c1 { 106*4882a593Smuzhiyun status = "okay"; 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun tmp421@1e { 109*4882a593Smuzhiyun compatible = "ti,tmp421"; 110*4882a593Smuzhiyun reg = <0x1e>; 111*4882a593Smuzhiyun }; 112*4882a593Smuzhiyun tmp421@2a { 113*4882a593Smuzhiyun compatible = "ti,tmp421"; 114*4882a593Smuzhiyun reg = <0x2a>; 115*4882a593Smuzhiyun }; 116*4882a593Smuzhiyun tmp421@1c { 117*4882a593Smuzhiyun compatible = "ti,tmp421"; 118*4882a593Smuzhiyun reg = <0x1c>; 119*4882a593Smuzhiyun }; 120*4882a593Smuzhiyun}; 121*4882a593Smuzhiyun 122*4882a593Smuzhiyun&i2c2 { 123*4882a593Smuzhiyun status = "okay"; 124*4882a593Smuzhiyun}; 125*4882a593Smuzhiyun 126*4882a593Smuzhiyun&i2c3 { 127*4882a593Smuzhiyun status = "okay"; 128*4882a593Smuzhiyun}; 129*4882a593Smuzhiyun 130*4882a593Smuzhiyun&i2c4 { 131*4882a593Smuzhiyun status = "okay"; 132*4882a593Smuzhiyun}; 133*4882a593Smuzhiyun 134*4882a593Smuzhiyun&i2c5 { 135*4882a593Smuzhiyun status = "okay"; 136*4882a593Smuzhiyun}; 137*4882a593Smuzhiyun 138*4882a593Smuzhiyun&i2c6 { 139*4882a593Smuzhiyun status = "okay"; 140*4882a593Smuzhiyun 141*4882a593Smuzhiyun tmp421@1f { 142*4882a593Smuzhiyun compatible = "ti,tmp421"; 143*4882a593Smuzhiyun reg = <0x1f>; 144*4882a593Smuzhiyun }; 145*4882a593Smuzhiyun nvt210@4c { 146*4882a593Smuzhiyun compatible = "nvt210"; 147*4882a593Smuzhiyun reg = <0x4c>; 148*4882a593Smuzhiyun }; 149*4882a593Smuzhiyun eeprom@50 { 150*4882a593Smuzhiyun compatible = "atmel,24c128"; 151*4882a593Smuzhiyun reg = <0x50>; 152*4882a593Smuzhiyun pagesize = <128>; 153*4882a593Smuzhiyun }; 154*4882a593Smuzhiyun}; 155*4882a593Smuzhiyun 156*4882a593Smuzhiyun&i2c7 { 157*4882a593Smuzhiyun status = "okay"; 158*4882a593Smuzhiyun}; 159*4882a593Smuzhiyun 160*4882a593Smuzhiyun&i2c8 { 161*4882a593Smuzhiyun status = "okay"; 162*4882a593Smuzhiyun 163*4882a593Smuzhiyun pca9641@70 { 164*4882a593Smuzhiyun compatible = "nxp,pca9641"; 165*4882a593Smuzhiyun reg = <0x70>; 166*4882a593Smuzhiyun i2c-arb { 167*4882a593Smuzhiyun #address-cells = <1>; 168*4882a593Smuzhiyun #size-cells = <0>; 169*4882a593Smuzhiyun eeprom@50 { 170*4882a593Smuzhiyun compatible = "atmel,24c02"; 171*4882a593Smuzhiyun reg = <0x50>; 172*4882a593Smuzhiyun }; 173*4882a593Smuzhiyun dps650ab@58 { 174*4882a593Smuzhiyun compatible = "dps650ab"; 175*4882a593Smuzhiyun reg = <0x58>; 176*4882a593Smuzhiyun }; 177*4882a593Smuzhiyun }; 178*4882a593Smuzhiyun }; 179*4882a593Smuzhiyun 180*4882a593Smuzhiyun dps650ab@58 { 181*4882a593Smuzhiyun compatible = "delta,dps650ab"; 182*4882a593Smuzhiyun reg = <0x58>; 183*4882a593Smuzhiyun }; 184*4882a593Smuzhiyun 185*4882a593Smuzhiyun dps650ab@59 { 186*4882a593Smuzhiyun compatible = "delta,dps650ab"; 187*4882a593Smuzhiyun reg = <0x59>; 188*4882a593Smuzhiyun }; 189*4882a593Smuzhiyun}; 190*4882a593Smuzhiyun 191*4882a593Smuzhiyun&i2c9 { 192*4882a593Smuzhiyun status = "okay"; 193*4882a593Smuzhiyun}; 194*4882a593Smuzhiyun 195*4882a593Smuzhiyun&vuart { 196*4882a593Smuzhiyun status = "okay"; 197*4882a593Smuzhiyun}; 198*4882a593Smuzhiyun 199*4882a593Smuzhiyun&gfx { 200*4882a593Smuzhiyun status = "okay"; 201*4882a593Smuzhiyun}; 202*4882a593Smuzhiyun 203*4882a593Smuzhiyun&pinctrl { 204*4882a593Smuzhiyun aspeed,external-nodes = <&gfx &lhc>; 205*4882a593Smuzhiyun}; 206*4882a593Smuzhiyun 207*4882a593Smuzhiyun&gpio { 208*4882a593Smuzhiyun pin_gpio_c7 { 209*4882a593Smuzhiyun gpio-hog; 210*4882a593Smuzhiyun gpios = <ASPEED_GPIO(C, 7) GPIO_ACTIVE_HIGH>; 211*4882a593Smuzhiyun output-low; 212*4882a593Smuzhiyun line-name = "BIOS_SPI_MUX_S"; 213*4882a593Smuzhiyun }; 214*4882a593Smuzhiyun pin_gpio_d1 { 215*4882a593Smuzhiyun gpio-hog; 216*4882a593Smuzhiyun gpios = <ASPEED_GPIO(D, 1) GPIO_ACTIVE_HIGH>; 217*4882a593Smuzhiyun output-high; 218*4882a593Smuzhiyun line-name = "PHY2_RESET_N"; 219*4882a593Smuzhiyun }; 220*4882a593Smuzhiyun}; 221