xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/armada-xp-netgear-rn2120.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Device Tree file for NETGEAR ReadyNAS 2120
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2013, Arnaud EBALARD <arno@natisbad.org>
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun/dts-v1/;
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun#include <dt-bindings/input/input.h>
11*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h>
12*4882a593Smuzhiyun#include "armada-xp-mv78230.dtsi"
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun/ {
15*4882a593Smuzhiyun	model = "NETGEAR ReadyNAS 2120";
16*4882a593Smuzhiyun	compatible = "netgear,readynas-2120", "marvell,armadaxp-mv78230", "marvell,armadaxp", "marvell,armada-370-xp";
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun	chosen {
19*4882a593Smuzhiyun		stdout-path = "serial0:115200n8";
20*4882a593Smuzhiyun	};
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun	memory@0 {
23*4882a593Smuzhiyun		device_type = "memory";
24*4882a593Smuzhiyun		reg = <0 0x00000000 0 0x80000000>; /* 2GB */
25*4882a593Smuzhiyun	};
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun	soc {
28*4882a593Smuzhiyun		ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xd0000000 0x100000
29*4882a593Smuzhiyun			  MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
30*4882a593Smuzhiyun			  MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000
31*4882a593Smuzhiyun			  MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000>;
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun		internal-regs {
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun			/* RTC is provided by Intersil ISL12057 I2C RTC chip */
36*4882a593Smuzhiyun			rtc@10300 {
37*4882a593Smuzhiyun				status = "disabled";
38*4882a593Smuzhiyun			};
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun			i2c@11000 {
41*4882a593Smuzhiyun				clock-frequency = <400000>;
42*4882a593Smuzhiyun				status = "okay";
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun				/* Controller for rear fan #1 of 3 (Protechnic
45*4882a593Smuzhiyun				 * MGT4012XB-O20, 8000RPM) near eSATA port */
46*4882a593Smuzhiyun				g762_fan1: g762@3e {
47*4882a593Smuzhiyun					compatible = "gmt,g762";
48*4882a593Smuzhiyun					reg = <0x3e>;
49*4882a593Smuzhiyun					clocks = <&g762_clk>; /* input clock */
50*4882a593Smuzhiyun					fan_gear_mode = <0>;
51*4882a593Smuzhiyun					fan_startv = <1>;
52*4882a593Smuzhiyun					pwm_polarity = <0>;
53*4882a593Smuzhiyun				};
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun				/*  Controller for rear (center) fan #2 of 3 */
56*4882a593Smuzhiyun				g762_fan2: g762@48 {
57*4882a593Smuzhiyun					compatible = "gmt,g762";
58*4882a593Smuzhiyun					reg = <0x48>;
59*4882a593Smuzhiyun					clocks = <&g762_clk>; /* input clock */
60*4882a593Smuzhiyun					fan_gear_mode = <0>;
61*4882a593Smuzhiyun					fan_startv = <1>;
62*4882a593Smuzhiyun					pwm_polarity = <0>;
63*4882a593Smuzhiyun				};
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun				/*  Controller for rear fan #3 of 3 */
66*4882a593Smuzhiyun				g762_fan3: g762@49 {
67*4882a593Smuzhiyun					compatible = "gmt,g762";
68*4882a593Smuzhiyun					reg = <0x49>;
69*4882a593Smuzhiyun					clocks = <&g762_clk>; /* input clock */
70*4882a593Smuzhiyun					fan_gear_mode = <0>;
71*4882a593Smuzhiyun					fan_startv = <1>;
72*4882a593Smuzhiyun					pwm_polarity = <0>;
73*4882a593Smuzhiyun				};
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun				/* Temperature sensor */
76*4882a593Smuzhiyun				g751: g751@4c {
77*4882a593Smuzhiyun					compatible = "gmt,g751";
78*4882a593Smuzhiyun					reg = <0x4c>;
79*4882a593Smuzhiyun				};
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun				isl12057: rtc@68 {
82*4882a593Smuzhiyun					compatible = "isil,isl12057";
83*4882a593Smuzhiyun					reg = <0x68>;
84*4882a593Smuzhiyun					wakeup-source;
85*4882a593Smuzhiyun				};
86*4882a593Smuzhiyun			};
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun			serial@12000 {
89*4882a593Smuzhiyun				status = "okay";
90*4882a593Smuzhiyun			};
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun			/* Front USB 2.0 port */
93*4882a593Smuzhiyun			usb@50000 {
94*4882a593Smuzhiyun				status = "okay";
95*4882a593Smuzhiyun			};
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun			ethernet@70000 {
98*4882a593Smuzhiyun				pinctrl-0 = <&ge0_rgmii_pins>;
99*4882a593Smuzhiyun				pinctrl-names = "default";
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun				status = "okay";
102*4882a593Smuzhiyun				phy = <&phy0>;
103*4882a593Smuzhiyun				phy-mode = "rgmii-id";
104*4882a593Smuzhiyun			};
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun			ethernet@74000 {
107*4882a593Smuzhiyun				pinctrl-0 = <&ge1_rgmii_pins>;
108*4882a593Smuzhiyun				pinctrl-names = "default";
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun				status = "okay";
111*4882a593Smuzhiyun				phy = <&phy1>;
112*4882a593Smuzhiyun				phy-mode = "rgmii-id";
113*4882a593Smuzhiyun			};
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun			/* Two rear eSATA ports */
116*4882a593Smuzhiyun			sata@a0000 {
117*4882a593Smuzhiyun				nr-ports = <2>;
118*4882a593Smuzhiyun				status = "okay";
119*4882a593Smuzhiyun			};
120*4882a593Smuzhiyun		};
121*4882a593Smuzhiyun	};
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun	clocks {
124*4882a593Smuzhiyun	       g762_clk: g762-oscillator {
125*4882a593Smuzhiyun			 compatible = "fixed-clock";
126*4882a593Smuzhiyun			 #clock-cells = <0>;
127*4882a593Smuzhiyun			 clock-frequency = <32768>;
128*4882a593Smuzhiyun	       };
129*4882a593Smuzhiyun	};
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun	gpio-leds {
132*4882a593Smuzhiyun		compatible = "gpio-leds";
133*4882a593Smuzhiyun		pinctrl-0 = <&sata1_led_pin &sata2_led_pin &err_led_pin
134*4882a593Smuzhiyun			     &sata3_led_pin &sata4_led_pin>;
135*4882a593Smuzhiyun		pinctrl-names = "default";
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun		red-sata1-led {
138*4882a593Smuzhiyun			label = "rn2120:red:sata1";
139*4882a593Smuzhiyun			gpios = <&gpio0 31 GPIO_ACTIVE_HIGH>;
140*4882a593Smuzhiyun			default-state = "off";
141*4882a593Smuzhiyun		};
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun		red-sata2-led {
144*4882a593Smuzhiyun			label = "rn2120:red:sata2";
145*4882a593Smuzhiyun			gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
146*4882a593Smuzhiyun			default-state = "off";
147*4882a593Smuzhiyun		};
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun		red-sata3-led {
150*4882a593Smuzhiyun			label = "rn2120:red:sata3";
151*4882a593Smuzhiyun			gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
152*4882a593Smuzhiyun			default-state = "off";
153*4882a593Smuzhiyun		};
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun		red-sata4-led {
156*4882a593Smuzhiyun			label = "rn2120:red:sata4";
157*4882a593Smuzhiyun			gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
158*4882a593Smuzhiyun			default-state = "off";
159*4882a593Smuzhiyun		};
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun		red-err-led {
162*4882a593Smuzhiyun			label = "rn2120:red:err";
163*4882a593Smuzhiyun			gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
164*4882a593Smuzhiyun			default-state = "off";
165*4882a593Smuzhiyun		};
166*4882a593Smuzhiyun	};
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun	gpio-keys {
169*4882a593Smuzhiyun		compatible = "gpio-keys";
170*4882a593Smuzhiyun		pinctrl-0 = <&power_button_pin &reset_button_pin>;
171*4882a593Smuzhiyun		pinctrl-names = "default";
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun		power-button {
174*4882a593Smuzhiyun			label = "Power Button";
175*4882a593Smuzhiyun			linux,code = <KEY_POWER>;
176*4882a593Smuzhiyun			gpios = <&gpio0 27 GPIO_ACTIVE_HIGH>;
177*4882a593Smuzhiyun		};
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun		reset-button {
180*4882a593Smuzhiyun			label = "Reset Button";
181*4882a593Smuzhiyun			linux,code = <KEY_RESTART>;
182*4882a593Smuzhiyun			gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
183*4882a593Smuzhiyun		};
184*4882a593Smuzhiyun	};
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun	gpio-poweroff {
187*4882a593Smuzhiyun		compatible = "gpio-poweroff";
188*4882a593Smuzhiyun		pinctrl-0 = <&poweroff>;
189*4882a593Smuzhiyun		pinctrl-names = "default";
190*4882a593Smuzhiyun		gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
191*4882a593Smuzhiyun	};
192*4882a593Smuzhiyun};
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun&pciec {
195*4882a593Smuzhiyun	status = "okay";
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun	/* Connected to first Marvell 88SE9170 SATA controller */
198*4882a593Smuzhiyun	pcie@1,0 {
199*4882a593Smuzhiyun		/* Port 0, Lane 0 */
200*4882a593Smuzhiyun		status = "okay";
201*4882a593Smuzhiyun	};
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun	/* Connected to second Marvell 88SE9170 SATA controller */
204*4882a593Smuzhiyun	pcie@2,0 {
205*4882a593Smuzhiyun		/* Port 0, Lane 1 */
206*4882a593Smuzhiyun		status = "okay";
207*4882a593Smuzhiyun	};
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun	/* Connected to Fresco Logic FL1009 USB 3.0 controller */
210*4882a593Smuzhiyun	pcie@5,0 {
211*4882a593Smuzhiyun		/* Port 1, Lane 0 */
212*4882a593Smuzhiyun		status = "okay";
213*4882a593Smuzhiyun	};
214*4882a593Smuzhiyun};
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun&mdio {
217*4882a593Smuzhiyun	phy0: ethernet-phy@0 { /* Marvell 88E1318 */
218*4882a593Smuzhiyun		reg = <0>;
219*4882a593Smuzhiyun	};
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun	phy1: ethernet-phy@1 { /* Marvell 88E1318 */
222*4882a593Smuzhiyun		reg = <1>;
223*4882a593Smuzhiyun	};
224*4882a593Smuzhiyun};
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun
227*4882a593Smuzhiyun&pinctrl {
228*4882a593Smuzhiyun	poweroff: poweroff {
229*4882a593Smuzhiyun		marvell,pins = "mpp42";
230*4882a593Smuzhiyun		marvell,function = "gpio";
231*4882a593Smuzhiyun	};
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun	power_button_pin: power-button-pin {
234*4882a593Smuzhiyun		marvell,pins = "mpp27";
235*4882a593Smuzhiyun		marvell,function = "gpio";
236*4882a593Smuzhiyun	};
237*4882a593Smuzhiyun
238*4882a593Smuzhiyun	reset_button_pin: reset-button-pin {
239*4882a593Smuzhiyun		marvell,pins = "mpp41";
240*4882a593Smuzhiyun		marvell,function = "gpio";
241*4882a593Smuzhiyun	};
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun	sata1_led_pin: sata1-led-pin {
244*4882a593Smuzhiyun		marvell,pins = "mpp31";
245*4882a593Smuzhiyun		marvell,function = "gpio";
246*4882a593Smuzhiyun	};
247*4882a593Smuzhiyun
248*4882a593Smuzhiyun	sata2_led_pin: sata2-led-pin {
249*4882a593Smuzhiyun		marvell,pins = "mpp40";
250*4882a593Smuzhiyun		marvell,function = "gpio";
251*4882a593Smuzhiyun	};
252*4882a593Smuzhiyun
253*4882a593Smuzhiyun	sata3_led_pin: sata3-led-pin {
254*4882a593Smuzhiyun		marvell,pins = "mpp44";
255*4882a593Smuzhiyun		marvell,function = "gpio";
256*4882a593Smuzhiyun	};
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun	sata4_led_pin: sata4-led-pin {
259*4882a593Smuzhiyun		marvell,pins = "mpp47";
260*4882a593Smuzhiyun		marvell,function = "gpio";
261*4882a593Smuzhiyun	};
262*4882a593Smuzhiyun
263*4882a593Smuzhiyun	sata1_power_pin: sata1-power-pin {
264*4882a593Smuzhiyun		marvell,pins = "mpp24";
265*4882a593Smuzhiyun		marvell,function = "gpio";
266*4882a593Smuzhiyun	};
267*4882a593Smuzhiyun
268*4882a593Smuzhiyun	sata2_power_pin: sata2-power-pin {
269*4882a593Smuzhiyun		marvell,pins = "mpp25";
270*4882a593Smuzhiyun		marvell,function = "gpio";
271*4882a593Smuzhiyun	};
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun	sata3_power_pin: sata3-power-pin {
274*4882a593Smuzhiyun		marvell,pins = "mpp26";
275*4882a593Smuzhiyun		marvell,function = "gpio";
276*4882a593Smuzhiyun	};
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun	sata4_power_pin: sata4-power-pin {
279*4882a593Smuzhiyun		marvell,pins = "mpp28";
280*4882a593Smuzhiyun		marvell,function = "gpio";
281*4882a593Smuzhiyun	};
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun	sata1_pres_pin: sata1-pres-pin {
284*4882a593Smuzhiyun		marvell,pins = "mpp32";
285*4882a593Smuzhiyun		marvell,function = "gpio";
286*4882a593Smuzhiyun	};
287*4882a593Smuzhiyun
288*4882a593Smuzhiyun	sata2_pres_pin: sata2-pres-pin {
289*4882a593Smuzhiyun		marvell,pins = "mpp33";
290*4882a593Smuzhiyun		marvell,function = "gpio";
291*4882a593Smuzhiyun	};
292*4882a593Smuzhiyun
293*4882a593Smuzhiyun	sata3_pres_pin: sata3-pres-pin {
294*4882a593Smuzhiyun		marvell,pins = "mpp34";
295*4882a593Smuzhiyun		marvell,function = "gpio";
296*4882a593Smuzhiyun	};
297*4882a593Smuzhiyun
298*4882a593Smuzhiyun	sata4_pres_pin: sata4-pres-pin {
299*4882a593Smuzhiyun		marvell,pins = "mpp35";
300*4882a593Smuzhiyun		marvell,function = "gpio";
301*4882a593Smuzhiyun	};
302*4882a593Smuzhiyun
303*4882a593Smuzhiyun	err_led_pin: err-led-pin {
304*4882a593Smuzhiyun		marvell,pins = "mpp45";
305*4882a593Smuzhiyun		marvell,function = "gpio";
306*4882a593Smuzhiyun	};
307*4882a593Smuzhiyun};
308*4882a593Smuzhiyun
309*4882a593Smuzhiyun&nand_controller {
310*4882a593Smuzhiyun	status = "okay";
311*4882a593Smuzhiyun
312*4882a593Smuzhiyun	nand@0 {
313*4882a593Smuzhiyun		reg = <0>;
314*4882a593Smuzhiyun		label = "pxa3xx_nand-0";
315*4882a593Smuzhiyun		nand-rb = <0>;
316*4882a593Smuzhiyun		marvell,nand-keep-config;
317*4882a593Smuzhiyun		nand-on-flash-bbt;
318*4882a593Smuzhiyun
319*4882a593Smuzhiyun		/* Use Hardware BCH ECC */
320*4882a593Smuzhiyun		nand-ecc-strength = <4>;
321*4882a593Smuzhiyun		nand-ecc-step-size = <512>;
322*4882a593Smuzhiyun
323*4882a593Smuzhiyun		partitions {
324*4882a593Smuzhiyun			compatible = "fixed-partitions";
325*4882a593Smuzhiyun			#address-cells = <1>;
326*4882a593Smuzhiyun			#size-cells = <1>;
327*4882a593Smuzhiyun
328*4882a593Smuzhiyun			partition@0 {
329*4882a593Smuzhiyun				label = "u-boot";
330*4882a593Smuzhiyun				reg = <0x0000000 0x180000>;  /* 1.5MB */
331*4882a593Smuzhiyun				read-only;
332*4882a593Smuzhiyun			};
333*4882a593Smuzhiyun
334*4882a593Smuzhiyun			partition@180000 {
335*4882a593Smuzhiyun				label = "u-boot-env";
336*4882a593Smuzhiyun				reg = <0x180000 0x20000>;    /* 128KB */
337*4882a593Smuzhiyun				read-only;
338*4882a593Smuzhiyun			};
339*4882a593Smuzhiyun
340*4882a593Smuzhiyun			partition@200000 {
341*4882a593Smuzhiyun				label = "uImage";
342*4882a593Smuzhiyun				reg = <0x0200000 0x600000>;    /* 6MB */
343*4882a593Smuzhiyun			};
344*4882a593Smuzhiyun
345*4882a593Smuzhiyun			partition@800000 {
346*4882a593Smuzhiyun				label = "minirootfs";
347*4882a593Smuzhiyun				reg = <0x0800000 0x400000>;    /* 4MB */
348*4882a593Smuzhiyun			};
349*4882a593Smuzhiyun
350*4882a593Smuzhiyun			/* Last MB is for the BBT, i.e. not writable */
351*4882a593Smuzhiyun			partition@c00000 {
352*4882a593Smuzhiyun				label = "ubifs";
353*4882a593Smuzhiyun				reg = <0x0c00000 0x7400000>; /* 116MB */
354*4882a593Smuzhiyun			};
355*4882a593Smuzhiyun		};
356*4882a593Smuzhiyun	};
357*4882a593Smuzhiyun};
358