1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0 OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Device Tree file for the Linksys WRT1900AC (Mamba). 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Note: this board is shipped with a new generation boot loader that 6*4882a593Smuzhiyun * remaps internal registers at 0xf1000000. Therefore, if earlyprintk 7*4882a593Smuzhiyun * is used, the CONFIG_DEBUG_MVEBU_UART0_ALTERNATE option should be 8*4882a593Smuzhiyun * used. 9*4882a593Smuzhiyun * 10*4882a593Smuzhiyun * Copyright (C) 2014 Imre Kaloz <kaloz@openwrt.org> 11*4882a593Smuzhiyun * 12*4882a593Smuzhiyun * Based on armada-xp-axpwifiap.dts: 13*4882a593Smuzhiyun * 14*4882a593Smuzhiyun * Copyright (C) 2013 Marvell 15*4882a593Smuzhiyun * 16*4882a593Smuzhiyun * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 17*4882a593Smuzhiyun */ 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun/dts-v1/; 20*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h> 21*4882a593Smuzhiyun#include <dt-bindings/input/input.h> 22*4882a593Smuzhiyun#include "armada-xp-mv78230.dtsi" 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun/ { 25*4882a593Smuzhiyun model = "Linksys WRT1900AC"; 26*4882a593Smuzhiyun compatible = "linksys,mamba", "marvell,armadaxp-mv78230", 27*4882a593Smuzhiyun "marvell,armadaxp", "marvell,armada-370-xp"; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun chosen { 30*4882a593Smuzhiyun bootargs = "console=ttyS0,115200"; 31*4882a593Smuzhiyun stdout-path = &uart0; 32*4882a593Smuzhiyun }; 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun memory@0 { 35*4882a593Smuzhiyun device_type = "memory"; 36*4882a593Smuzhiyun reg = <0x00000000 0x00000000 0x00000000 0x10000000>; /* 256MB */ 37*4882a593Smuzhiyun }; 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun soc { 40*4882a593Smuzhiyun ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000 41*4882a593Smuzhiyun MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000 42*4882a593Smuzhiyun MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000 43*4882a593Smuzhiyun MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000 44*4882a593Smuzhiyun MBUS_ID(0x0c, 0x04) 0 0 0xf1200000 0x100000>; 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun internal-regs { 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun rtc@10300 { 49*4882a593Smuzhiyun /* No crystal connected to the internal RTC */ 50*4882a593Smuzhiyun status = "disabled"; 51*4882a593Smuzhiyun }; 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun /* J10: VCC, NC, RX, NC, TX, GND */ 54*4882a593Smuzhiyun serial@12000 { 55*4882a593Smuzhiyun status = "okay"; 56*4882a593Smuzhiyun }; 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun sata@a0000 { 59*4882a593Smuzhiyun nr-ports = <1>; 60*4882a593Smuzhiyun status = "okay"; 61*4882a593Smuzhiyun }; 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun ethernet@70000 { 64*4882a593Smuzhiyun pinctrl-0 = <&ge0_rgmii_pins>; 65*4882a593Smuzhiyun pinctrl-names = "default"; 66*4882a593Smuzhiyun status = "okay"; 67*4882a593Smuzhiyun phy-mode = "rgmii-id"; 68*4882a593Smuzhiyun buffer-manager = <&bm>; 69*4882a593Smuzhiyun bm,pool-long = <0>; 70*4882a593Smuzhiyun bm,pool-short = <1>; 71*4882a593Smuzhiyun fixed-link { 72*4882a593Smuzhiyun speed = <1000>; 73*4882a593Smuzhiyun full-duplex; 74*4882a593Smuzhiyun }; 75*4882a593Smuzhiyun }; 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun ethernet@74000 { 78*4882a593Smuzhiyun pinctrl-0 = <&ge1_rgmii_pins>; 79*4882a593Smuzhiyun pinctrl-names = "default"; 80*4882a593Smuzhiyun status = "okay"; 81*4882a593Smuzhiyun phy-mode = "rgmii-id"; 82*4882a593Smuzhiyun buffer-manager = <&bm>; 83*4882a593Smuzhiyun bm,pool-long = <2>; 84*4882a593Smuzhiyun bm,pool-short = <3>; 85*4882a593Smuzhiyun fixed-link { 86*4882a593Smuzhiyun speed = <1000>; 87*4882a593Smuzhiyun full-duplex; 88*4882a593Smuzhiyun }; 89*4882a593Smuzhiyun }; 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun /* USB part of the eSATA/USB 2.0 port */ 92*4882a593Smuzhiyun usb@50000 { 93*4882a593Smuzhiyun status = "okay"; 94*4882a593Smuzhiyun }; 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun i2c@11000 { 97*4882a593Smuzhiyun status = "okay"; 98*4882a593Smuzhiyun clock-frequency = <100000>; 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun tmp421@4c { 101*4882a593Smuzhiyun compatible = "ti,tmp421"; 102*4882a593Smuzhiyun reg = <0x4c>; 103*4882a593Smuzhiyun }; 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun tlc59116@68 { 106*4882a593Smuzhiyun #address-cells = <1>; 107*4882a593Smuzhiyun #size-cells = <0>; 108*4882a593Smuzhiyun #gpio-cells = <2>; 109*4882a593Smuzhiyun compatible = "ti,tlc59116"; 110*4882a593Smuzhiyun reg = <0x68>; 111*4882a593Smuzhiyun 112*4882a593Smuzhiyun wan_amber@0 { 113*4882a593Smuzhiyun label = "mamba:amber:wan"; 114*4882a593Smuzhiyun reg = <0x0>; 115*4882a593Smuzhiyun }; 116*4882a593Smuzhiyun 117*4882a593Smuzhiyun wan_white@1 { 118*4882a593Smuzhiyun label = "mamba:white:wan"; 119*4882a593Smuzhiyun reg = <0x1>; 120*4882a593Smuzhiyun }; 121*4882a593Smuzhiyun 122*4882a593Smuzhiyun wlan_2g@2 { 123*4882a593Smuzhiyun label = "mamba:white:wlan_2g"; 124*4882a593Smuzhiyun reg = <0x2>; 125*4882a593Smuzhiyun }; 126*4882a593Smuzhiyun 127*4882a593Smuzhiyun wlan_5g@3 { 128*4882a593Smuzhiyun label = "mamba:white:wlan_5g"; 129*4882a593Smuzhiyun reg = <0x3>; 130*4882a593Smuzhiyun }; 131*4882a593Smuzhiyun 132*4882a593Smuzhiyun esata@4 { 133*4882a593Smuzhiyun label = "mamba:white:esata"; 134*4882a593Smuzhiyun reg = <0x4>; 135*4882a593Smuzhiyun linux,default-trigger = "disk-activity"; 136*4882a593Smuzhiyun }; 137*4882a593Smuzhiyun 138*4882a593Smuzhiyun usb2@5 { 139*4882a593Smuzhiyun label = "mamba:white:usb2"; 140*4882a593Smuzhiyun reg = <0x5>; 141*4882a593Smuzhiyun }; 142*4882a593Smuzhiyun 143*4882a593Smuzhiyun usb3_1@6 { 144*4882a593Smuzhiyun label = "mamba:white:usb3_1"; 145*4882a593Smuzhiyun reg = <0x6>; 146*4882a593Smuzhiyun }; 147*4882a593Smuzhiyun 148*4882a593Smuzhiyun usb3_2@7 { 149*4882a593Smuzhiyun label = "mamba:white:usb3_2"; 150*4882a593Smuzhiyun reg = <0x7>; 151*4882a593Smuzhiyun }; 152*4882a593Smuzhiyun 153*4882a593Smuzhiyun wps_white@8 { 154*4882a593Smuzhiyun label = "mamba:white:wps"; 155*4882a593Smuzhiyun reg = <0x8>; 156*4882a593Smuzhiyun }; 157*4882a593Smuzhiyun 158*4882a593Smuzhiyun wps_amber@9 { 159*4882a593Smuzhiyun label = "mamba:amber:wps"; 160*4882a593Smuzhiyun reg = <0x9>; 161*4882a593Smuzhiyun }; 162*4882a593Smuzhiyun }; 163*4882a593Smuzhiyun }; 164*4882a593Smuzhiyun 165*4882a593Smuzhiyun bm@c8000 { 166*4882a593Smuzhiyun status = "okay"; 167*4882a593Smuzhiyun }; 168*4882a593Smuzhiyun }; 169*4882a593Smuzhiyun 170*4882a593Smuzhiyun bm-bppi { 171*4882a593Smuzhiyun status = "okay"; 172*4882a593Smuzhiyun }; 173*4882a593Smuzhiyun }; 174*4882a593Smuzhiyun 175*4882a593Smuzhiyun gpio_keys { 176*4882a593Smuzhiyun compatible = "gpio-keys"; 177*4882a593Smuzhiyun #address-cells = <1>; 178*4882a593Smuzhiyun #size-cells = <0>; 179*4882a593Smuzhiyun pinctrl-0 = <&keys_pin>; 180*4882a593Smuzhiyun pinctrl-names = "default"; 181*4882a593Smuzhiyun 182*4882a593Smuzhiyun wps { 183*4882a593Smuzhiyun label = "WPS"; 184*4882a593Smuzhiyun linux,code = <KEY_WPS_BUTTON>; 185*4882a593Smuzhiyun gpios = <&gpio1 0 GPIO_ACTIVE_LOW>; 186*4882a593Smuzhiyun }; 187*4882a593Smuzhiyun 188*4882a593Smuzhiyun reset { 189*4882a593Smuzhiyun label = "Factory Reset Button"; 190*4882a593Smuzhiyun linux,code = <KEY_RESTART>; 191*4882a593Smuzhiyun gpios = <&gpio1 1 GPIO_ACTIVE_LOW>; 192*4882a593Smuzhiyun }; 193*4882a593Smuzhiyun }; 194*4882a593Smuzhiyun 195*4882a593Smuzhiyun gpio-leds { 196*4882a593Smuzhiyun compatible = "gpio-leds"; 197*4882a593Smuzhiyun pinctrl-0 = <&power_led_pin>; 198*4882a593Smuzhiyun pinctrl-names = "default"; 199*4882a593Smuzhiyun 200*4882a593Smuzhiyun power { 201*4882a593Smuzhiyun label = "mamba:white:power"; 202*4882a593Smuzhiyun gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>; 203*4882a593Smuzhiyun default-state = "on"; 204*4882a593Smuzhiyun }; 205*4882a593Smuzhiyun }; 206*4882a593Smuzhiyun 207*4882a593Smuzhiyun pwm_fan { 208*4882a593Smuzhiyun /* SUNON HA4010V4-0000-C99 */ 209*4882a593Smuzhiyun 210*4882a593Smuzhiyun compatible = "pwm-fan"; 211*4882a593Smuzhiyun pwms = <&gpio0 24 4000>; 212*4882a593Smuzhiyun }; 213*4882a593Smuzhiyun}; 214*4882a593Smuzhiyun 215*4882a593Smuzhiyun&pciec { 216*4882a593Smuzhiyun status = "okay"; 217*4882a593Smuzhiyun 218*4882a593Smuzhiyun /* Etron EJ168 USB 3.0 controller */ 219*4882a593Smuzhiyun pcie@1,0 { 220*4882a593Smuzhiyun /* Port 0, Lane 0 */ 221*4882a593Smuzhiyun status = "okay"; 222*4882a593Smuzhiyun }; 223*4882a593Smuzhiyun 224*4882a593Smuzhiyun /* First mini-PCIe port */ 225*4882a593Smuzhiyun pcie@2,0 { 226*4882a593Smuzhiyun /* Port 0, Lane 1 */ 227*4882a593Smuzhiyun status = "okay"; 228*4882a593Smuzhiyun }; 229*4882a593Smuzhiyun 230*4882a593Smuzhiyun /* Second mini-PCIe port */ 231*4882a593Smuzhiyun pcie@3,0 { 232*4882a593Smuzhiyun /* Port 0, Lane 3 */ 233*4882a593Smuzhiyun status = "okay"; 234*4882a593Smuzhiyun }; 235*4882a593Smuzhiyun}; 236*4882a593Smuzhiyun 237*4882a593Smuzhiyun&pinctrl { 238*4882a593Smuzhiyun 239*4882a593Smuzhiyun keys_pin: keys-pin { 240*4882a593Smuzhiyun marvell,pins = "mpp32", "mpp33"; 241*4882a593Smuzhiyun marvell,function = "gpio"; 242*4882a593Smuzhiyun }; 243*4882a593Smuzhiyun 244*4882a593Smuzhiyun power_led_pin: power-led-pin { 245*4882a593Smuzhiyun marvell,pins = "mpp40"; 246*4882a593Smuzhiyun marvell,function = "gpio"; 247*4882a593Smuzhiyun }; 248*4882a593Smuzhiyun 249*4882a593Smuzhiyun gpio_fan_pin: gpio-fan-pin { 250*4882a593Smuzhiyun marvell,pins = "mpp24"; 251*4882a593Smuzhiyun marvell,function = "gpio"; 252*4882a593Smuzhiyun }; 253*4882a593Smuzhiyun}; 254*4882a593Smuzhiyun 255*4882a593Smuzhiyun&spi0 { 256*4882a593Smuzhiyun status = "okay"; 257*4882a593Smuzhiyun 258*4882a593Smuzhiyun spi-flash@0 { 259*4882a593Smuzhiyun #address-cells = <1>; 260*4882a593Smuzhiyun #size-cells = <1>; 261*4882a593Smuzhiyun compatible = "everspin,mr25h256"; 262*4882a593Smuzhiyun reg = <0>; /* Chip select 0 */ 263*4882a593Smuzhiyun spi-max-frequency = <40000000>; 264*4882a593Smuzhiyun }; 265*4882a593Smuzhiyun}; 266*4882a593Smuzhiyun 267*4882a593Smuzhiyun&mdio { 268*4882a593Smuzhiyun status = "okay"; 269*4882a593Smuzhiyun 270*4882a593Smuzhiyun switch@0 { 271*4882a593Smuzhiyun compatible = "marvell,mv88e6085"; 272*4882a593Smuzhiyun #address-cells = <1>; 273*4882a593Smuzhiyun #size-cells = <0>; 274*4882a593Smuzhiyun reg = <0>; 275*4882a593Smuzhiyun 276*4882a593Smuzhiyun ports { 277*4882a593Smuzhiyun #address-cells = <1>; 278*4882a593Smuzhiyun #size-cells = <0>; 279*4882a593Smuzhiyun 280*4882a593Smuzhiyun port@0 { 281*4882a593Smuzhiyun reg = <0>; 282*4882a593Smuzhiyun label = "lan4"; 283*4882a593Smuzhiyun }; 284*4882a593Smuzhiyun 285*4882a593Smuzhiyun port@1 { 286*4882a593Smuzhiyun reg = <1>; 287*4882a593Smuzhiyun label = "lan3"; 288*4882a593Smuzhiyun }; 289*4882a593Smuzhiyun 290*4882a593Smuzhiyun port@2 { 291*4882a593Smuzhiyun reg = <2>; 292*4882a593Smuzhiyun label = "lan2"; 293*4882a593Smuzhiyun }; 294*4882a593Smuzhiyun 295*4882a593Smuzhiyun port@3 { 296*4882a593Smuzhiyun reg = <3>; 297*4882a593Smuzhiyun label = "lan1"; 298*4882a593Smuzhiyun }; 299*4882a593Smuzhiyun 300*4882a593Smuzhiyun port@4 { 301*4882a593Smuzhiyun reg = <4>; 302*4882a593Smuzhiyun label = "internet"; 303*4882a593Smuzhiyun }; 304*4882a593Smuzhiyun 305*4882a593Smuzhiyun port@5 { 306*4882a593Smuzhiyun reg = <5>; 307*4882a593Smuzhiyun label = "cpu"; 308*4882a593Smuzhiyun ethernet = <ð0>; 309*4882a593Smuzhiyun fixed-link { 310*4882a593Smuzhiyun speed = <1000>; 311*4882a593Smuzhiyun full-duplex; 312*4882a593Smuzhiyun }; 313*4882a593Smuzhiyun }; 314*4882a593Smuzhiyun }; 315*4882a593Smuzhiyun }; 316*4882a593Smuzhiyun}; 317*4882a593Smuzhiyun 318*4882a593Smuzhiyun&nand_controller { 319*4882a593Smuzhiyun status = "okay"; 320*4882a593Smuzhiyun 321*4882a593Smuzhiyun nand@0 { 322*4882a593Smuzhiyun reg = <0>; 323*4882a593Smuzhiyun label = "pxa3xx_nand-0"; 324*4882a593Smuzhiyun nand-rb = <0>; 325*4882a593Smuzhiyun marvell,nand-keep-config; 326*4882a593Smuzhiyun nand-on-flash-bbt; 327*4882a593Smuzhiyun nand-ecc-strength = <4>; 328*4882a593Smuzhiyun nand-ecc-step-size = <512>; 329*4882a593Smuzhiyun 330*4882a593Smuzhiyun partitions { 331*4882a593Smuzhiyun compatible = "fixed-partitions"; 332*4882a593Smuzhiyun #address-cells = <1>; 333*4882a593Smuzhiyun #size-cells = <1>; 334*4882a593Smuzhiyun 335*4882a593Smuzhiyun partition@0 { 336*4882a593Smuzhiyun label = "u-boot"; 337*4882a593Smuzhiyun reg = <0x0000000 0x100000>; /* 1MB */ 338*4882a593Smuzhiyun read-only; 339*4882a593Smuzhiyun }; 340*4882a593Smuzhiyun 341*4882a593Smuzhiyun partition@100000 { 342*4882a593Smuzhiyun label = "u_env"; 343*4882a593Smuzhiyun reg = <0x100000 0x40000>; /* 256KB */ 344*4882a593Smuzhiyun }; 345*4882a593Smuzhiyun 346*4882a593Smuzhiyun partition@140000 { 347*4882a593Smuzhiyun label = "s_env"; 348*4882a593Smuzhiyun reg = <0x140000 0x40000>; /* 256KB */ 349*4882a593Smuzhiyun }; 350*4882a593Smuzhiyun 351*4882a593Smuzhiyun partition@900000 { 352*4882a593Smuzhiyun label = "devinfo"; 353*4882a593Smuzhiyun reg = <0x900000 0x100000>; /* 1MB */ 354*4882a593Smuzhiyun read-only; 355*4882a593Smuzhiyun }; 356*4882a593Smuzhiyun 357*4882a593Smuzhiyun /* kernel1 overlaps with rootfs1 by design */ 358*4882a593Smuzhiyun partition@a00000 { 359*4882a593Smuzhiyun label = "kernel1"; 360*4882a593Smuzhiyun reg = <0xa00000 0x2800000>; /* 40MB */ 361*4882a593Smuzhiyun }; 362*4882a593Smuzhiyun 363*4882a593Smuzhiyun partition@d00000 { 364*4882a593Smuzhiyun label = "rootfs1"; 365*4882a593Smuzhiyun reg = <0xd00000 0x2500000>; /* 37MB */ 366*4882a593Smuzhiyun }; 367*4882a593Smuzhiyun 368*4882a593Smuzhiyun /* kernel2 overlaps with rootfs2 by design */ 369*4882a593Smuzhiyun partition@3200000 { 370*4882a593Smuzhiyun label = "kernel2"; 371*4882a593Smuzhiyun reg = <0x3200000 0x2800000>; /* 40MB */ 372*4882a593Smuzhiyun }; 373*4882a593Smuzhiyun 374*4882a593Smuzhiyun partition@3500000 { 375*4882a593Smuzhiyun label = "rootfs2"; 376*4882a593Smuzhiyun reg = <0x3500000 0x2500000>; /* 37MB */ 377*4882a593Smuzhiyun }; 378*4882a593Smuzhiyun 379*4882a593Smuzhiyun /* 380*4882a593Smuzhiyun * 38MB, last MB is for the BBT, not writable 381*4882a593Smuzhiyun */ 382*4882a593Smuzhiyun partition@5a00000 { 383*4882a593Smuzhiyun label = "syscfg"; 384*4882a593Smuzhiyun reg = <0x5a00000 0x2600000>; 385*4882a593Smuzhiyun }; 386*4882a593Smuzhiyun 387*4882a593Smuzhiyun /* 388*4882a593Smuzhiyun * Unused area between "s_env" and "devinfo". 389*4882a593Smuzhiyun * Moved here because otherwise the renumbered 390*4882a593Smuzhiyun * partitions would break the bootloader 391*4882a593Smuzhiyun * supplied bootargs 392*4882a593Smuzhiyun */ 393*4882a593Smuzhiyun partition@180000 { 394*4882a593Smuzhiyun label = "unused_area"; 395*4882a593Smuzhiyun reg = <0x180000 0x780000>; /* 7.5MB */ 396*4882a593Smuzhiyun }; 397*4882a593Smuzhiyun }; 398*4882a593Smuzhiyun }; 399*4882a593Smuzhiyun}; 400