1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Device Tree Include file for Marvell Armada 398 SoC. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2015 Marvell 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun#include "armada-395.dtsi" 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun/ { 13*4882a593Smuzhiyun compatible = "marvell,armada398", "marvell,armada390"; 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun soc { 16*4882a593Smuzhiyun internal-regs { 17*4882a593Smuzhiyun pinctrl@18000 { 18*4882a593Smuzhiyun compatible = "marvell,mv88f6928-pinctrl"; 19*4882a593Smuzhiyun reg = <0x18000 0x20>; 20*4882a593Smuzhiyun }; 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun sata@e0000 { 23*4882a593Smuzhiyun compatible = "marvell,armada-380-ahci"; 24*4882a593Smuzhiyun reg = <0xe0000 0x2000>; 25*4882a593Smuzhiyun interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; 26*4882a593Smuzhiyun clocks = <&gateclk 30>; 27*4882a593Smuzhiyun status = "disabled"; 28*4882a593Smuzhiyun }; 29*4882a593Smuzhiyun }; 30*4882a593Smuzhiyun }; 31*4882a593Smuzhiyun}; 32