1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Device Tree Include file for Marvell Armada 398 Development Board 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2015 Marvell 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun/dts-v1/; 11*4882a593Smuzhiyun#include "armada-398.dtsi" 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun/ { 14*4882a593Smuzhiyun model = "Marvell Armada 398 Development Board"; 15*4882a593Smuzhiyun compatible = "marvell,a398-db", "marvell,armada398", "marvell,armada390"; 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun chosen { 18*4882a593Smuzhiyun stdout-path = "serial0:115200n8"; 19*4882a593Smuzhiyun }; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun memory { 22*4882a593Smuzhiyun device_type = "memory"; 23*4882a593Smuzhiyun reg = <0x00000000 0x80000000>; /* 2 GB */ 24*4882a593Smuzhiyun }; 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun soc { 27*4882a593Smuzhiyun ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000 28*4882a593Smuzhiyun MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>; 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun internal-regs { 31*4882a593Smuzhiyun i2c@11000 { 32*4882a593Smuzhiyun pinctrl-0 = <&i2c0_pins>; 33*4882a593Smuzhiyun pinctrl-names = "default"; 34*4882a593Smuzhiyun status = "okay"; 35*4882a593Smuzhiyun clock-frequency = <100000>; 36*4882a593Smuzhiyun }; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun serial@12000 { 39*4882a593Smuzhiyun pinctrl-0 = <&uart0_pins>; 40*4882a593Smuzhiyun pinctrl-names = "default"; 41*4882a593Smuzhiyun status = "okay"; 42*4882a593Smuzhiyun }; 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun serial@12100 { 45*4882a593Smuzhiyun pinctrl-0 = <&uart1_pins>; 46*4882a593Smuzhiyun pinctrl-names = "default"; 47*4882a593Smuzhiyun status = "okay"; 48*4882a593Smuzhiyun }; 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun usb@58000 { 51*4882a593Smuzhiyun status = "okay"; 52*4882a593Smuzhiyun }; 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun usb3@f8000 { 55*4882a593Smuzhiyun status = "okay"; 56*4882a593Smuzhiyun }; 57*4882a593Smuzhiyun }; 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun pcie { 60*4882a593Smuzhiyun status = "okay"; 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun pcie@1,0 { 63*4882a593Smuzhiyun status = "okay"; 64*4882a593Smuzhiyun }; 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun pcie@2,0 { 67*4882a593Smuzhiyun status = "okay"; 68*4882a593Smuzhiyun }; 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun pcie@3,0 { 71*4882a593Smuzhiyun status = "okay"; 72*4882a593Smuzhiyun }; 73*4882a593Smuzhiyun }; 74*4882a593Smuzhiyun }; 75*4882a593Smuzhiyun}; 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun&spi1 { 78*4882a593Smuzhiyun status = "okay"; 79*4882a593Smuzhiyun pinctrl-0 = <&spi1_pins>; 80*4882a593Smuzhiyun pinctrl-names = "default"; 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun spi-flash@0 { 83*4882a593Smuzhiyun #address-cells = <1>; 84*4882a593Smuzhiyun #size-cells = <0>; 85*4882a593Smuzhiyun compatible = "n25q128a13", "jedec,spi-nor"; 86*4882a593Smuzhiyun reg = <0>; 87*4882a593Smuzhiyun spi-max-frequency = <108000000>; 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun partition@0 { 90*4882a593Smuzhiyun label = "U-Boot"; 91*4882a593Smuzhiyun reg = <0 0x400000>; 92*4882a593Smuzhiyun }; 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun partition@400000 { 95*4882a593Smuzhiyun label = "Filesystem"; 96*4882a593Smuzhiyun reg = <0x400000 0x1000000>; 97*4882a593Smuzhiyun }; 98*4882a593Smuzhiyun }; 99*4882a593Smuzhiyun}; 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun&nand_controller { 102*4882a593Smuzhiyun status = "okay"; 103*4882a593Smuzhiyun pinctrl-0 = <&nand_pins>; 104*4882a593Smuzhiyun pinctrl-names = "default"; 105*4882a593Smuzhiyun 106*4882a593Smuzhiyun nand@0 { 107*4882a593Smuzhiyun reg = <0>; 108*4882a593Smuzhiyun label = "pxa3xx_nand-0"; 109*4882a593Smuzhiyun nand-rb = <0>; 110*4882a593Smuzhiyun marvell,nand-keep-config; 111*4882a593Smuzhiyun nand-on-flash-bbt; 112*4882a593Smuzhiyun nand-ecc-strength = <8>; 113*4882a593Smuzhiyun nand-ecc-step-size = <512>; 114*4882a593Smuzhiyun 115*4882a593Smuzhiyun partitions { 116*4882a593Smuzhiyun compatible = "fixed-partitions"; 117*4882a593Smuzhiyun #address-cells = <1>; 118*4882a593Smuzhiyun #size-cells = <1>; 119*4882a593Smuzhiyun 120*4882a593Smuzhiyun partition@0 { 121*4882a593Smuzhiyun label = "U-Boot"; 122*4882a593Smuzhiyun reg = <0 0x800000>; 123*4882a593Smuzhiyun }; 124*4882a593Smuzhiyun partition@800000 { 125*4882a593Smuzhiyun label = "Linux"; 126*4882a593Smuzhiyun reg = <0x800000 0x800000>; 127*4882a593Smuzhiyun }; 128*4882a593Smuzhiyun partition@1000000 { 129*4882a593Smuzhiyun label = "Filesystem"; 130*4882a593Smuzhiyun reg = <0x1000000 0x3f000000>; 131*4882a593Smuzhiyun }; 132*4882a593Smuzhiyun }; 133*4882a593Smuzhiyun }; 134*4882a593Smuzhiyun}; 135