xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/armada-390-db.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Device Tree file for Marvell Armada 390 Development Board
4*4882a593Smuzhiyun * (DB-88F6920)
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Copyright (C) 2016 Marvell
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * Grzegorz Jaszczyk <jaz@semihalf.com>
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun/dts-v1/;
12*4882a593Smuzhiyun#include "armada-390.dtsi"
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun/ {
15*4882a593Smuzhiyun	model = "Marvell Armada 390 Development Board";
16*4882a593Smuzhiyun	compatible = "marvell,a390-db", "marvell,armada390";
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun	chosen {
19*4882a593Smuzhiyun		stdout-path = "serial0:115200n8";
20*4882a593Smuzhiyun	};
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun	memory {
23*4882a593Smuzhiyun		device_type = "memory";
24*4882a593Smuzhiyun		reg = <0x00000000 0x80000000>; /* 2 GB */
25*4882a593Smuzhiyun	};
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun	soc {
28*4882a593Smuzhiyun		ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
29*4882a593Smuzhiyun			  MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun		internal-regs {
32*4882a593Smuzhiyun			i2c@11000 {
33*4882a593Smuzhiyun				status = "okay";
34*4882a593Smuzhiyun				clock-frequency = <100000>;
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun				eeprom@50 {
37*4882a593Smuzhiyun					compatible = "atmel,24c64";
38*4882a593Smuzhiyun					reg = <0x50>;
39*4882a593Smuzhiyun				};
40*4882a593Smuzhiyun			};
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun			/* CON104 */
43*4882a593Smuzhiyun			serial@12000 {
44*4882a593Smuzhiyun				status = "okay";
45*4882a593Smuzhiyun			};
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun			/* CON97 */
48*4882a593Smuzhiyun			usb@58000 {
49*4882a593Smuzhiyun				status = "okay";
50*4882a593Smuzhiyun			};
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun			/* CON98 */
53*4882a593Smuzhiyun			usb3@f8000 {
54*4882a593Smuzhiyun				status = "okay";
55*4882a593Smuzhiyun			};
56*4882a593Smuzhiyun		};
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun		pcie {
59*4882a593Smuzhiyun			status = "okay";
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun			/* CON30 */
62*4882a593Smuzhiyun			pcie@1,0 {
63*4882a593Smuzhiyun				status = "okay";
64*4882a593Smuzhiyun			};
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun			/* CON44 */
67*4882a593Smuzhiyun			pcie@2,0 {
68*4882a593Smuzhiyun				status = "okay";
69*4882a593Smuzhiyun			};
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun			/* CON61 */
72*4882a593Smuzhiyun			pcie@3,0 {
73*4882a593Smuzhiyun				status = "okay";
74*4882a593Smuzhiyun			};
75*4882a593Smuzhiyun		};
76*4882a593Smuzhiyun	};
77*4882a593Smuzhiyun};
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun&spi1 {
80*4882a593Smuzhiyun	status = "okay";
81*4882a593Smuzhiyun	pinctrl-0 = <&spi1_pins>;
82*4882a593Smuzhiyun	pinctrl-names = "default";
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun	spi-flash@1 {
85*4882a593Smuzhiyun		#address-cells = <1>;
86*4882a593Smuzhiyun		#size-cells = <1>;
87*4882a593Smuzhiyun		compatible = "n25q128a13",
88*4882a593Smuzhiyun			     "jedec,spi-nor";
89*4882a593Smuzhiyun		reg = <0>; /* Chip select 0 */
90*4882a593Smuzhiyun		spi-max-frequency = <108000000>;
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun		partitions {
93*4882a593Smuzhiyun			compatible = "fixed-partitions";
94*4882a593Smuzhiyun			#address-cells = <1>;
95*4882a593Smuzhiyun			#size-cells = <1>;
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun			partition@0 {
98*4882a593Smuzhiyun				label = "U-Boot";
99*4882a593Smuzhiyun				reg = <0 0x400000>;
100*4882a593Smuzhiyun			};
101*4882a593Smuzhiyun			partition@400000 {
102*4882a593Smuzhiyun				label = "Filesystem";
103*4882a593Smuzhiyun				reg = <0x400000 0xc00000>;
104*4882a593Smuzhiyun			};
105*4882a593Smuzhiyun		};
106*4882a593Smuzhiyun	};
107*4882a593Smuzhiyun};
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun&nand_controller {
110*4882a593Smuzhiyun	status = "okay";
111*4882a593Smuzhiyun	pinctrl-0 = <&nand_pins>;
112*4882a593Smuzhiyun	pinctrl-names = "default";
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun	nand@0 {
115*4882a593Smuzhiyun		reg = <0>;
116*4882a593Smuzhiyun		label = "pxa3xx_nand-0";
117*4882a593Smuzhiyun		nand-rb = <0>;
118*4882a593Smuzhiyun		marvell,nand-keep-config;
119*4882a593Smuzhiyun		nand-on-flash-bbt;
120*4882a593Smuzhiyun		nand-ecc-strength = <8>;
121*4882a593Smuzhiyun		nand-ecc-step-size = <512>;
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun		partitions {
124*4882a593Smuzhiyun			compatible = "fixed-partitions";
125*4882a593Smuzhiyun			#address-cells = <1>;
126*4882a593Smuzhiyun			#size-cells = <1>;
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun			partition@0 {
129*4882a593Smuzhiyun				label = "U-Boot";
130*4882a593Smuzhiyun				reg = <0 0x800000>;
131*4882a593Smuzhiyun			};
132*4882a593Smuzhiyun			partition@800000 {
133*4882a593Smuzhiyun				label = "Linux";
134*4882a593Smuzhiyun				reg = <0x800000 0x800000>;
135*4882a593Smuzhiyun			};
136*4882a593Smuzhiyun			partition@1000000 {
137*4882a593Smuzhiyun				label = "Filesystem";
138*4882a593Smuzhiyun				reg = <0x1000000 0x3f000000>;
139*4882a593Smuzhiyun			};
140*4882a593Smuzhiyun		};
141*4882a593Smuzhiyun	};
142*4882a593Smuzhiyun};
143