xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/armada-388-clearfog-base.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981) 
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Device Tree file for SolidRun Clearfog Base revision A1 rev 2.0 (88F6828)
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun *  Copyright (C) 2015 Russell King
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun/dts-v1/;
9*4882a593Smuzhiyun#include "armada-388-clearfog.dtsi"
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun/ {
12*4882a593Smuzhiyun	model = "SolidRun Clearfog Base A1";
13*4882a593Smuzhiyun	compatible = "solidrun,clearfog-base-a1",
14*4882a593Smuzhiyun		"solidrun,clearfog-a1", "marvell,armada388",
15*4882a593Smuzhiyun		"marvell,armada385", "marvell,armada380";
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun	gpio-keys {
18*4882a593Smuzhiyun		compatible = "gpio-keys";
19*4882a593Smuzhiyun		pinctrl-0 = <&rear_button_pins>;
20*4882a593Smuzhiyun		pinctrl-names = "default";
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun		button_0 {
23*4882a593Smuzhiyun			/* The rear SW3 button */
24*4882a593Smuzhiyun			label = "Rear Button";
25*4882a593Smuzhiyun			gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
26*4882a593Smuzhiyun			linux,can-disable;
27*4882a593Smuzhiyun			linux,code = <BTN_0>;
28*4882a593Smuzhiyun		};
29*4882a593Smuzhiyun	};
30*4882a593Smuzhiyun};
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun&eth1 {
33*4882a593Smuzhiyun	phy = <&phy1>;
34*4882a593Smuzhiyun};
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun&gpio0 {
37*4882a593Smuzhiyun	phy1_reset {
38*4882a593Smuzhiyun		gpio-hog;
39*4882a593Smuzhiyun		gpios = <19 GPIO_ACTIVE_LOW>;
40*4882a593Smuzhiyun		output-low;
41*4882a593Smuzhiyun		line-name = "phy1-reset";
42*4882a593Smuzhiyun	};
43*4882a593Smuzhiyun};
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun&mdio {
46*4882a593Smuzhiyun	pinctrl-0 = <&mdio_pins &microsom_phy_clk_pins &clearfog_phy_pins>;
47*4882a593Smuzhiyun	phy1: ethernet-phy@1 {
48*4882a593Smuzhiyun		/*
49*4882a593Smuzhiyun		 * Annoyingly, the marvell phy driver configures the LED
50*4882a593Smuzhiyun		 * register, rather than preserving reset-loaded setting.
51*4882a593Smuzhiyun		 * We undo that rubbish here.
52*4882a593Smuzhiyun		 */
53*4882a593Smuzhiyun		marvell,reg-init = <3 16 0 0x101e>;
54*4882a593Smuzhiyun		reg = <1>;
55*4882a593Smuzhiyun	};
56*4882a593Smuzhiyun};
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun&pinctrl {
59*4882a593Smuzhiyun	/* phy1 reset */
60*4882a593Smuzhiyun	clearfog_phy_pins: clearfog-phy-pins {
61*4882a593Smuzhiyun		marvell,pins = "mpp19";
62*4882a593Smuzhiyun		marvell,function = "gpio";
63*4882a593Smuzhiyun	};
64*4882a593Smuzhiyun	rear_button_pins: rear-button-pins {
65*4882a593Smuzhiyun		marvell,pins = "mpp44";
66*4882a593Smuzhiyun		marvell,function = "gpio";
67*4882a593Smuzhiyun	};
68*4882a593Smuzhiyun};
69