xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/armada-385-synology-ds116.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Device Tree file for Synology DS116 NAS
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2017 Willy Tarreau <w@1wt.eu>
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun/dts-v1/;
9*4882a593Smuzhiyun#include "armada-385.dtsi"
10*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h>
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun/ {
13*4882a593Smuzhiyun	model = "Synology DS116";
14*4882a593Smuzhiyun	compatible = "marvell,a385-gp", "marvell,armada385", "marvell,armada380";
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun	chosen {
17*4882a593Smuzhiyun		stdout-path = "serial0:115200n8";
18*4882a593Smuzhiyun	};
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun	memory {
21*4882a593Smuzhiyun		device_type = "memory";
22*4882a593Smuzhiyun		reg = <0x00000000 0x40000000>; /* 1 GB */
23*4882a593Smuzhiyun	};
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun	soc {
26*4882a593Smuzhiyun		ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
27*4882a593Smuzhiyun			  MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
28*4882a593Smuzhiyun			  MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
29*4882a593Smuzhiyun			  MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000
30*4882a593Smuzhiyun			  MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun		internal-regs {
33*4882a593Smuzhiyun			i2c@11000 {
34*4882a593Smuzhiyun				pinctrl-names = "default";
35*4882a593Smuzhiyun				pinctrl-0 = <&i2c0_pins>;
36*4882a593Smuzhiyun				status = "okay";
37*4882a593Smuzhiyun				clock-frequency = <100000>;
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun				eeprom@57 {
40*4882a593Smuzhiyun					compatible = "atmel,24c64";
41*4882a593Smuzhiyun					reg = <0x57>;
42*4882a593Smuzhiyun				};
43*4882a593Smuzhiyun			};
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun			serial@12000 {
46*4882a593Smuzhiyun				pinctrl-names = "default";
47*4882a593Smuzhiyun				pinctrl-0 = <&uart0_pins>;
48*4882a593Smuzhiyun				status = "okay";
49*4882a593Smuzhiyun			};
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun			serial@12100 {
52*4882a593Smuzhiyun				/* A PIC16F1829 is connected to uart1 at 9600 bps,
53*4882a593Smuzhiyun				 * and takes single-character orders :
54*4882a593Smuzhiyun				 *   "1" : power off // already handled by the poweroff node
55*4882a593Smuzhiyun				 *   "2" : short beep
56*4882a593Smuzhiyun				 *   "3" : long beep
57*4882a593Smuzhiyun				 *   "4" : turn the power LED ON
58*4882a593Smuzhiyun				 *   "5" : flash the power LED
59*4882a593Smuzhiyun				 *   "6" : turn the power LED OFF
60*4882a593Smuzhiyun				 *   "7" : turn the status LED OFF
61*4882a593Smuzhiyun				 *   "8" : turn the status LED ON
62*4882a593Smuzhiyun				 *   "9" : flash the status LED
63*4882a593Smuzhiyun				 *   "A" : flash the motherboard LED (D8)
64*4882a593Smuzhiyun				 *   "B" : turn the motherboard LED OFF
65*4882a593Smuzhiyun				 *   "C" : hard reset
66*4882a593Smuzhiyun				 */
67*4882a593Smuzhiyun				pinctrl-names = "default";
68*4882a593Smuzhiyun				pinctrl-0 = <&uart1_pins>;
69*4882a593Smuzhiyun				status = "okay";
70*4882a593Smuzhiyun			};
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun			poweroff@12100 {
73*4882a593Smuzhiyun				compatible = "synology,power-off";
74*4882a593Smuzhiyun				reg = <0x12100 0x100>;
75*4882a593Smuzhiyun				clocks = <&coreclk 0>;
76*4882a593Smuzhiyun			};
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun			ethernet@70000 {
79*4882a593Smuzhiyun				pinctrl-names = "default";
80*4882a593Smuzhiyun				phy = <&phy0>;
81*4882a593Smuzhiyun				phy-mode = "sgmii";
82*4882a593Smuzhiyun				buffer-manager = <&bm>;
83*4882a593Smuzhiyun				bm,pool-long = <0>;
84*4882a593Smuzhiyun				status = "okay";
85*4882a593Smuzhiyun			};
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun			mdio@72004 {
89*4882a593Smuzhiyun				pinctrl-names = "default";
90*4882a593Smuzhiyun				pinctrl-0 = <&mdio_pins>;
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun				phy0: ethernet-phy@1 {
93*4882a593Smuzhiyun					reg = <1>;
94*4882a593Smuzhiyun				};
95*4882a593Smuzhiyun			};
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun			sata@a8000 {
98*4882a593Smuzhiyun				pinctrl-names = "default";
99*4882a593Smuzhiyun				pinctrl-0 = <&sata0_pins>;
100*4882a593Smuzhiyun				status = "okay";
101*4882a593Smuzhiyun				#address-cells = <1>;
102*4882a593Smuzhiyun				#size-cells = <0>;
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun				sata0: sata-port@0 {
105*4882a593Smuzhiyun					reg = <0>;
106*4882a593Smuzhiyun					target-supply = <&reg_5v_sata0>;
107*4882a593Smuzhiyun				};
108*4882a593Smuzhiyun			};
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun			bm@c8000 {
111*4882a593Smuzhiyun				status = "okay";
112*4882a593Smuzhiyun			};
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun			usb3@f0000 {
115*4882a593Smuzhiyun				usb-phy = <&usb3_0_phy>;
116*4882a593Smuzhiyun				status = "okay";
117*4882a593Smuzhiyun			};
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun			usb3@f8000 {
120*4882a593Smuzhiyun				usb-phy = <&usb3_1_phy>;
121*4882a593Smuzhiyun				status = "okay";
122*4882a593Smuzhiyun			};
123*4882a593Smuzhiyun		};
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun		bm-bppi {
126*4882a593Smuzhiyun			status = "okay";
127*4882a593Smuzhiyun		};
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun		gpio-fan {
130*4882a593Smuzhiyun			compatible = "gpio-fan";
131*4882a593Smuzhiyun			gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>,
132*4882a593Smuzhiyun				<&gpio1 17 GPIO_ACTIVE_HIGH>,
133*4882a593Smuzhiyun				<&gpio1 16 GPIO_ACTIVE_HIGH>;
134*4882a593Smuzhiyun			gpio-fan,speed-map = <   0 0
135*4882a593Smuzhiyun					      1500 1
136*4882a593Smuzhiyun					      2500 2
137*4882a593Smuzhiyun					      3000 3
138*4882a593Smuzhiyun					      3400 4
139*4882a593Smuzhiyun					      3700 5
140*4882a593Smuzhiyun					      3900 6
141*4882a593Smuzhiyun					      4000 7>;
142*4882a593Smuzhiyun			#cooling-cells = <2>;
143*4882a593Smuzhiyun		};
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun		gpio-leds {
146*4882a593Smuzhiyun			compatible = "gpio-leds";
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun			/* The green part is on gpio0.20 which is also used by
149*4882a593Smuzhiyun			 * sata0, and accesses to SATA disk 0 make it blink so it
150*4882a593Smuzhiyun			 * doesn't need to be declared here.
151*4882a593Smuzhiyun			 */
152*4882a593Smuzhiyun			orange {
153*4882a593Smuzhiyun				gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
154*4882a593Smuzhiyun				label = "ds116:orange:disk";
155*4882a593Smuzhiyun				default-state = "off";
156*4882a593Smuzhiyun			};
157*4882a593Smuzhiyun		};
158*4882a593Smuzhiyun	};
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun	usb3_0_phy: usb3_0_phy {
161*4882a593Smuzhiyun		compatible = "usb-nop-xceiv";
162*4882a593Smuzhiyun		vcc-supply = <&reg_usb3_0_vbus>;
163*4882a593Smuzhiyun		#phy-cells = <0>;
164*4882a593Smuzhiyun	};
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun	usb3_1_phy: usb3_1_phy {
167*4882a593Smuzhiyun		compatible = "usb-nop-xceiv";
168*4882a593Smuzhiyun		vcc-supply = <&reg_usb3_1_vbus>;
169*4882a593Smuzhiyun		#phy-cells = <0>;
170*4882a593Smuzhiyun	};
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun	reg_usb3_0_vbus: usb3-vbus0 {
173*4882a593Smuzhiyun		compatible = "regulator-fixed";
174*4882a593Smuzhiyun		regulator-name = "usb3-vbus0";
175*4882a593Smuzhiyun		pinctrl-names = "default";
176*4882a593Smuzhiyun		pinctrl-0 = <&xhci0_vbus_pins>;
177*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
178*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
179*4882a593Smuzhiyun		enable-active-high;
180*4882a593Smuzhiyun		gpio = <&gpio1 26 GPIO_ACTIVE_HIGH>;
181*4882a593Smuzhiyun	};
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun	reg_usb3_1_vbus: usb3-vbus1 {
184*4882a593Smuzhiyun		compatible = "regulator-fixed";
185*4882a593Smuzhiyun		regulator-name = "usb3-vbus1";
186*4882a593Smuzhiyun		pinctrl-names = "default";
187*4882a593Smuzhiyun		pinctrl-0 = <&xhci1_vbus_pins>;
188*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
189*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
190*4882a593Smuzhiyun		enable-active-high;
191*4882a593Smuzhiyun		gpio = <&gpio1 27 GPIO_ACTIVE_HIGH>;
192*4882a593Smuzhiyun	};
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun	reg_sata0: pwr-sata0 {
195*4882a593Smuzhiyun		compatible = "regulator-fixed";
196*4882a593Smuzhiyun		regulator-name = "pwr_en_sata0";
197*4882a593Smuzhiyun		regulator-min-microvolt = <12000000>;
198*4882a593Smuzhiyun		regulator-max-microvolt = <12000000>;
199*4882a593Smuzhiyun		enable-active-high;
200*4882a593Smuzhiyun		regulator-boot-on;
201*4882a593Smuzhiyun		gpio = <&gpio0 15 GPIO_ACTIVE_HIGH>;
202*4882a593Smuzhiyun	};
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun	reg_5v_sata0: v5-sata0 {
205*4882a593Smuzhiyun		compatible = "regulator-fixed";
206*4882a593Smuzhiyun		regulator-name = "v5.0-sata0";
207*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
208*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
209*4882a593Smuzhiyun		vin-supply = <&reg_sata0>;
210*4882a593Smuzhiyun	};
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun	reg_12v_sata0: v12-sata0 {
213*4882a593Smuzhiyun		compatible = "regulator-fixed";
214*4882a593Smuzhiyun		regulator-name = "v12.0-sata0";
215*4882a593Smuzhiyun		regulator-min-microvolt = <12000000>;
216*4882a593Smuzhiyun		regulator-max-microvolt = <12000000>;
217*4882a593Smuzhiyun		vin-supply = <&reg_sata0>;
218*4882a593Smuzhiyun	};
219*4882a593Smuzhiyun};
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun&spi0 {
222*4882a593Smuzhiyun	pinctrl-names = "default";
223*4882a593Smuzhiyun	pinctrl-0 = <&spi0_pins>;
224*4882a593Smuzhiyun	status = "okay";
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun	spi-flash@0 {
227*4882a593Smuzhiyun		#address-cells = <1>;
228*4882a593Smuzhiyun		#size-cells = <1>;
229*4882a593Smuzhiyun		compatible = "macronix,mx25l6405d", "jedec,spi-nor";
230*4882a593Smuzhiyun		reg = <0>; /* Chip select 0 */
231*4882a593Smuzhiyun		spi-max-frequency = <50000000>;
232*4882a593Smuzhiyun		m25p,fast-read;
233*4882a593Smuzhiyun
234*4882a593Smuzhiyun		/* Note: there is a redboot partition table despite u-boot
235*4882a593Smuzhiyun		 * being used. The names presented here are the same as those
236*4882a593Smuzhiyun		 * found in the FIS directory. There is also a small device
237*4882a593Smuzhiyun		 * tree in the last 64kB of the RedBoot partition which is not
238*4882a593Smuzhiyun		 * enumerated. The MAC address and the serial number are listed
239*4882a593Smuzhiyun		 * in the "vendor" partition.
240*4882a593Smuzhiyun		 */
241*4882a593Smuzhiyun		partition@0 {
242*4882a593Smuzhiyun			label = "RedBoot";
243*4882a593Smuzhiyun			reg = <0x00000000 0x000f0000>;
244*4882a593Smuzhiyun			read-only;
245*4882a593Smuzhiyun		};
246*4882a593Smuzhiyun
247*4882a593Smuzhiyun		partition@c0000 {
248*4882a593Smuzhiyun			label = "zImage";
249*4882a593Smuzhiyun			reg = <0x000f0000 0x002d0000>;
250*4882a593Smuzhiyun		};
251*4882a593Smuzhiyun
252*4882a593Smuzhiyun		partition@390000 {
253*4882a593Smuzhiyun			label = "rd.gz";
254*4882a593Smuzhiyun			reg = <0x003c0000 0x00410000>;
255*4882a593Smuzhiyun		};
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun		partition@7d0000 {
258*4882a593Smuzhiyun			label = "vendor";
259*4882a593Smuzhiyun			reg = <0x007d0000 0x00010000>;
260*4882a593Smuzhiyun			read-only;
261*4882a593Smuzhiyun		};
262*4882a593Smuzhiyun
263*4882a593Smuzhiyun		partition@7e0000 {
264*4882a593Smuzhiyun			label = "RedBoot config";
265*4882a593Smuzhiyun			reg = <0x007e0000 0x00010000>;
266*4882a593Smuzhiyun			read-only;
267*4882a593Smuzhiyun		};
268*4882a593Smuzhiyun
269*4882a593Smuzhiyun		partition@7f0000 {
270*4882a593Smuzhiyun			label = "FIS directory";
271*4882a593Smuzhiyun			reg = <0x007f0000 0x00010000>;
272*4882a593Smuzhiyun			read-only;
273*4882a593Smuzhiyun		};
274*4882a593Smuzhiyun	};
275*4882a593Smuzhiyun};
276*4882a593Smuzhiyun
277*4882a593Smuzhiyun&pinctrl {
278*4882a593Smuzhiyun	/* use only one pin for UART1, as mpp20 is used by sata0 */
279*4882a593Smuzhiyun	uart1_pins: uart-pins-1 {
280*4882a593Smuzhiyun		marvell,pins = "mpp19";
281*4882a593Smuzhiyun		marvell,function = "ua1";
282*4882a593Smuzhiyun	};
283*4882a593Smuzhiyun
284*4882a593Smuzhiyun	xhci0_vbus_pins: xhci0_vbus_pins {
285*4882a593Smuzhiyun		marvell,pins = "mpp58";
286*4882a593Smuzhiyun		marvell,function = "gpio";
287*4882a593Smuzhiyun	};
288*4882a593Smuzhiyun	xhci1_vbus_pins: xhci1_vbus_pins {
289*4882a593Smuzhiyun		marvell,pins = "mpp59";
290*4882a593Smuzhiyun		marvell,function = "gpio";
291*4882a593Smuzhiyun	};
292*4882a593Smuzhiyun};
293