xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/armada-385-linksys.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Device Tree include file for Armada 385 based Linksys boards
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2015 Imre Kaloz <kaloz@openwrt.org>
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h>
9*4882a593Smuzhiyun#include <dt-bindings/input/input.h>
10*4882a593Smuzhiyun#include "armada-385.dtsi"
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun/ {
13*4882a593Smuzhiyun	model = "Linksys boards based on Armada 385";
14*4882a593Smuzhiyun	compatible = "linksys,armada385", "marvell,armada385",
15*4882a593Smuzhiyun		     "marvell,armada380";
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun	chosen {
18*4882a593Smuzhiyun		stdout-path = "serial0:115200n8";
19*4882a593Smuzhiyun	};
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun	memory {
22*4882a593Smuzhiyun		device_type = "memory";
23*4882a593Smuzhiyun		reg = <0x00000000 0x20000000>; /* 512 MiB */
24*4882a593Smuzhiyun	};
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun	soc {
27*4882a593Smuzhiyun		ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
28*4882a593Smuzhiyun			  MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
29*4882a593Smuzhiyun			  MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
30*4882a593Smuzhiyun			  MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000
31*4882a593Smuzhiyun			  MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
32*4882a593Smuzhiyun	};
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun	usb3_1_phy: usb3_1-phy {
35*4882a593Smuzhiyun		compatible = "usb-nop-xceiv";
36*4882a593Smuzhiyun		vcc-supply = <&usb3_1_vbus>;
37*4882a593Smuzhiyun		#phy-cells = <0>;
38*4882a593Smuzhiyun	};
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun	usb3_1_vbus: usb3_1-vbus {
41*4882a593Smuzhiyun		compatible = "regulator-fixed";
42*4882a593Smuzhiyun		pinctrl-names = "default";
43*4882a593Smuzhiyun		pinctrl-0 = <&usb3_1_vbus_pins>;
44*4882a593Smuzhiyun		regulator-name = "usb3_1-vbus";
45*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
46*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
47*4882a593Smuzhiyun		enable-active-high;
48*4882a593Smuzhiyun		gpio = <&gpio1 18 GPIO_ACTIVE_HIGH>;
49*4882a593Smuzhiyun	};
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun	gpio_keys: gpio-keys {
52*4882a593Smuzhiyun		compatible = "gpio-keys";
53*4882a593Smuzhiyun		pinctrl-0 = <&gpio_keys_pins>;
54*4882a593Smuzhiyun		pinctrl-names = "default";
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun		wps {
57*4882a593Smuzhiyun			label = "WPS";
58*4882a593Smuzhiyun			linux,code = <KEY_WPS_BUTTON>;
59*4882a593Smuzhiyun			gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
60*4882a593Smuzhiyun		};
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun		reset {
63*4882a593Smuzhiyun			label = "Factory Reset Button";
64*4882a593Smuzhiyun			linux,code = <KEY_RESTART>;
65*4882a593Smuzhiyun			gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
66*4882a593Smuzhiyun		};
67*4882a593Smuzhiyun	};
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun	gpio_leds: gpio-leds {
70*4882a593Smuzhiyun		compatible = "gpio-leds";
71*4882a593Smuzhiyun		pinctrl-0 = <&gpio_leds_pins>;
72*4882a593Smuzhiyun		pinctrl-names = "default";
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun		power {
75*4882a593Smuzhiyun			gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
76*4882a593Smuzhiyun			default-state = "on";
77*4882a593Smuzhiyun		};
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun		sata {
80*4882a593Smuzhiyun			gpios = <&gpio1 22 GPIO_ACTIVE_LOW>;
81*4882a593Smuzhiyun			default-state = "off";
82*4882a593Smuzhiyun			linux,default-trigger = "disk-activity";
83*4882a593Smuzhiyun		};
84*4882a593Smuzhiyun	};
85*4882a593Smuzhiyun};
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun&ahci0 {
88*4882a593Smuzhiyun	status = "okay";
89*4882a593Smuzhiyun};
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun&bm {
92*4882a593Smuzhiyun	status = "okay";
93*4882a593Smuzhiyun};
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun&bm_bppi {
96*4882a593Smuzhiyun	status = "okay";
97*4882a593Smuzhiyun};
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun&eth0 {
100*4882a593Smuzhiyun	status = "okay";
101*4882a593Smuzhiyun	phy-mode = "rgmii-id";
102*4882a593Smuzhiyun	buffer-manager = <&bm>;
103*4882a593Smuzhiyun	bm,pool-long = <0>;
104*4882a593Smuzhiyun	bm,pool-short = <1>;
105*4882a593Smuzhiyun	fixed-link {
106*4882a593Smuzhiyun		speed = <1000>;
107*4882a593Smuzhiyun		full-duplex;
108*4882a593Smuzhiyun	};
109*4882a593Smuzhiyun};
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun&eth2 {
112*4882a593Smuzhiyun	status = "okay";
113*4882a593Smuzhiyun	phy-mode = "sgmii";
114*4882a593Smuzhiyun	buffer-manager = <&bm>;
115*4882a593Smuzhiyun	bm,pool-long = <2>;
116*4882a593Smuzhiyun	bm,pool-short = <3>;
117*4882a593Smuzhiyun	fixed-link {
118*4882a593Smuzhiyun		speed = <1000>;
119*4882a593Smuzhiyun		full-duplex;
120*4882a593Smuzhiyun	};
121*4882a593Smuzhiyun};
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun&i2c0 {
124*4882a593Smuzhiyun	pinctrl-names = "default";
125*4882a593Smuzhiyun	pinctrl-0 = <&i2c0_pins>;
126*4882a593Smuzhiyun	status = "okay";
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun	tmp421@4c {
129*4882a593Smuzhiyun		compatible = "ti,tmp421";
130*4882a593Smuzhiyun		reg = <0x4c>;
131*4882a593Smuzhiyun	};
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun	expander0: pca9635@68 {
134*4882a593Smuzhiyun		#address-cells = <1>;
135*4882a593Smuzhiyun		#size-cells = <0>;
136*4882a593Smuzhiyun		compatible = "nxp,pca9635";
137*4882a593Smuzhiyun		reg = <0x68>;
138*4882a593Smuzhiyun	};
139*4882a593Smuzhiyun};
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun&nand_controller {
142*4882a593Smuzhiyun	/* 128MiB or 256MiB */
143*4882a593Smuzhiyun	status = "okay";
144*4882a593Smuzhiyun	#address-cells = <1>;
145*4882a593Smuzhiyun	#size-cells = <0>;
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun	nand: nand@0 {
148*4882a593Smuzhiyun		reg = <0>;
149*4882a593Smuzhiyun		label = "pxa3xx_nand-0";
150*4882a593Smuzhiyun		nand-rb = <0>;
151*4882a593Smuzhiyun		marvell,nand-keep-config;
152*4882a593Smuzhiyun		nand-on-flash-bbt;
153*4882a593Smuzhiyun	};
154*4882a593Smuzhiyun};
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun&mdio {
157*4882a593Smuzhiyun	status = "okay";
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun	switch@0 {
160*4882a593Smuzhiyun		compatible = "marvell,mv88e6085";
161*4882a593Smuzhiyun		#address-cells = <1>;
162*4882a593Smuzhiyun		#size-cells = <0>;
163*4882a593Smuzhiyun		reg = <0>;
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun		ports {
166*4882a593Smuzhiyun			#address-cells = <1>;
167*4882a593Smuzhiyun			#size-cells = <0>;
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun			port@0 {
170*4882a593Smuzhiyun				reg = <0>;
171*4882a593Smuzhiyun				label = "lan4";
172*4882a593Smuzhiyun			};
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun			port@1 {
175*4882a593Smuzhiyun				reg = <1>;
176*4882a593Smuzhiyun				label = "lan3";
177*4882a593Smuzhiyun			};
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun			port@2 {
180*4882a593Smuzhiyun				reg = <2>;
181*4882a593Smuzhiyun				label = "lan2";
182*4882a593Smuzhiyun			};
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun			port@3 {
185*4882a593Smuzhiyun				reg = <3>;
186*4882a593Smuzhiyun				label = "lan1";
187*4882a593Smuzhiyun			};
188*4882a593Smuzhiyun
189*4882a593Smuzhiyun			port@4 {
190*4882a593Smuzhiyun				reg = <4>;
191*4882a593Smuzhiyun				label = "wan";
192*4882a593Smuzhiyun			};
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun			port@5 {
195*4882a593Smuzhiyun				reg = <5>;
196*4882a593Smuzhiyun				label = "cpu";
197*4882a593Smuzhiyun				ethernet = <&eth2>;
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun				fixed-link {
200*4882a593Smuzhiyun					speed = <1000>;
201*4882a593Smuzhiyun					full-duplex;
202*4882a593Smuzhiyun				};
203*4882a593Smuzhiyun			};
204*4882a593Smuzhiyun		};
205*4882a593Smuzhiyun	};
206*4882a593Smuzhiyun};
207*4882a593Smuzhiyun
208*4882a593Smuzhiyun&pciec {
209*4882a593Smuzhiyun	status = "okay";
210*4882a593Smuzhiyun};
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun&pcie1 {
213*4882a593Smuzhiyun	/* Marvell 88W8864, 5GHz-only */
214*4882a593Smuzhiyun	status = "okay";
215*4882a593Smuzhiyun};
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun&pcie2 {
218*4882a593Smuzhiyun	/* Marvell 88W8864, 2GHz-only */
219*4882a593Smuzhiyun	status = "okay";
220*4882a593Smuzhiyun};
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun&pinctrl {
223*4882a593Smuzhiyun	gpio_keys_pins: gpio-keys-pins {
224*4882a593Smuzhiyun		/* mpp24: wps, mpp29: reset */
225*4882a593Smuzhiyun		marvell,pins = "mpp24", "mpp29";
226*4882a593Smuzhiyun		marvell,function = "gpio";
227*4882a593Smuzhiyun	};
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun	gpio_leds_pins: gpio-leds-pins {
230*4882a593Smuzhiyun		/* mpp54: sata, mpp55: power */
231*4882a593Smuzhiyun		marvell,pins = "mpp54", "mpp55";
232*4882a593Smuzhiyun		marvell,function = "gpio";
233*4882a593Smuzhiyun	};
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun	usb3_1_vbus_pins: usb3_1-vbus-pins {
236*4882a593Smuzhiyun		marvell,pins = "mpp50";
237*4882a593Smuzhiyun		marvell,function = "gpio";
238*4882a593Smuzhiyun	};
239*4882a593Smuzhiyun};
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun&spi0 {
242*4882a593Smuzhiyun	status = "disabled";
243*4882a593Smuzhiyun};
244*4882a593Smuzhiyun
245*4882a593Smuzhiyun&uart0 {
246*4882a593Smuzhiyun	/* J10: VCC, NC, RX, NC, TX, GND  */
247*4882a593Smuzhiyun	status = "okay";
248*4882a593Smuzhiyun};
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun&usb0 {
251*4882a593Smuzhiyun	/* USB part of the eSATA/USB 2.0 port */
252*4882a593Smuzhiyun	status = "okay";
253*4882a593Smuzhiyun};
254*4882a593Smuzhiyun
255*4882a593Smuzhiyun&usb3_1 {
256*4882a593Smuzhiyun	status = "okay";
257*4882a593Smuzhiyun	usb-phy = <&usb3_1_phy>;
258*4882a593Smuzhiyun};
259*4882a593Smuzhiyun
260*4882a593Smuzhiyun&rtc {
261*4882a593Smuzhiyun	/* No crystal connected to the internal RTC */
262*4882a593Smuzhiyun	status = "disabled";
263*4882a593Smuzhiyun};
264