xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/armada-370-netgear-rn104.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Device Tree file for NETGEAR ReadyNAS 104
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2013, Arnaud EBALARD <arno@natisbad.org>
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun/dts-v1/;
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun#include <dt-bindings/input/input.h>
11*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h>
12*4882a593Smuzhiyun#include "armada-370.dtsi"
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun/ {
15*4882a593Smuzhiyun	model = "NETGEAR ReadyNAS 104";
16*4882a593Smuzhiyun	compatible = "netgear,readynas-104", "marvell,armada370", "marvell,armada-370-xp";
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun	chosen {
19*4882a593Smuzhiyun		stdout-path = "serial0:115200n8";
20*4882a593Smuzhiyun	};
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun	memory@0 {
23*4882a593Smuzhiyun		device_type = "memory";
24*4882a593Smuzhiyun		reg = <0x00000000 0x20000000>; /* 512 MB */
25*4882a593Smuzhiyun	};
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun	soc {
28*4882a593Smuzhiyun		ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
29*4882a593Smuzhiyun			  MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
30*4882a593Smuzhiyun			  MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun		internal-regs {
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun			/* RTC is provided by Intersil ISL12057 I2C RTC chip */
35*4882a593Smuzhiyun			rtc@10300 {
36*4882a593Smuzhiyun				status = "disabled";
37*4882a593Smuzhiyun			};
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun			serial@12000 {
40*4882a593Smuzhiyun				status = "okay";
41*4882a593Smuzhiyun			};
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun			ethernet@70000 {
44*4882a593Smuzhiyun				pinctrl-0 = <&ge0_rgmii_pins>;
45*4882a593Smuzhiyun				pinctrl-names = "default";
46*4882a593Smuzhiyun				status = "okay";
47*4882a593Smuzhiyun				phy = <&phy0>;
48*4882a593Smuzhiyun				phy-mode = "rgmii-id";
49*4882a593Smuzhiyun			};
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun			ethernet@74000 {
52*4882a593Smuzhiyun				pinctrl-0 = <&ge1_rgmii_pins>;
53*4882a593Smuzhiyun				pinctrl-names = "default";
54*4882a593Smuzhiyun				status = "okay";
55*4882a593Smuzhiyun				phy = <&phy1>;
56*4882a593Smuzhiyun				phy-mode = "rgmii-id";
57*4882a593Smuzhiyun			};
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun			usb@50000 {
60*4882a593Smuzhiyun				status = "okay";
61*4882a593Smuzhiyun			};
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun			i2c@11000 {
64*4882a593Smuzhiyun				clock-frequency = <100000>;
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun				pinctrl-0 = <&i2c0_pins>;
67*4882a593Smuzhiyun				pinctrl-names = "default";
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun				status = "okay";
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun				isl12057: rtc@68 {
72*4882a593Smuzhiyun					compatible = "isil,isl12057";
73*4882a593Smuzhiyun					reg = <0x68>;
74*4882a593Smuzhiyun					wakeup-source;
75*4882a593Smuzhiyun				};
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun				g762: g762@3e {
78*4882a593Smuzhiyun					compatible = "gmt,g762";
79*4882a593Smuzhiyun					reg = <0x3e>;
80*4882a593Smuzhiyun					clocks = <&g762_clk>; /* input clock */
81*4882a593Smuzhiyun					fan_gear_mode = <0>;
82*4882a593Smuzhiyun					fan_startv = <1>;
83*4882a593Smuzhiyun					pwm_polarity = <0>;
84*4882a593Smuzhiyun				};
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun				pca9554: pca9554@23 {
87*4882a593Smuzhiyun					compatible = "nxp,pca9554";
88*4882a593Smuzhiyun					gpio-controller;
89*4882a593Smuzhiyun					#gpio-cells = <2>;
90*4882a593Smuzhiyun					reg = <0x23>;
91*4882a593Smuzhiyun				};
92*4882a593Smuzhiyun			};
93*4882a593Smuzhiyun		};
94*4882a593Smuzhiyun	};
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun	clocks {
97*4882a593Smuzhiyun	       g762_clk: g762-oscillator {
98*4882a593Smuzhiyun			 compatible = "fixed-clock";
99*4882a593Smuzhiyun			 #clock-cells = <0>;
100*4882a593Smuzhiyun			 clock-frequency = <8192>;
101*4882a593Smuzhiyun	       };
102*4882a593Smuzhiyun	};
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun	gpio-leds {
105*4882a593Smuzhiyun		compatible = "gpio-leds";
106*4882a593Smuzhiyun		pinctrl-0 = <&backup_led_pin &power_led_pin>;
107*4882a593Smuzhiyun		pinctrl-names = "default";
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun		blue-backup-led {
110*4882a593Smuzhiyun			label = "rn104:blue:backup";
111*4882a593Smuzhiyun			gpios = <&gpio1 31 GPIO_ACTIVE_HIGH>;
112*4882a593Smuzhiyun			default-state = "off";
113*4882a593Smuzhiyun		};
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun		blue-power-led {
116*4882a593Smuzhiyun			label = "rn104:blue:pwr";
117*4882a593Smuzhiyun			gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
118*4882a593Smuzhiyun			linux,default-trigger = "keep";
119*4882a593Smuzhiyun		};
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun		blue-sata1-led {
122*4882a593Smuzhiyun			label = "rn104:blue:sata1";
123*4882a593Smuzhiyun			gpios = <&pca9554 0 GPIO_ACTIVE_LOW>;
124*4882a593Smuzhiyun			default-state = "off";
125*4882a593Smuzhiyun		};
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun		blue-sata2-led {
128*4882a593Smuzhiyun			label = "rn104:blue:sata2";
129*4882a593Smuzhiyun			gpios = <&pca9554 1 GPIO_ACTIVE_LOW>;
130*4882a593Smuzhiyun			default-state = "off";
131*4882a593Smuzhiyun		};
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun		blue-sata3-led {
134*4882a593Smuzhiyun			label = "rn104:blue:sata3";
135*4882a593Smuzhiyun			gpios = <&pca9554 2 GPIO_ACTIVE_LOW>;
136*4882a593Smuzhiyun			default-state = "off";
137*4882a593Smuzhiyun		};
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun		blue-sata4-led {
140*4882a593Smuzhiyun			label = "rn104:blue:sata4";
141*4882a593Smuzhiyun			gpios = <&pca9554 3 GPIO_ACTIVE_LOW>;
142*4882a593Smuzhiyun			default-state = "off";
143*4882a593Smuzhiyun		};
144*4882a593Smuzhiyun	};
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun	auxdisplay {
147*4882a593Smuzhiyun		compatible = "hit,hd44780";
148*4882a593Smuzhiyun		data-gpios = <&gpio1 25 GPIO_ACTIVE_HIGH>,
149*4882a593Smuzhiyun				<&gpio1 26 GPIO_ACTIVE_HIGH>,
150*4882a593Smuzhiyun				<&gpio1 27 GPIO_ACTIVE_HIGH>,
151*4882a593Smuzhiyun				<&gpio1 29 GPIO_ACTIVE_HIGH>;
152*4882a593Smuzhiyun		enable-gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
153*4882a593Smuzhiyun		rs-gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
154*4882a593Smuzhiyun		rw-gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
155*4882a593Smuzhiyun		backlight-gpios = <&gpio1 21 GPIO_ACTIVE_LOW>;
156*4882a593Smuzhiyun		display-height-chars = <2>;
157*4882a593Smuzhiyun		display-width-chars = <16>;
158*4882a593Smuzhiyun	};
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun	gpio-keys {
161*4882a593Smuzhiyun		compatible = "gpio-keys";
162*4882a593Smuzhiyun		pinctrl-0 = <&backup_button_pin
163*4882a593Smuzhiyun			     &power_button_pin
164*4882a593Smuzhiyun			     &reset_button_pin>;
165*4882a593Smuzhiyun		pinctrl-names = "default";
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun		backup-button {
168*4882a593Smuzhiyun			label = "Backup Button";
169*4882a593Smuzhiyun			linux,code = <KEY_COPY>;
170*4882a593Smuzhiyun			gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
171*4882a593Smuzhiyun		};
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun		power-button {
174*4882a593Smuzhiyun			label = "Power Button";
175*4882a593Smuzhiyun			linux,code = <KEY_POWER>;
176*4882a593Smuzhiyun			gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>;
177*4882a593Smuzhiyun		};
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun		reset-button {
180*4882a593Smuzhiyun			label = "Reset Button";
181*4882a593Smuzhiyun			linux,code = <KEY_RESTART>;
182*4882a593Smuzhiyun			gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
183*4882a593Smuzhiyun		};
184*4882a593Smuzhiyun	};
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun	gpio-poweroff {
187*4882a593Smuzhiyun		compatible = "gpio-poweroff";
188*4882a593Smuzhiyun		pinctrl-0 = <&poweroff>;
189*4882a593Smuzhiyun		pinctrl-names = "default";
190*4882a593Smuzhiyun		gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;
191*4882a593Smuzhiyun	};
192*4882a593Smuzhiyun};
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun&pciec {
195*4882a593Smuzhiyun	status = "okay";
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun	/* Connected to FL1009 USB 3.0 controller */
198*4882a593Smuzhiyun	pcie@1,0 {
199*4882a593Smuzhiyun		/* Port 0, Lane 0 */
200*4882a593Smuzhiyun		status = "okay";
201*4882a593Smuzhiyun	};
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun	/* Connected to Marvell 88SE9215 SATA controller */
204*4882a593Smuzhiyun	pcie@2,0 {
205*4882a593Smuzhiyun		/* Port 1, Lane 0 */
206*4882a593Smuzhiyun		status = "okay";
207*4882a593Smuzhiyun	};
208*4882a593Smuzhiyun};
209*4882a593Smuzhiyun
210*4882a593Smuzhiyun&mdio {
211*4882a593Smuzhiyun	pinctrl-0 = <&mdio_pins>;
212*4882a593Smuzhiyun	pinctrl-names = "default";
213*4882a593Smuzhiyun	phy0: ethernet-phy@0 { /* Marvell 88E1318 */
214*4882a593Smuzhiyun		reg = <0>;
215*4882a593Smuzhiyun	};
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun	phy1: ethernet-phy@1 { /* Marvell 88E1318 */
218*4882a593Smuzhiyun		reg = <1>;
219*4882a593Smuzhiyun	};
220*4882a593Smuzhiyun};
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun&pinctrl {
223*4882a593Smuzhiyun	poweroff: poweroff {
224*4882a593Smuzhiyun		marvell,pins = "mpp60";
225*4882a593Smuzhiyun		marvell,function = "gpio";
226*4882a593Smuzhiyun	};
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun	backup_button_pin: backup-button-pin {
229*4882a593Smuzhiyun		marvell,pins = "mpp52";
230*4882a593Smuzhiyun		marvell,function = "gpio";
231*4882a593Smuzhiyun	};
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun	power_button_pin: power-button-pin {
234*4882a593Smuzhiyun		marvell,pins = "mpp62";
235*4882a593Smuzhiyun		marvell,function = "gpio";
236*4882a593Smuzhiyun	};
237*4882a593Smuzhiyun
238*4882a593Smuzhiyun	backup_led_pin: backup-led-pin {
239*4882a593Smuzhiyun		marvell,pins = "mpp63";
240*4882a593Smuzhiyun		marvell,function = "gpio";
241*4882a593Smuzhiyun	};
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun	power_led_pin: power-led-pin {
244*4882a593Smuzhiyun		marvell,pins = "mpp64";
245*4882a593Smuzhiyun		marvell,function = "gpio";
246*4882a593Smuzhiyun	};
247*4882a593Smuzhiyun
248*4882a593Smuzhiyun	reset_button_pin: reset-button-pin {
249*4882a593Smuzhiyun		marvell,pins = "mpp65";
250*4882a593Smuzhiyun		marvell,function = "gpio";
251*4882a593Smuzhiyun	};
252*4882a593Smuzhiyun};
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun&nand_controller {
255*4882a593Smuzhiyun	status = "okay";
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun	nand@0 {
258*4882a593Smuzhiyun		reg = <0>;
259*4882a593Smuzhiyun		label = "pxa3xx_nand-0";
260*4882a593Smuzhiyun		nand-rb = <0>;
261*4882a593Smuzhiyun		marvell,nand-keep-config;
262*4882a593Smuzhiyun		nand-on-flash-bbt;
263*4882a593Smuzhiyun
264*4882a593Smuzhiyun		/* Use Hardware BCH ECC */
265*4882a593Smuzhiyun		nand-ecc-strength = <4>;
266*4882a593Smuzhiyun		nand-ecc-step-size = <512>;
267*4882a593Smuzhiyun
268*4882a593Smuzhiyun		partitions {
269*4882a593Smuzhiyun			compatible = "fixed-partitions";
270*4882a593Smuzhiyun			#address-cells = <1>;
271*4882a593Smuzhiyun			#size-cells = <1>;
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun			partition@0 {
274*4882a593Smuzhiyun				label = "u-boot";
275*4882a593Smuzhiyun				reg = <0x0000000 0x180000>;  /* 1.5MB */
276*4882a593Smuzhiyun				read-only;
277*4882a593Smuzhiyun			};
278*4882a593Smuzhiyun
279*4882a593Smuzhiyun			partition@180000 {
280*4882a593Smuzhiyun				label = "u-boot-env";
281*4882a593Smuzhiyun				reg = <0x180000 0x20000>;    /* 128KB */
282*4882a593Smuzhiyun				read-only;
283*4882a593Smuzhiyun			};
284*4882a593Smuzhiyun
285*4882a593Smuzhiyun			partition@200000 {
286*4882a593Smuzhiyun				label = "uImage";
287*4882a593Smuzhiyun				reg = <0x0200000 0x600000>;    /* 6MB */
288*4882a593Smuzhiyun			};
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun			partition@800000 {
291*4882a593Smuzhiyun				label = "minirootfs";
292*4882a593Smuzhiyun				reg = <0x0800000 0x400000>;    /* 4MB */
293*4882a593Smuzhiyun			};
294*4882a593Smuzhiyun
295*4882a593Smuzhiyun			/* Last MB is for the BBT, i.e. not writable */
296*4882a593Smuzhiyun			partition@c00000 {
297*4882a593Smuzhiyun				label = "ubifs";
298*4882a593Smuzhiyun				reg = <0x0c00000 0x7400000>; /* 116MB */
299*4882a593Smuzhiyun			};
300*4882a593Smuzhiyun		};
301*4882a593Smuzhiyun	};
302*4882a593Smuzhiyun};
303