1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Device Tree file for Marvell Armada 370 evaluation board 4*4882a593Smuzhiyun * (DB-88F6710-BP-DDR3) 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * Copyright (C) 2012 Marvell 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun * Lior Amsalem <alior@marvell.com> 9*4882a593Smuzhiyun * Gregory CLEMENT <gregory.clement@free-electrons.com> 10*4882a593Smuzhiyun * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 11*4882a593Smuzhiyun * 12*4882a593Smuzhiyun * Note: this Device Tree assumes that the bootloader has remapped the 13*4882a593Smuzhiyun * internal registers to 0xf1000000 (instead of the default 14*4882a593Smuzhiyun * 0xd0000000). The 0xf1000000 is the default used by the recent, 15*4882a593Smuzhiyun * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier 16*4882a593Smuzhiyun * boards were delivered with an older version of the bootloader that 17*4882a593Smuzhiyun * left internal registers mapped at 0xd0000000. If you are in this 18*4882a593Smuzhiyun * situation, you should either update your bootloader (preferred 19*4882a593Smuzhiyun * solution) or the below Device Tree should be adjusted. 20*4882a593Smuzhiyun */ 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun/dts-v1/; 23*4882a593Smuzhiyun#include "armada-370.dtsi" 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun/ { 26*4882a593Smuzhiyun model = "Marvell Armada 370 Evaluation Board"; 27*4882a593Smuzhiyun compatible = "marvell,a370-db", "marvell,armada370", "marvell,armada-370-xp"; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun chosen { 30*4882a593Smuzhiyun stdout-path = "serial0:115200n8"; 31*4882a593Smuzhiyun }; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun memory@0 { 34*4882a593Smuzhiyun device_type = "memory"; 35*4882a593Smuzhiyun reg = <0x00000000 0x40000000>; /* 1 GB */ 36*4882a593Smuzhiyun }; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun soc { 39*4882a593Smuzhiyun ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000 40*4882a593Smuzhiyun MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000 41*4882a593Smuzhiyun MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>; 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun internal-regs { 44*4882a593Smuzhiyun serial@12000 { 45*4882a593Smuzhiyun status = "okay"; 46*4882a593Smuzhiyun }; 47*4882a593Smuzhiyun sata@a0000 { 48*4882a593Smuzhiyun nr-ports = <2>; 49*4882a593Smuzhiyun status = "okay"; 50*4882a593Smuzhiyun }; 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun ethernet@70000 { 53*4882a593Smuzhiyun pinctrl-0 = <&ge0_rgmii_pins>; 54*4882a593Smuzhiyun pinctrl-names = "default"; 55*4882a593Smuzhiyun status = "okay"; 56*4882a593Smuzhiyun phy = <&phy0>; 57*4882a593Smuzhiyun phy-mode = "rgmii-id"; 58*4882a593Smuzhiyun }; 59*4882a593Smuzhiyun ethernet@74000 { 60*4882a593Smuzhiyun pinctrl-0 = <&ge1_rgmii_pins>; 61*4882a593Smuzhiyun pinctrl-names = "default"; 62*4882a593Smuzhiyun status = "okay"; 63*4882a593Smuzhiyun phy = <&phy1>; 64*4882a593Smuzhiyun phy-mode = "rgmii-id"; 65*4882a593Smuzhiyun }; 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun i2c@11000 { 68*4882a593Smuzhiyun pinctrl-0 = <&i2c0_pins>; 69*4882a593Smuzhiyun pinctrl-names = "default"; 70*4882a593Smuzhiyun clock-frequency = <100000>; 71*4882a593Smuzhiyun status = "okay"; 72*4882a593Smuzhiyun audio_codec: audio-codec@4a { 73*4882a593Smuzhiyun #sound-dai-cells = <0>; 74*4882a593Smuzhiyun compatible = "cirrus,cs42l51"; 75*4882a593Smuzhiyun reg = <0x4a>; 76*4882a593Smuzhiyun }; 77*4882a593Smuzhiyun }; 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun audio-controller@30000 { 80*4882a593Smuzhiyun pinctrl-0 = <&i2s_pins2>; 81*4882a593Smuzhiyun pinctrl-names = "default"; 82*4882a593Smuzhiyun status = "okay"; 83*4882a593Smuzhiyun }; 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun mvsdio@d4000 { 86*4882a593Smuzhiyun pinctrl-0 = <&sdio_pins1>; 87*4882a593Smuzhiyun pinctrl-names = "default"; 88*4882a593Smuzhiyun /* 89*4882a593Smuzhiyun * This device is disabled by default, because 90*4882a593Smuzhiyun * using the SD card connector requires 91*4882a593Smuzhiyun * changing the default CON40 connector 92*4882a593Smuzhiyun * "DB-88F6710_MPP_2xRGMII_DEVICE_Jumper" to a 93*4882a593Smuzhiyun * different connector 94*4882a593Smuzhiyun * "DB-88F6710_MPP_RGMII_SD_Jumper". 95*4882a593Smuzhiyun */ 96*4882a593Smuzhiyun status = "disabled"; 97*4882a593Smuzhiyun /* No CD or WP GPIOs */ 98*4882a593Smuzhiyun broken-cd; 99*4882a593Smuzhiyun }; 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun usb@50000 { 102*4882a593Smuzhiyun status = "okay"; 103*4882a593Smuzhiyun }; 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun usb@51000 { 106*4882a593Smuzhiyun status = "okay"; 107*4882a593Smuzhiyun }; 108*4882a593Smuzhiyun }; 109*4882a593Smuzhiyun }; 110*4882a593Smuzhiyun 111*4882a593Smuzhiyun sound { 112*4882a593Smuzhiyun compatible = "simple-audio-card"; 113*4882a593Smuzhiyun simple-audio-card,name = "Armada 370 DB Audio"; 114*4882a593Smuzhiyun simple-audio-card,mclk-fs = <256>; 115*4882a593Smuzhiyun simple-audio-card,widgets = 116*4882a593Smuzhiyun "Headphone", "Out Jack", 117*4882a593Smuzhiyun "Line", "In Jack"; 118*4882a593Smuzhiyun simple-audio-card,routing = 119*4882a593Smuzhiyun "Out Jack", "HPL", 120*4882a593Smuzhiyun "Out Jack", "HPR", 121*4882a593Smuzhiyun "AIN1L", "In Jack", 122*4882a593Smuzhiyun "AIN1L", "In Jack"; 123*4882a593Smuzhiyun status = "okay"; 124*4882a593Smuzhiyun 125*4882a593Smuzhiyun simple-audio-card,dai-link@0 { 126*4882a593Smuzhiyun format = "i2s"; 127*4882a593Smuzhiyun cpu { 128*4882a593Smuzhiyun sound-dai = <&audio_controller 0>; 129*4882a593Smuzhiyun }; 130*4882a593Smuzhiyun 131*4882a593Smuzhiyun codec { 132*4882a593Smuzhiyun sound-dai = <&audio_codec>; 133*4882a593Smuzhiyun }; 134*4882a593Smuzhiyun }; 135*4882a593Smuzhiyun 136*4882a593Smuzhiyun simple-audio-card,dai-link@1 { 137*4882a593Smuzhiyun format = "i2s"; 138*4882a593Smuzhiyun cpu { 139*4882a593Smuzhiyun sound-dai = <&audio_controller 1>; 140*4882a593Smuzhiyun }; 141*4882a593Smuzhiyun 142*4882a593Smuzhiyun codec { 143*4882a593Smuzhiyun sound-dai = <&spdif_out>; 144*4882a593Smuzhiyun }; 145*4882a593Smuzhiyun }; 146*4882a593Smuzhiyun 147*4882a593Smuzhiyun simple-audio-card,dai-link@2 { 148*4882a593Smuzhiyun format = "i2s"; 149*4882a593Smuzhiyun cpu { 150*4882a593Smuzhiyun sound-dai = <&audio_controller 1>; 151*4882a593Smuzhiyun }; 152*4882a593Smuzhiyun 153*4882a593Smuzhiyun codec { 154*4882a593Smuzhiyun sound-dai = <&spdif_in>; 155*4882a593Smuzhiyun }; 156*4882a593Smuzhiyun }; 157*4882a593Smuzhiyun }; 158*4882a593Smuzhiyun 159*4882a593Smuzhiyun spdif_out: spdif-out { 160*4882a593Smuzhiyun #sound-dai-cells = <0>; 161*4882a593Smuzhiyun compatible = "linux,spdif-dit"; 162*4882a593Smuzhiyun }; 163*4882a593Smuzhiyun 164*4882a593Smuzhiyun spdif_in: spdif-in { 165*4882a593Smuzhiyun #sound-dai-cells = <0>; 166*4882a593Smuzhiyun compatible = "linux,spdif-dir"; 167*4882a593Smuzhiyun }; 168*4882a593Smuzhiyun}; 169*4882a593Smuzhiyun 170*4882a593Smuzhiyun&pciec { 171*4882a593Smuzhiyun status = "okay"; 172*4882a593Smuzhiyun /* 173*4882a593Smuzhiyun * The two PCIe units are accessible through 174*4882a593Smuzhiyun * both standard PCIe slots and mini-PCIe 175*4882a593Smuzhiyun * slots on the board. 176*4882a593Smuzhiyun */ 177*4882a593Smuzhiyun pcie@1,0 { 178*4882a593Smuzhiyun /* Port 0, Lane 0 */ 179*4882a593Smuzhiyun status = "okay"; 180*4882a593Smuzhiyun }; 181*4882a593Smuzhiyun 182*4882a593Smuzhiyun pcie@2,0 { 183*4882a593Smuzhiyun /* Port 1, Lane 0 */ 184*4882a593Smuzhiyun status = "okay"; 185*4882a593Smuzhiyun }; 186*4882a593Smuzhiyun}; 187*4882a593Smuzhiyun 188*4882a593Smuzhiyun&mdio { 189*4882a593Smuzhiyun pinctrl-0 = <&mdio_pins>; 190*4882a593Smuzhiyun pinctrl-names = "default"; 191*4882a593Smuzhiyun phy0: ethernet-phy@0 { 192*4882a593Smuzhiyun reg = <0>; 193*4882a593Smuzhiyun }; 194*4882a593Smuzhiyun 195*4882a593Smuzhiyun phy1: ethernet-phy@1 { 196*4882a593Smuzhiyun reg = <1>; 197*4882a593Smuzhiyun }; 198*4882a593Smuzhiyun}; 199*4882a593Smuzhiyun 200*4882a593Smuzhiyun 201*4882a593Smuzhiyun&spi0 { 202*4882a593Smuzhiyun pinctrl-0 = <&spi0_pins2>; 203*4882a593Smuzhiyun pinctrl-names = "default"; 204*4882a593Smuzhiyun status = "okay"; 205*4882a593Smuzhiyun 206*4882a593Smuzhiyun spi-flash@0 { 207*4882a593Smuzhiyun #address-cells = <1>; 208*4882a593Smuzhiyun #size-cells = <1>; 209*4882a593Smuzhiyun compatible = "mx25l25635e", "jedec,spi-nor"; 210*4882a593Smuzhiyun reg = <0>; /* Chip select 0 */ 211*4882a593Smuzhiyun spi-max-frequency = <50000000>; 212*4882a593Smuzhiyun }; 213*4882a593Smuzhiyun}; 214*4882a593Smuzhiyun 215*4882a593Smuzhiyun&nand_controller { 216*4882a593Smuzhiyun status = "okay"; 217*4882a593Smuzhiyun 218*4882a593Smuzhiyun nand@0 { 219*4882a593Smuzhiyun reg = <0>; 220*4882a593Smuzhiyun label = "pxa3xx_nand-0"; 221*4882a593Smuzhiyun nand-rb = <0>; 222*4882a593Smuzhiyun marvell,nand-keep-config; 223*4882a593Smuzhiyun nand-on-flash-bbt; 224*4882a593Smuzhiyun 225*4882a593Smuzhiyun partitions { 226*4882a593Smuzhiyun compatible = "fixed-partitions"; 227*4882a593Smuzhiyun #address-cells = <1>; 228*4882a593Smuzhiyun #size-cells = <1>; 229*4882a593Smuzhiyun 230*4882a593Smuzhiyun partition@0 { 231*4882a593Smuzhiyun label = "U-Boot"; 232*4882a593Smuzhiyun reg = <0 0x800000>; 233*4882a593Smuzhiyun }; 234*4882a593Smuzhiyun partition@800000 { 235*4882a593Smuzhiyun label = "Linux"; 236*4882a593Smuzhiyun reg = <0x800000 0x800000>; 237*4882a593Smuzhiyun }; 238*4882a593Smuzhiyun partition@1000000 { 239*4882a593Smuzhiyun label = "Filesystem"; 240*4882a593Smuzhiyun reg = <0x1000000 0x3f000000>; 241*4882a593Smuzhiyun }; 242*4882a593Smuzhiyun }; 243*4882a593Smuzhiyun }; 244*4882a593Smuzhiyun}; 245